wpack.cgs 3.4 KB

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  1. # Intel(r) Wireless MMX(tm) technology testcase for WPACK
  2. # mach: xscale
  3. # as: -mcpu=xscale+iwmmxt
  4. .include "testutils.inc"
  5. start
  6. .global wpack
  7. wpack:
  8. # Enable access to CoProcessors 0 & 1 before
  9. # we attempt these instructions.
  10. mvi_h_gr r1, 3
  11. mcr p15, 0, r1, cr15, cr1, 0
  12. # Test Halfword, Unsigned Saturation, Packing
  13. mvi_h_gr r0, 0x12345678
  14. mvi_h_gr r1, 0x9abcdef0
  15. mvi_h_gr r2, 0x11111111
  16. mvi_h_gr r3, 0x00000000
  17. mvi_h_gr r4, 0
  18. mvi_h_gr r5, 0
  19. tmcrr wr0, r0, r1
  20. tmcrr wr1, r2, r3
  21. tmcrr wr2, r4, r5
  22. wpackhus wr2, wr0, wr1
  23. tmrrc r0, r1, wr0
  24. tmrrc r2, r3, wr1
  25. tmrrc r4, r5, wr2
  26. test_h_gr r0, 0x12345678
  27. test_h_gr r1, 0x9abcdef0
  28. test_h_gr r2, 0x11111111
  29. test_h_gr r3, 0x00000000
  30. test_h_gr r4, 0x0000ffff
  31. test_h_gr r5, 0x0000ffff
  32. # Test Halfword, Signed Saturation, Packing
  33. mvi_h_gr r0, 0x12345678
  34. mvi_h_gr r1, 0x9abcdef0
  35. mvi_h_gr r2, 0x11111111
  36. mvi_h_gr r3, 0x00000000
  37. mvi_h_gr r4, 0
  38. mvi_h_gr r5, 0
  39. tmcrr wr0, r0, r1
  40. tmcrr wr1, r2, r3
  41. tmcrr wr2, r4, r5
  42. wpackhss wr2, wr0, wr1
  43. tmrrc r0, r1, wr0
  44. tmrrc r2, r3, wr1
  45. tmrrc r4, r5, wr2
  46. test_h_gr r0, 0x12345678
  47. test_h_gr r1, 0x9abcdef0
  48. test_h_gr r2, 0x11111111
  49. test_h_gr r3, 0x00000000
  50. test_h_gr r4, 0x80807f7f
  51. test_h_gr r5, 0x00007f7f
  52. # Test Word, Unsigned Saturation, Packing
  53. mvi_h_gr r0, 0x12345678
  54. mvi_h_gr r1, 0x9abcdef0
  55. mvi_h_gr r2, 0x11111111
  56. mvi_h_gr r3, 0x00000000
  57. mvi_h_gr r4, 0
  58. mvi_h_gr r5, 0
  59. tmcrr wr0, r0, r1
  60. tmcrr wr1, r2, r3
  61. tmcrr wr2, r4, r5
  62. wpackwus wr2, wr0, wr1
  63. tmrrc r0, r1, wr0
  64. tmrrc r2, r3, wr1
  65. tmrrc r4, r5, wr2
  66. test_h_gr r0, 0x12345678
  67. test_h_gr r1, 0x9abcdef0
  68. test_h_gr r2, 0x11111111
  69. test_h_gr r3, 0x00000000
  70. test_h_gr r4, 0x0000ffff
  71. test_h_gr r5, 0x0000ffff
  72. # Test Word, Signed Saturation, Packing
  73. mvi_h_gr r0, 0x12345678
  74. mvi_h_gr r1, 0x9abcdef0
  75. mvi_h_gr r2, 0x11111111
  76. mvi_h_gr r3, 0x00000000
  77. mvi_h_gr r4, 0
  78. mvi_h_gr r5, 0
  79. tmcrr wr0, r0, r1
  80. tmcrr wr1, r2, r3
  81. tmcrr wr2, r4, r5
  82. wpackwss wr2, wr0, wr1
  83. tmrrc r0, r1, wr0
  84. tmrrc r2, r3, wr1
  85. tmrrc r4, r5, wr2
  86. test_h_gr r0, 0x12345678
  87. test_h_gr r1, 0x9abcdef0
  88. test_h_gr r2, 0x11111111
  89. test_h_gr r3, 0x00000000
  90. test_h_gr r4, 0x80007fff
  91. test_h_gr r5, 0x00007fff
  92. # Test Double Word, Unsigned Saturation, Packing
  93. mvi_h_gr r0, 0x12345678
  94. mvi_h_gr r1, 0x9abcdef0
  95. mvi_h_gr r2, 0x11111111
  96. mvi_h_gr r3, 0x00000000
  97. mvi_h_gr r4, 0
  98. mvi_h_gr r5, 0
  99. tmcrr wr0, r0, r1
  100. tmcrr wr1, r2, r3
  101. tmcrr wr2, r4, r5
  102. wpackdus wr2, wr0, wr1
  103. tmrrc r0, r1, wr0
  104. tmrrc r2, r3, wr1
  105. tmrrc r4, r5, wr2
  106. test_h_gr r0, 0x12345678
  107. test_h_gr r1, 0x9abcdef0
  108. test_h_gr r2, 0x11111111
  109. test_h_gr r3, 0x00000000
  110. test_h_gr r4, 0x00000000
  111. test_h_gr r5, 0x11111111
  112. # Test Double Word, Signed Saturation, Packing
  113. mvi_h_gr r0, 0x12345678
  114. mvi_h_gr r1, 0x9abcdef0
  115. mvi_h_gr r2, 0x11111111
  116. mvi_h_gr r3, 0x00000000
  117. mvi_h_gr r4, 0
  118. mvi_h_gr r5, 0
  119. tmcrr wr0, r0, r1
  120. tmcrr wr1, r2, r3
  121. tmcrr wr2, r4, r5
  122. wpackdss wr2, wr0, wr1
  123. tmrrc r0, r1, wr0
  124. tmrrc r2, r3, wr1
  125. tmrrc r4, r5, wr2
  126. test_h_gr r0, 0x12345678
  127. test_h_gr r1, 0x9abcdef0
  128. test_h_gr r2, 0x11111111
  129. test_h_gr r3, 0x00000000
  130. test_h_gr r4, 0x80000000
  131. test_h_gr r5, 0x11111111
  132. pass