break.cgs 1.4 KB

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  1. # FRV testcase for break
  2. # mach: all
  3. .include "testutils.inc"
  4. start
  5. .global tra
  6. tra:
  7. ; Can't test break anymore in the user environment because it is the
  8. ; debugger's breakpoint insn. Just pass this test for now.
  9. pass
  10. set_gr_spr tbr,gr7
  11. and_gr_immed -4081,gr7 ; clear tbr.tt
  12. inc_gr_immed 0xff0,gr7 ; break handler
  13. set_bctrlr_0_0 gr7
  14. set_spr_immed 128,lcr
  15. test_spr_bits 0x4,2,0x1,psr ; psr.s is set
  16. test_spr_bits 0x1,0,0x0,psr ; psr.et is clear
  17. set_spr_addr ok1,lr
  18. break
  19. ret:
  20. or_spr_immed 0x00000001,psr ; turn on psr.et
  21. and_spr_immed 0xfffffffb,psr ; turn off psr.s
  22. test_spr_bits 0x4,2,0x0,psr ; psr.s is clear
  23. test_spr_bits 0x1,0,0x1,psr ; psr.et is set
  24. set_spr_addr ok0,lr
  25. break
  26. ret1:
  27. test_spr_bits 0x4,2,0x0,psr ; psr.s is clear
  28. test_spr_bits 0x1,0,0x1,psr ; psr.et is set
  29. pass
  30. ; check interrupt for second break
  31. ok0: test_spr_addr ret1,bpcsr
  32. test_spr_bits 0x1000,12,0x0,bpsr ; bpsr.bs is clear
  33. test_spr_bits 0x0001,0,0x1,bpsr ; bpsr.et is set
  34. test_spr_bits 0x4,2,0x1,psr ; psr.s is set
  35. test_spr_bits 0x1,0,0x0,psr ; psr.et is clear
  36. rett 0 ; nop
  37. rett 1
  38. ; check interrupt for first break
  39. ok1: test_spr_addr ret,bpcsr
  40. test_spr_bits 0x1000,12,0x1,bpsr ; bpsr.bs is set
  41. test_spr_bits 0x0001,0,0x0,bpsr ; bpsr.et is clear
  42. test_spr_bits 0x4,2,0x1,psr ; psr.s is set
  43. test_spr_bits 0x1,0,0x0,psr ; psr.et is clear
  44. rett 0 ; nop
  45. rett 1