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- # frv testcase for fcbgelr $FCCi,$ccond,$hint
- # mach: all
- .include "testutils.inc"
- start
- .global fcbgelr
- fcbgelr:
- ; ccond is true
- set_spr_immed 128,lcr
- set_spr_addr bad,lr
- set_fcc 0x0 0
- fcbgelr fcc0,0,0
- set_spr_addr bad,lr
- set_fcc 0x1 1
- fcbgelr fcc1,0,1
- set_spr_addr ok3,lr
- set_fcc 0x2 2
- fcbgelr fcc2,0,2
- fail
- ok3:
- set_spr_addr ok4,lr
- set_fcc 0x3 3
- fcbgelr fcc3,0,3
- fail
- ok4:
- set_spr_addr bad,lr
- set_fcc 0x4 0
- fcbgelr fcc0,0,0
- set_spr_addr bad,lr
- set_fcc 0x5 1
- fcbgelr fcc1,0,1
- set_spr_addr ok7,lr
- set_fcc 0x6 2
- fcbgelr fcc2,0,2
- fail
- ok7:
- set_spr_addr ok8,lr
- set_fcc 0x7 3
- fcbgelr fcc3,0,3
- fail
- ok8:
- set_spr_addr ok9,lr
- set_fcc 0x8 0
- fcbgelr fcc0,0,0
- fail
- ok9:
- set_spr_addr oka,lr
- set_fcc 0x9 1
- fcbgelr fcc1,0,1
- fail
- oka:
- set_spr_addr okb,lr
- set_fcc 0xa 2
- fcbgelr fcc2,0,2
- fail
- okb:
- set_spr_addr okc,lr
- set_fcc 0xb 3
- fcbgelr fcc3,0,3
- fail
- okc:
- set_spr_addr okd,lr
- set_fcc 0xc 0
- fcbgelr fcc0,0,0
- fail
- okd:
- set_spr_addr oke,lr
- set_fcc 0xd 1
- fcbgelr fcc1,0,1
- fail
- oke:
- set_spr_addr okf,lr
- set_fcc 0xe 2
- fcbgelr fcc2,0,2
- fail
- okf:
- set_spr_addr okg,lr
- set_fcc 0xf 3
- fcbgelr fcc3,0,3
- fail
- okg:
- ; ccond is true
- set_spr_immed 1,lcr
- set_spr_addr bad,lr
- set_fcc 0x0 0
- fcbgelr fcc0,1,0
- set_spr_immed 1,lcr
- set_spr_addr bad,lr
- set_fcc 0x1 1
- fcbgelr fcc1,1,1
- set_spr_immed 1,lcr
- set_spr_addr okj,lr
- set_fcc 0x2 2
- fcbgelr fcc2,1,2
- fail
- okj:
- set_spr_immed 1,lcr
- set_spr_addr okk,lr
- set_fcc 0x3 3
- fcbgelr fcc3,1,3
- fail
- okk:
- set_spr_immed 1,lcr
- set_spr_addr bad,lr
- set_fcc 0x4 0
- fcbgelr fcc0,1,0
- set_spr_immed 1,lcr
- set_spr_addr bad,lr
- set_fcc 0x5 1
- fcbgelr fcc1,1,1
- set_spr_immed 1,lcr
- set_spr_addr okn,lr
- set_fcc 0x6 2
- fcbgelr fcc2,1,2
- fail
- okn:
- set_spr_immed 1,lcr
- set_spr_addr oko,lr
- set_fcc 0x7 3
- fcbgelr fcc3,1,3
- fail
- oko:
- set_spr_immed 1,lcr
- set_spr_addr okp,lr
- set_fcc 0x8 0
- fcbgelr fcc0,1,0
- fail
- okp:
- set_spr_immed 1,lcr
- set_spr_addr okq,lr
- set_fcc 0x9 1
- fcbgelr fcc1,1,1
- fail
- okq:
- set_spr_immed 1,lcr
- set_spr_addr okr,lr
- set_fcc 0xa 2
- fcbgelr fcc2,1,2
- fail
- okr:
- set_spr_immed 1,lcr
- set_spr_addr oks,lr
- set_fcc 0xb 3
- fcbgelr fcc3,1,3
- fail
- oks:
- set_spr_immed 1,lcr
- set_spr_addr okt,lr
- set_fcc 0xc 0
- fcbgelr fcc0,1,0
- fail
- okt:
- set_spr_immed 1,lcr
- set_spr_addr oku,lr
- set_fcc 0xd 1
- fcbgelr fcc1,1,1
- fail
- oku:
- set_spr_immed 1,lcr
- set_spr_addr okv,lr
- set_fcc 0xe 2
- fcbgelr fcc2,1,2
- fail
- okv:
- set_spr_immed 1,lcr
- set_spr_addr okw,lr
- set_fcc 0xf 3
- fcbgelr fcc3,1,3
- fail
- okw:
- ; ccond is false
- set_spr_immed 128,lcr
- set_fcc 0x0 0
- fcbgelr fcc0,1,0
- set_fcc 0x1 1
- fcbgelr fcc1,1,1
- set_fcc 0x2 2
- fcbgelr fcc2,1,2
- set_fcc 0x3 3
- fcbgelr fcc3,1,3
- set_fcc 0x4 0
- fcbgelr fcc0,1,0
- set_fcc 0x5 1
- fcbgelr fcc1,1,1
- set_fcc 0x6 2
- fcbgelr fcc2,1,2
- set_fcc 0x7 3
- fcbgelr fcc3,1,3
- set_fcc 0x8 0
- fcbgelr fcc0,1,0
- set_fcc 0x9 1
- fcbgelr fcc1,1,1
- set_fcc 0xa 2
- fcbgelr fcc2,1,2
- set_fcc 0xb 3
- fcbgelr fcc3,1,3
- set_fcc 0xc 0
- fcbgelr fcc0,1,0
- set_fcc 0xd 1
- fcbgelr fcc1,1,1
- set_fcc 0xe 2
- fcbgelr fcc2,1,2
- set_fcc 0xf 3
- fcbgelr fcc3,1,3
- ; ccond is false
- set_spr_immed 1,lcr
- set_fcc 0x0 0
- fcbgelr fcc0,0,0
- set_spr_immed 1,lcr
- set_fcc 0x1 1
- fcbgelr fcc1,0,1
- set_spr_immed 1,lcr
- set_fcc 0x2 2
- fcbgelr fcc2,0,2
- set_spr_immed 1,lcr
- set_fcc 0x3 3
- fcbgelr fcc3,0,3
- set_spr_immed 1,lcr
- set_fcc 0x4 0
- fcbgelr fcc0,0,0
- set_spr_immed 1,lcr
- set_fcc 0x5 1
- fcbgelr fcc1,0,1
- set_spr_immed 1,lcr
- set_fcc 0x6 2
- fcbgelr fcc2,0,2
- set_spr_immed 1,lcr
- set_fcc 0x7 3
- fcbgelr fcc3,0,3
- set_spr_immed 1,lcr
- set_fcc 0x8 0
- fcbgelr fcc0,0,0
- set_spr_immed 1,lcr
- set_fcc 0x9 1
- fcbgelr fcc1,0,1
- set_spr_immed 1,lcr
- set_fcc 0xa 2
- fcbgelr fcc2,0,2
- set_spr_immed 1,lcr
- set_fcc 0xb 3
- fcbgelr fcc3,0,3
- set_spr_immed 1,lcr
- set_fcc 0xc 0
- fcbgelr fcc0,0,0
- set_spr_immed 1,lcr
- set_fcc 0xd 1
- fcbgelr fcc1,0,1
- set_spr_immed 1,lcr
- set_fcc 0xe 2
- fcbgelr fcc2,0,2
- set_spr_immed 1,lcr
- set_fcc 0xf 3
- fcbgelr fcc3,0,3
- pass
- bad:
- fail
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