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fcbltlr.cgs

fcbltlr.cgs 3.9 KB
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  1. # frv testcase for fcbltlr $FCCi,$ccond,$hint
    2. 

  2. # mach: all
    3. 

  3. 

  4. 	.include "testutils.inc"
    5. 

  5. 

  6. 	start
    7. 

  7. 

  8. 	.global fcbltlr
    9. 

  9. fcbltlr:
    10. 

  10. 	; ccond is true
    11. 

  11. 	set_spr_immed	128,lcr
    12. 

  12. 	set_spr_addr	bad,lr
    13. 

  13. 	set_fcc		0x0 0
    14. 

  14. 	fcbltlr		fcc0,0,0
    15. 

  15. 

  16. 	set_spr_addr	bad,lr
    17. 

  17. 	set_fcc		0x1 1
    18. 

  18. 	fcbltlr		fcc1,0,1
    19. 

  19. 

  20. 	set_spr_addr	bad,lr
    21. 

  21. 	set_fcc		0x2 2
    22. 

  22. 	fcbltlr		fcc2,0,2
    23. 

  23. 

  24. 	set_spr_addr	bad,lr
    25. 

  25. 	set_fcc		0x3 3
    26. 

  26. 	fcbltlr		fcc3,0,3
    27. 

  27. 

  28. 	set_spr_addr	ok5,lr
    29. 

  29. 	set_fcc		0x4 0
    30. 

  30. 	fcbltlr		fcc0,0,0
    31. 

  31. 	fail
    32. 

  32. ok5:
    33. 

  33. 	set_spr_addr	ok6,lr
    34. 

  34. 	set_fcc		0x5 1
    35. 

  35. 	fcbltlr		fcc1,0,1
    36. 

  36. 	fail
    37. 

  37. ok6:
    38. 

  38. 	set_spr_addr	ok7,lr
    39. 

  39. 	set_fcc		0x6 2
    40. 

  40. 	fcbltlr		fcc2,0,2
    41. 

  41. 	fail
    42. 

  42. ok7:
    43. 

  43. 	set_spr_addr	ok8,lr
    44. 

  44. 	set_fcc		0x7 3
    45. 

  45. 	fcbltlr		fcc3,0,3
    46. 

  46. 	fail
    47. 

  47. ok8:
    48. 

  48. 	set_spr_addr	bad,lr
    49. 

  49. 	set_fcc		0x8 0
    50. 

  50. 	fcbltlr		fcc0,0,0
    51. 

  51. 

  52. 	set_spr_addr	bad,lr
    53. 

  53. 	set_fcc		0x9 1
    54. 

  54. 	fcbltlr		fcc1,0,1
    55. 

  55. 

  56. 	set_spr_addr	bad,lr
    57. 

  57. 	set_fcc		0xa 2
    58. 

  58. 	fcbltlr		fcc2,0,2
    59. 

  59. 

  60. 	set_spr_addr	bad,lr
    61. 

  61. 	set_fcc		0xb 3
    62. 

  62. 	fcbltlr		fcc3,0,3
    63. 

  63. 

  64. 	set_spr_addr	okd,lr
    65. 

  65. 	set_fcc		0xc 0
    66. 

  66. 	fcbltlr		fcc0,0,0
    67. 

  67. 	fail
    68. 

  68. okd:
    69. 

  69. 	set_spr_addr	oke,lr
    70. 

  70. 	set_fcc		0xd 1
    71. 

  71. 	fcbltlr		fcc1,0,1
    72. 

  72. 	fail
    73. 

  73. oke:
    74. 

  74. 	set_spr_addr	okf,lr
    75. 

  75. 	set_fcc		0xe 2
    76. 

  76. 	fcbltlr		fcc2,0,2
    77. 

  77. 	fail
    78. 

  78. okf:
    79. 

  79. 	set_spr_addr	okg,lr
    80. 

  80. 	set_fcc		0xf 3
    81. 

  81. 	fcbltlr		fcc3,0,3
    82. 

  82. 	fail
    83. 

  83. okg:
    84. 

  84. 

  85. 	; ccond is true
    86. 

  86. 	set_spr_immed	1,lcr
    87. 

  87. 	set_spr_addr	bad,lr
    88. 

  88. 	set_fcc		0x0 0
    89. 

  89. 	fcbltlr		fcc0,1,0
    90. 

  90. 

  91. 	set_spr_immed	1,lcr
    92. 

  92. 	set_spr_addr	bad,lr
    93. 

  93. 	set_fcc		0x1 1
    94. 

  94. 	fcbltlr		fcc1,1,1
    95. 

  95. 

  96. 	set_spr_immed	1,lcr
    97. 

  97. 	set_spr_addr	bad,lr
    98. 

  98. 	set_fcc		0x2 2
    99. 

  99. 	fcbltlr		fcc2,1,2
    100. 

  100. 

  101. 	set_spr_immed	1,lcr
    102. 

  102. 	set_spr_addr	bad,lr
    103. 

  103. 	set_fcc		0x3 3
    104. 

  104. 	fcbltlr		fcc3,1,3
    105. 

  105. 

  106. 	set_spr_immed	1,lcr
    107. 

  107. 	set_spr_addr	okl,lr
    108. 

  108. 	set_fcc		0x4 0
    109. 

  109. 	fcbltlr		fcc0,1,0
    110. 

  110. 	fail
    111. 

  111. okl:
    112. 

  112. 	set_spr_immed	1,lcr
    113. 

  113. 	set_spr_addr	okm,lr
    114. 

  114. 	set_fcc		0x5 1
    115. 

  115. 	fcbltlr		fcc1,1,1
    116. 

  116. 	fail
    117. 

  117. okm:
    118. 

  118. 	set_spr_immed	1,lcr
    119. 

  119. 	set_spr_addr	okn,lr
    120. 

  120. 	set_fcc		0x6 2
    121. 

  121. 	fcbltlr		fcc2,1,2
    122. 

  122. 	fail
    123. 

  123. okn:
    124. 

  124. 	set_spr_immed	1,lcr
    125. 

  125. 	set_spr_addr	oko,lr
    126. 

  126. 	set_fcc		0x7 3
    127. 

  127. 	fcbltlr		fcc3,1,3
    128. 

  128. 	fail
    129. 

  129. oko:
    130. 

  130. 	set_spr_immed	1,lcr
    131. 

  131. 	set_spr_addr	bad,lr
    132. 

  132. 	set_fcc		0x8 0
    133. 

  133. 	fcbltlr		fcc0,1,0
    134. 

  134. 

  135. 	set_spr_immed	1,lcr
    136. 

  136. 	set_spr_addr	bad,lr
    137. 

  137. 	set_fcc		0x9 1
    138. 

  138. 	fcbltlr		fcc1,1,1
    139. 

  139. 

  140. 	set_spr_immed	1,lcr
    141. 

  141. 	set_spr_addr	bad,lr
    142. 

  142. 	set_fcc		0xa 2
    143. 

  143. 	fcbltlr		fcc2,1,2
    144. 

  144. 

  145. 	set_spr_immed	1,lcr
    146. 

  146. 	set_spr_addr	bad,lr
    147. 

  147. 	set_fcc		0xb 3
    148. 

  148. 	fcbltlr		fcc3,1,3
    149. 

  149. 

  150. 	set_spr_immed	1,lcr
    151. 

  151. 	set_spr_addr	okt,lr
    152. 

  152. 	set_fcc		0xc 0
    153. 

  153. 	fcbltlr		fcc0,1,0
    154. 

  154. 	fail
    155. 

  155. okt:
    156. 

  156. 	set_spr_immed	1,lcr
    157. 

  157. 	set_spr_addr	oku,lr
    158. 

  158. 	set_fcc		0xd 1
    159. 

  159. 	fcbltlr		fcc1,1,1
    160. 

  160. 	fail
    161. 

  161. oku:
    162. 

  162. 	set_spr_immed	1,lcr
    163. 

  163. 	set_spr_addr	okv,lr
    164. 

  164. 	set_fcc		0xe 2
    165. 

  165. 	fcbltlr		fcc2,1,2
    166. 

  166. 	fail
    167. 

  167. okv:
    168. 

  168. 	set_spr_immed	1,lcr
    169. 

  169. 	set_spr_addr	okw,lr
    170. 

  170. 	set_fcc		0xf 3
    171. 

  171. 	fcbltlr		fcc3,1,3
    172. 

  172. 	fail
    173. 

  173. okw:
    174. 

  174. 	; ccond is false
    175. 

  175. 	set_spr_immed	128,lcr
    176. 

  176. 

  177. 	set_fcc		0x0 0
    178. 

  178. 	fcbltlr	fcc0,1,0
    179. 

  179. 	set_fcc		0x1 1
    180. 

  180. 	fcbltlr	fcc1,1,1
    181. 

  181. 	set_fcc		0x2 2
    182. 

  182. 	fcbltlr	fcc2,1,2
    183. 

  183. 	set_fcc		0x3 3
    184. 

  184. 	fcbltlr	fcc3,1,3
    185. 

  185. 	set_fcc		0x4 0
    186. 

  186. 	fcbltlr	fcc0,1,0
    187. 

  187. 	set_fcc		0x5 1
    188. 

  188. 	fcbltlr	fcc1,1,1
    189. 

  189. 	set_fcc		0x6 2
    190. 

  190. 	fcbltlr	fcc2,1,2
    191. 

  191. 	set_fcc		0x7 3
    192. 

  192. 	fcbltlr	fcc3,1,3
    193. 

  193. 	set_fcc		0x8 0
    194. 

  194. 	fcbltlr	fcc0,1,0
    195. 

  195. 	set_fcc		0x9 1
    196. 

  196. 	fcbltlr	fcc1,1,1
    197. 

  197. 	set_fcc		0xa 2
    198. 

  198. 	fcbltlr	fcc2,1,2
    199. 

  199. 	set_fcc		0xb 3
    200. 

  200. 	fcbltlr	fcc3,1,3
    201. 

  201. 	set_fcc		0xc 0
    202. 

  202. 	fcbltlr	fcc0,1,0
    203. 

  203. 	set_fcc		0xd 1
    204. 

  204. 	fcbltlr	fcc1,1,1
    205. 

  205. 	set_fcc		0xe 2
    206. 

  206. 	fcbltlr	fcc2,1,2
    207. 

  207. 	set_fcc		0xf 3
    208. 

  208. 	fcbltlr	fcc3,1,3
    209. 

  209. 

  210. 	; ccond is false
    211. 

  211. 	set_spr_immed	1,lcr
    212. 

  212. 	set_fcc		0x0 0
    213. 

  213. 	fcbltlr	fcc0,0,0
    214. 

  214. 	set_spr_immed	1,lcr
    215. 

  215. 	set_fcc		0x1 1
    216. 

  216. 	fcbltlr	fcc1,0,1
    217. 

  217. 	set_spr_immed	1,lcr
    218. 

  218. 	set_fcc		0x2 2
    219. 

  219. 	fcbltlr	fcc2,0,2
    220. 

  220. 	set_spr_immed	1,lcr
    221. 

  221. 	set_fcc		0x3 3
    222. 

  222. 	fcbltlr	fcc3,0,3
    223. 

  223. 	set_spr_immed	1,lcr
    224. 

  224. 	set_fcc		0x4 0
    225. 

  225. 	fcbltlr	fcc0,0,0
    226. 

  226. 	set_spr_immed	1,lcr
    227. 

  227. 	set_fcc		0x5 1
    228. 

  228. 	fcbltlr	fcc1,0,1
    229. 

  229. 	set_spr_immed	1,lcr
    230. 

  230. 	set_fcc		0x6 2
    231. 

  231. 	fcbltlr	fcc2,0,2
    232. 

  232. 	set_spr_immed	1,lcr
    233. 

  233. 	set_fcc		0x7 3
    234. 

  234. 	fcbltlr	fcc3,0,3
    235. 

  235. 	set_spr_immed	1,lcr
    236. 

  236. 	set_fcc		0x8 0
    237. 

  237. 	fcbltlr	fcc0,0,0
    238. 

  238. 	set_spr_immed	1,lcr
    239. 

  239. 	set_fcc		0x9 1
    240. 

  240. 	fcbltlr	fcc1,0,1
    241. 

  241. 	set_spr_immed	1,lcr
    242. 

  242. 	set_fcc		0xa 2
    243. 

  243. 	fcbltlr	fcc2,0,2
    244. 

  244. 	set_spr_immed	1,lcr
    245. 

  245. 	set_fcc		0xb 3
    246. 

  246. 	fcbltlr	fcc3,0,3
    247. 

  247. 	set_spr_immed	1,lcr
    248. 

  248. 	set_fcc		0xc 0
    249. 

  249. 	fcbltlr	fcc0,0,0
    250. 

  250. 	set_spr_immed	1,lcr
    251. 

  251. 	set_fcc		0xd 1
    252. 

  252. 	fcbltlr	fcc1,0,1
    253. 

  253. 	set_spr_immed	1,lcr
    254. 

  254. 	set_fcc		0xe 2
    255. 

  255. 	fcbltlr	fcc2,0,2
    256. 

  256. 	set_spr_immed	1,lcr
    257. 

  257. 	set_fcc		0xf 3
    258. 

  258. 	fcbltlr	fcc3,0,3
    259. 

  259. 

  260. 	pass
    261. 

  261. bad:
    262. 

  262. 	fail
    263.