sdiv.cgs 1.7 KB

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  1. # frv testcase for sdiv $GRi,$GRj,$GRk
  2. # mach: all
  3. .include "../testutils.inc"
  4. start
  5. .global sdiv
  6. sdiv:
  7. ; simple division 12 / 3
  8. set_gr_immed 3,gr3
  9. set_gr_immed 12,gr1
  10. sdiv gr1,gr3,gr2
  11. test_gr_immed 4,gr2
  12. ; Random example
  13. set_gr_limmed 0x0123,0x4567,gr3
  14. set_gr_limmed 0xfedc,0xba98,gr1
  15. sdiv gr1,gr3,gr2
  16. test_gr_immed -1,gr2
  17. ; Special case from the Arch Spec Vol 2
  18. or_spr_immed 0x20,isr ; turn on isr.edem
  19. set_gr_immed -1,gr3
  20. set_gr_limmed 0x8000,0x0000,gr1
  21. sdiv gr1,gr3,gr2
  22. test_gr_limmed 0x7fff,0xffff,gr2
  23. test_spr_bits 0x4,2,1,isr ; isr.aexc is set
  24. and_spr_immed -33,isr ; turn off isr.edem
  25. ; set up exception handler
  26. set_psr_et 1
  27. and_spr_immed -4081,tbr ; clear tbr.tt
  28. set_gr_spr tbr,gr17
  29. inc_gr_immed 0x170,gr17 ; address of exception handler
  30. set_bctrlr_0_0 gr17
  31. set_spr_immed 128,lcr
  32. set_gr_immed 0,gr15
  33. ; divide will cause overflow
  34. set_spr_addr ok1,lr
  35. set_gr_immed -1,gr3
  36. set_gr_limmed 0x8000,0x0000,gr1
  37. e1: sdiv gr1,gr3,gr2 ; overflow
  38. test_gr_immed 1,gr15
  39. test_gr_limmed 0x8000,0x0000,gr2; gr2 updated
  40. ; divide by zero
  41. set_spr_addr ok2,lr
  42. set_gr_immed 0xdeadbeef,gr2
  43. e2: sdiv gr1,gr0,gr2 ; divide by zero
  44. test_gr_immed 2,gr15 ; handler called
  45. test_gr_immed 0xdeadbeef,gr2 ; gr2 not updated.
  46. pass
  47. ok1: ; exception handler for overflow
  48. test_spr_bits 0x18,3,0x2,isr ; isr.dtt is set
  49. test_spr_bits 0x0001,0,0x1,esr0 ; esr0 is valid
  50. test_spr_bits 0x003e,1,0x13,esr0 ; esr0.ec is set
  51. inc_gr_immed 1,gr15
  52. rett 0
  53. fail
  54. ok2: ; exception handler for divide by zero
  55. test_spr_bits 0x18,3,0x3,isr ; isr.dtt is set
  56. test_spr_bits 0x0001,0,0x1,esr0 ; esr0 is valid
  57. test_spr_bits 0x003e,1,0x13,esr0 ; esr0.ec is set
  58. inc_gr_immed 1,gr15
  59. rett 0
  60. fail