123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319 |
- # Hitachi H8 testcase 'mov.b'
- # mach(): h8300h h8300s h8sx
- # as(h8300h): --defsym sim_cpu=1
- # as(h8300s): --defsym sim_cpu=2
- # as(h8sx): --defsym sim_cpu=3
- # ld(h8300h): -m h8300helf
- # ld(h8300s): -m h8300self
- # ld(h8sx): -m h8300sxelf
- .include "testutils.inc"
- start
- .data
- .align 4
- byte_dst_dec:
- .byte 0
- byte_src:
- .byte 0x77
- byte_dst:
- .byte 0
- .text
- ;;
- ;; Move byte from immediate source
- ;;
- .if (sim_cpu == h8sx)
- mov_b_imm8_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, rd
- mov.b #0x77:8, r0l ; Immediate 3-bit operand
- ;;; .word 0xf877
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_gr_a5a5 1 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .endif
- .if (sim_cpu == h8sx)
- mov_b_imm4_to_abs16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:4, @aa:16
- mov.b #0xf:4, @byte_dst:16 ; 16-bit address-direct operand
- ;;; .word 0x6adf
- ;;; .word @byte_dst
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
- test_gr_a5a5 1 ; (first, because on h8/300 we must use one
- test_gr_a5a5 2 ; to examine the destination memory).
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xf, @byte_dst
- beq .Lnext21
- fail
- .Lnext21:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm4_to_abs32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:4, @aa:32
- mov.b #0xf:4, @byte_dst:32 ; 32-bit address-direct operand
- ;;; .word 0x6aff
- ;;; .long @byte_dst
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
- test_gr_a5a5 1 ; (first, because on h8/300 we must use one
- test_gr_a5a5 2 ; to examine the destination memory).
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xf, @byte_dst
- beq .Lnext22
- fail
- .Lnext22:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indirect:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @erd
- mov.l #byte_dst, er1
- mov.b #0xa5:8, @er1 ; Register indirect operand
- ;;; .word 0x017d
- ;;; .word 0x01a5
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext1
- fail
- .Lnext1:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_postinc: ; post-increment from imm8 to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @erd+
- mov.l #byte_dst, er1
- mov.b #0xa5:8, @er1+ ; Imm8, register post-incr operands.
- ;;; .word 0x017d
- ;;; .word 0x81a5
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst+1, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext2
- fail
- .Lnext2:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_postdec: ; post-decrement from imm8 to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @erd-
- mov.l #byte_dst, er1
- mov.b #0xa5:8, @er1- ; Imm8, register post-decr operands.
- ;;; .word 0x017d
- ;;; .word 0xa1a5
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst-1, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext3
- fail
- .Lnext3:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_preinc: ; pre-increment from register to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @+erd
- mov.l #byte_dst-1, er1
- mov.b #0xa5:8, @+er1 ; Imm8, register pre-incr operands
- ;;; .word 0x017d
- ;;; .word 0x91a5
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext4
- fail
- .Lnext4:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_predec: ; pre-decrement from register to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @-erd
- mov.l #byte_dst+1, er1
- mov.b #0xa5:8, @-er1 ; Imm8, register pre-decr operands
- ;;; .word 0x017d
- ;;; .word 0xb1a5
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext5
- fail
- .Lnext5:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_disp2:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:2, erd)
- mov.l #byte_dst-3, er1
- mov.b #0xa5:8, @(3:2, er1) ; Imm8, reg plus 2-bit disp. operand
- ;;; .word 0x017d
- ;;; .word 0x31a5
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst-3, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext6
- fail
- .Lnext6:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_disp16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:16, erd)
- mov.l #byte_dst-4, er1
- mov.b #0xa5:8, @(4:16, er1) ; Register plus 16-bit disp. operand
- ;;; .word 0x017d
- ;;; .word 0x6f90
- ;;; .word 0x0004
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst-4, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext7
- fail
- .Lnext7:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_disp32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:32, erd)
- mov.l #byte_dst-8, er1
- mov.b #0xa5:8, @(8:32, er1) ; Register plus 32-bit disp. operand
- ;;; .word 0x017d
- ;;; .word 0xc9a5
- ;;; .long 8
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst-8, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext8
- fail
- .Lnext8:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indexb16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff01, er1
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:16, rd.b)
- mov.b #0xa5:8, @(byte_dst-1:16, r1.b) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 0xffffff01, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indexw16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0002, er1
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:16, rd.w)
- mov.b #0xa5:8, @(byte_dst-2:16, r1.w) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 0xffff0002, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indexl16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000003, er1
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:16, erd.l)
- mov.b #0xa5:8, @(byte_dst-3:16, er1.l) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 0x00000003, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indexb32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff04, er1
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:32, rd.b)
- mov.b #0xa5:8, @(byte_dst-4:32, r1.b) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 0xffffff04 er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indexw32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0005, er1
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:32, rd.w)
- mov.b #0xa5:8, @(byte_dst-5:32, r1.w) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 0xffff0005 er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_indexl32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000006, er1
- set_ccr_zero
- ;; mov.b #xx:8, @(dd:32, erd.l)
- mov.b #0xa5:8, @(byte_dst-6:32, er1.l) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 0x00000006 er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_abs16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @aa:16
- mov.b #0xa5:8, @byte_dst:16 ; 16-bit address-direct operand
- ;;; .word 0x017d
- ;;; .word 0x40a5
- ;;; .word @byte_dst
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
- test_gr_a5a5 1 ; (first, because on h8/300 we must use one
- test_gr_a5a5 2 ; to examine the destination memory).
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext9
- fail
- .Lnext9:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_imm8_to_abs32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b #xx:8, @aa:32
- mov.b #0xa5:8, @byte_dst:32 ; 32-bit address-direct operand
- ;;; .word 0x017d
- ;;; .word 0x48a5
- ;;; .long @byte_dst
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
- test_gr_a5a5 1 ; (first, because on h8/300 we must use one
- test_gr_a5a5 2 ; to examine the destination memory).
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b #0xa5, @byte_dst
- beq .Lnext10
- fail
- .Lnext10:
- mov.b #0, @byte_dst ; zero it again for the next use.
- .endif
- ;;
- ;; Move byte from register source
- ;;
- mov_b_reg8_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, erd
- mov.b #0x12, r1l
- mov.b r1l, r0l ; Register 8-bit operand
- ;;; .word 0x0c98
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr16 0xa512 r0
- test_h_gr16 0xa512 r1 ; mov src unchanged
- .if (sim_cpu)
- test_h_gr32 0xa5a5a512 er0
- test_h_gr32 0xa5a5a512 er1 ; mov src unchanged
- .endif
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_reg8_to_indirect:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @erd
- mov.l #byte_dst, er1
- mov.b r0l, @er1 ; Register indirect operand
- ;;; .word 0x6898
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- mov.b @byte_dst, r0l
- cmp.b r2l, r0l
- beq .Lnext44
- fail
- .Lnext44:
- mov.b #0, r0l
- mov.b r0l, @byte_dst ; zero it again for the next use.
- .if (sim_cpu == h8sx)
- mov_b_reg8_to_postinc: ; post-increment from register to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @erd+
- mov.l #byte_dst, er1
- mov.b r0l, @er1+ ; Register post-incr operand
- ;;; .word 0x0173
- ;;; .word 0x6c98
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst+1, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b r2l, @byte_dst
- beq .Lnext49
- fail
- .Lnext49:
- ;; special case same register
- mov.l #byte_dst, er0
- mov.b r0l, r1l
- inc.b r1l
- mov.b r0l, @er0+
- mov.b @byte_dst, r0l
- cmp.b r0l, r1l
- beq .Lnext53
- fail
- .Lnext53:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_postdec: ; post-decrement from register to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @erd-
- mov.l #byte_dst, er1
- mov.b r0l, @er1- ; Register post-decr operand
- ;;; .word 0x0171
- ;;; .word 0x6c98
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst-1, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b r2l, @byte_dst
- beq .Lnext50
- fail
- .Lnext50:
- ;; special case same register
- mov.l #byte_dst, er0
- mov.b r0l, r1l
- dec.b r1l
- mov.b r0l, @er0-
- mov.b @byte_dst, r0l
- cmp.b r0l, r1l
- beq .Lnext54
- fail
- .Lnext54:
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_preinc: ; pre-increment from register to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @+erd
- mov.l #byte_dst-1, er1
- mov.b r0l, @+er1 ; Register pre-incr operand
- ;;; .word 0x0172
- ;;; .word 0x6c98
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b r2l, @byte_dst
- beq .Lnext51
- fail
- .Lnext51:
- ;; special case same register
- mov.l #byte_dst-1, er0
- mov.b r0l, r1l
- inc.b r1l
- mov.b r0l, @+er0
- mov.b @byte_dst, r0l
- cmp.b r0l, r1l
- beq .Lnext55
- fail
- .Lnext55:
- mov.b #0, @byte_dst ; zero it again for the next use.
- .endif
- mov_b_reg8_to_predec: ; pre-decrement from register to mem
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @-erd
- mov.l #byte_dst+1, er1
- mov.b r0l, @-er1 ; Register pre-decr operand
- ;;; .word 0x6c98
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- mov.b @byte_dst, r0l
- cmp.b r2l, r0l
- beq .Lnext48
- fail
- .Lnext48:
- ;; Special case in same register
- ;; CCR confirmation omitted
- mov.l #byte_dst+1, er1
- mov.l er1, er0
- dec.b r1l
- mov.b r0l, @-er0
- mov.b @byte_dst, r0l
- cmp.b r1l, r0l
- beq .Lnext47
- fail
- .Lnext47:
- mov.b #0, r0l
- mov.b r0l, @byte_dst ; zero it again for the next use.
- .if (sim_cpu == h8sx)
- mov_b_reg8_to_disp2:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @(dd:2, erd)
- mov.l #byte_dst-3, er1
- mov.b r0l, @(3:2, er1) ; Register plus 2-bit disp. operand
- ;;; .word 0x0173
- ;;; .word 0x6898
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_h_gr32 byte_dst-3, er1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b r2l, @byte_dst
- beq .Lnext52
- fail
- .Lnext52:
- mov.b #0, @byte_dst ; zero it again for the next use.
- .endif
- mov_b_reg8_to_disp16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @(dd:16, erd)
- mov.l #byte_dst-4, er1
- mov.b r0l, @(4:16, er1) ; Register plus 16-bit disp. operand
- ;;; .word 0x6e98
- ;;; .word 0x0004
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 byte_dst-4, er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- mov.b @byte_dst, r0l
- cmp.b r2l, r0l
- beq .Lnext45
- fail
- .Lnext45:
- mov.b #0, r0l
- mov.b r0l, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_disp32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @(dd:32, erd)
- mov.l #byte_dst-8, er1
- mov.b r0l, @(8:32, er1) ; Register plus 32-bit disp. operand
- ;;; .word 0x7810
- ;;; .word 0x6aa8
- ;;; .long 8
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 byte_dst-8, er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- mov.b @byte_dst, r0l
- cmp.b r2l, r0l
- beq .Lnext46
- fail
- .Lnext46:
- mov.b #0, r0l
- mov.b r0l, @byte_dst ; zero it again for the next use.
- .if (sim_cpu == h8sx)
- mov_b_reg8_to_indexb16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff01, er1
- set_ccr_zero
- ;; mov.b ers, @(dd:16, rd.b)
- mov.b r0l, @(byte_dst-1:16, r1.b) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xffffff01 er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r0l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_indexw16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0002, er1
- set_ccr_zero
- ;; mov.b ers, @(dd:16, rd.w)
- mov.b r0l, @(byte_dst-2:16, r1.w) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xffff0002 er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r0l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_indexl16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000003, er1
- set_ccr_zero
- ;; mov.b ers, @(dd:16, erd.l)
- mov.b r0l, @(byte_dst-3:16, er1.l) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0x00000003 er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r0l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_indexb32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff04 er1
- set_ccr_zero
- ;; mov.b ers, @(dd:32, rd.b)
- mov.b r0l, @(byte_dst-4:32, r1.b) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xffffff04, er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r0l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_indexw32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0005 er1
- set_ccr_zero
- ;; mov.b ers, @(dd:32, rd.w)
- mov.b r0l, @(byte_dst-5:32, r1.w) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xffff0005, er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r0l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_indexl32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000006 er1
- set_ccr_zero
- ;; mov.b ers, @(dd:32, erd.l)
- mov.b r0l, @(byte_dst-6:32, er1.l) ; byte indexed operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0x00000006, er1
- test_gr_a5a5 0 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r0l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- .endif
- .if (sim_cpu == h8sx)
- mov_b_reg8_to_abs8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #byte_dst-20, er0
- ldc er0, sbr
- set_ccr_zero
- ;; mov.b ers, @aa:8
- mov.b r1l, @20:8 ; 8-bit address-direct (sbr-relative) operand
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 byte_dst-20, er0
- test_gr_a5a5 1 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_dst, r1l
- bne fail1
- mov.b #0, @byte_dst ; zero it again for the next use.
- .endif
- mov_b_reg8_to_abs16:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @aa:16
- mov.b r0l, @byte_dst:16 ; 16-bit address-direct operand
- ;;; .word 0x6a88
- ;;; .word @byte_dst
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
- test_gr_a5a5 1 ; (first, because on h8/300 we must use one
- test_gr_a5a5 2 ; to examine the destination memory).
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- mov.b @byte_dst, r0l
- cmp.b r0l, r1l
- beq .Lnext41
- fail
- .Lnext41:
- mov.b #0, r0l
- mov.b r0l, @byte_dst ; zero it again for the next use.
- mov_b_reg8_to_abs32:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b ers, @aa:32
- mov.b r0l, @byte_dst:32 ; 32-bit address-direct operand
- ;;; .word 0x6aa8
- ;;; .long @byte_dst
- ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
- test_neg_set
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
- test_gr_a5a5 1 ; (first, because on h8/300 we must use one
- test_gr_a5a5 2 ; to examine the destination memory).
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- mov.b @byte_dst, r0l
- cmp.b r0l, r1l
- beq .Lnext42
- fail
- .Lnext42:
- mov.b #0, r0l
- mov.b r0l, @byte_dst ; zero it again for the next use.
- ;;
- ;; Move byte to register destination.
- ;;
- mov_b_indirect_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @ers, rd
- mov.l #byte_src, er1
- mov.b @er1, r0l ; Register indirect operand
- ;;; .word 0x6818
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_h_gr32 byte_src, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_postinc_to_reg8: ; post-increment from mem to register
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @ers+, rd
- mov.l #byte_src, er1
- mov.b @er1+, r0l ; Register post-incr operand
- ;;; .word 0x6c18
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_h_gr32 byte_src+1, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .if (sim_cpu == h8sx)
- mov_b_postdec_to_reg8: ; post-decrement from mem to register
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @ers-, rd
- mov.l #byte_src, er1
- mov.b @er1-, r0l ; Register post-decr operand
- ;;; .word 0x0172
- ;;; .word 0x6c18
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_h_gr32 byte_src-1, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_preinc_to_reg8: ; pre-increment from mem to register
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @+ers, rd
- mov.l #byte_src-1, er1
- mov.b @+er1, r0l ; Register pre-incr operand
- ;;; .word 0x0171
- ;;; .word 0x6c18
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_h_gr32 byte_src, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_predec_to_reg8: ; pre-decrement from mem to register
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @-ers, rd
- mov.l #byte_src+1, er1
- mov.b @-er1, r0l ; Register pre-decr operand
- ;;; .word 0x0173
- ;;; .word 0x6c18
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_h_gr32 byte_src, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
-
- mov_b_disp2_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @(dd:2, ers), rd
- mov.l #byte_src-1, er1
- mov.b @(1:2, er1), r0l ; Register plus 2-bit disp. operand
- ;;; .word 0x0171
- ;;; .word 0x6818
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
- test_h_gr32 byte_src-1, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .endif
- mov_b_disp16_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @(dd:16, ers), rd
- mov.l #byte_src+0x1234, er1
- mov.b @(-0x1234:16, er1), r0l ; Register plus 16-bit disp. operand
- ;;; .word 0x6e18
- ;;; .word -0x1234
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
- test_h_gr32 byte_src+0x1234, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_disp32_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @(dd:32, ers), rd
- mov.l #byte_src+65536, er1
- mov.b @(-65536:32, er1), r0l ; Register plus 32-bit disp. operand
- ;;; .word 0x7810
- ;;; .word 0x6a28
- ;;; .long -65536
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
- test_h_gr32 byte_src+65536, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .if (sim_cpu == h8sx)
- mov_b_indexb16_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff01, er1
- set_ccr_zero
- ;; mov.b @(dd:16, rs.b), rd
- mov.b @(byte_src-1:16, r1.b), r0l ; indexed byte operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5a5 | 77
- test_h_gr32 0xffffff01, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_indexw16_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0002, er1
- set_ccr_zero
- ;; mov.b @(dd:16, rs.w), rd
- mov.b @(byte_src-2:16, r1.w), r0l ; indexed byte operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5a5 | 77
- test_h_gr32 0xffff0002, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_indexl16_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000003, er1
- set_ccr_zero
- ;; mov.b @(dd:16, ers.l), rd
- mov.b @(byte_src-3:16, er1.l), r0l ; indexed byte operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5a5 | 77
- test_h_gr32 0x00000003, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_indexb32_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff04, er1
- set_ccr_zero
- ;; mov.b @(dd:32, rs.b), rd
- mov.b @(byte_src-4:32, r1.b), r0l ; indexed byte operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
- test_h_gr32 0xffffff04 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_indexw32_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0005, er1
- set_ccr_zero
- ;; mov.b @(dd:32, rs.w), rd
- mov.b @(byte_src-5:32, r1.w), r0l ; indexed byte operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
- test_h_gr32 0xffff0005 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_indexl32_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000006, er1
- set_ccr_zero
- ;; mov.b @(dd:32, ers.l), rd
- mov.b @(byte_src-6:32, er1.l), r0l ; indexed byte operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
- test_h_gr32 0x00000006 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .endif
- .if (sim_cpu == h8sx)
- mov_b_abs8_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #byte_src-255, er1
- ldc er1, sbr
- set_ccr_zero
- ;; mov.b @aa:8, rd
- mov.b @0xff:8, r0l ; 8-bit (sbr relative) address-direct operand
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_h_gr32 byte_src-255, er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .endif
- mov_b_abs16_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @aa:16, rd
- mov.b @byte_src:16, r0l ; 16-bit address-direct operand
- ;;; .word 0x6a08
- ;;; .word @byte_src
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_gr_a5a5 1 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- mov_b_abs32_to_reg8:
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @aa:32, rd
- mov.b @byte_src:32, r0l ; 32-bit address-direct operand
- ;;; .word 0x6a28
- ;;; .long @byte_src
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_h_gr32 0xa5a5a577 er0
- test_gr_a5a5 1 ; Make sure other general regs not disturbed
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- .if (sim_cpu == h8sx)
- ;;
- ;; Move byte from memory to memory
- ;;
- mov_b_indirect_to_indirect: ; reg indirect, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @ers, @erd
- mov.l #byte_src, er1
- mov.l #byte_dst, er0
- mov.b @er1, @er0
- ;;; .word 0x0178
- ;;; .word 0x0100
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst er0
- test_h_gr32 byte_src er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext56
- fail
- .Lnext56:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext57
- fail
- .Lnext57: ; OK, pass on.
- mov_b_postinc_to_postinc: ; reg post-increment, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @ers+, @erd+
- mov.l #byte_src, er1
- mov.l #byte_dst, er0
- mov.b @er1+, @er0+
- ;;; .word 0x0178
- ;;; .word 0x8180
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst+1 er0
- test_h_gr32 byte_src+1 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext65
- fail
- .Lnext65:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext66
- fail
- .Lnext66: ; OK, pass on.
- ;; special case same register
- mov.l #byte_src, er0
- mov.b @er0+, @er0+ ; copying byte_src to byte_dst
- test_h_gr32 byte_src+2 er0
- cmp.b @byte_src, @byte_dst
- beq .Lnext67
- fail
- .Lnext67:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext68
- fail
- .Lnext68:
- mov_b_postdec_to_postdec: ; reg post-decrement, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @ers-, @erd-
- mov.l #byte_src, er1
- mov.l #byte_dst, er0
- mov.b @er1-, @er0-
- ;;; .word 0x0178
- ;;; .word 0xa1a0
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst-1 er0
- test_h_gr32 byte_src-1 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext75
- fail
- .Lnext75:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext76
- fail
- .Lnext76: ; OK, pass on.
- ;; special case same register
- mov.l #byte_src, er0
- mov.b @er0-, @er0- ; copying byte_src to byte_dst_dec
- test_h_gr32 byte_src-2 er0
- cmp.b @byte_src, @byte_dst_dec
- beq .Lnext77
- fail
- .Lnext77:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst_dec
- cmp.b @byte_src, @byte_dst_dec
- bne .Lnext78
- fail
- .Lnext78:
- mov_b_preinc_to_preinc: ; reg pre-increment, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @+ers, @+erd
- mov.l #byte_src-1, er1
- mov.l #byte_dst-1, er0
- mov.b @+er1, @+er0
- ;;; .word 0x0178
- ;;; .word 0x9190
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst er0
- test_h_gr32 byte_src er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext85
- fail
- .Lnext85:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext86
- fail
- .Lnext86: ; OK, pass on.
- ;; special case same register
- mov.l #byte_src-1, er0
- mov.b @+er0, @+er0 ; copying byte_src to byte_dst
- test_h_gr32 byte_src+1 er0
- cmp.b @byte_src, @byte_dst
- beq .Lnext87
- fail
- .Lnext87:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext88
- fail
- .Lnext88:
- mov_b_predec_to_predec: ; reg pre-decrement, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @-ers, @-erd
- mov.l #byte_src+1, er1
- mov.l #byte_dst+1, er0
- mov.b @-er1, @-er0
- ;;; .word 0x0178
- ;;; .word 0xb1b0
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst er0
- test_h_gr32 byte_src er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext95
- fail
- .Lnext95:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext96
- fail
- .Lnext96: ; OK, pass on.
- ;; special case same register
- mov.l #byte_src+1, er0
- mov.b @-er0, @-er0 ; copying byte_src to byte_dst_dec
- test_h_gr32 byte_src-1 er0
- cmp.b @byte_src, @byte_dst_dec
- beq .Lnext97
- fail
- .Lnext97:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst_dec
- cmp.b @byte_src, @byte_dst_dec
- bne .Lnext98
- fail
- .Lnext98:
- mov_b_disp2_to_disp2: ; reg 2-bit disp, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @(dd:2, ers), @(dd:2, erd)
- mov.l #byte_src-1, er1
- mov.l #byte_dst-2, er0
- mov.b @(1:2, er1), @(2:2, er0)
- ;;; .word 0x0178
- ;;; .word 0x1120
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst-2 er0
- test_h_gr32 byte_src-1 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext105
- fail
- .Lnext105:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext106
- fail
- .Lnext106: ; OK, pass on.
- mov_b_disp16_to_disp16: ; reg 16-bit disp, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @(dd:16, ers), @(dd:16, erd)
- mov.l #byte_src-1, er1
- mov.l #byte_dst-2, er0
- mov.b @(1:16, er1), @(2:16, er0)
- ;;; .word 0x0178
- ;;; .word 0xc1c0
- ;;; .word 0x0001
- ;;; .word 0x0002
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst-2 er0
- test_h_gr32 byte_src-1 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext115
- fail
- .Lnext115:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext116
- fail
- .Lnext116: ; OK, pass on.
- mov_b_disp32_to_disp32: ; reg 32-bit disp, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @(dd:32, ers), @(dd:32, erd)
- mov.l #byte_src-1, er1
- mov.l #byte_dst-2, er0
- mov.b @(1:32, er1), @(2:32, er0)
- ;;; .word 0x0178
- ;;; .word 0xc9c8
- ;;; .long 1
- ;;; .long 2
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 byte_dst-2 er0
- test_h_gr32 byte_src-1 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext125
- fail
- .Lnext125:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext126
- fail
- .Lnext126: ; OK, pass on.
- mov_b_indexb16_to_indexb16: ; reg 16-bit indexed, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff01, er1
- mov.l #0xffffff02, er0
- ;; mov.b @(dd:16, rs.b), @(dd:16, rd.b)
- set_ccr_zero
- mov.b @(byte_src-1:16, r1.b), @(byte_dst-2:16, r0.b)
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 0xffffff02 er0
- test_h_gr32 0xffffff01 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- bne fail1
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- beq fail1
- mov_b_indexw16_to_indewb16: ; reg 16-bit indexed, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0003, er1
- mov.l #0xffff0004, er0
- ;; mov.b @(dd:16, rs.w), @(dd:16, rd.w)
- set_ccr_zero
- mov.b @(byte_src-3:16, r1.w), @(byte_dst-4:16, r0.w)
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 0xffff0004 er0
- test_h_gr32 0xffff0003 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- bne fail1
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- beq fail1
- mov_b_indexl16_to_indexl16: ; reg 16-bit indexed, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000005, er1
- mov.l #0x00000006, er0
- ;; mov.b @(dd:16, ers.l), @(dd:16, erd.l)
- set_ccr_zero
- mov.b @(byte_src-5:16, er1.l), @(byte_dst-6:16, er0.l)
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 0x00000006 er0
- test_h_gr32 0x00000005 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- bne fail1
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- beq fail1
- mov_b_indexb32_to_indexb32: ; reg 32-bit indexed, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffffff01, er1
- mov.l #0xffffff02, er0
- set_ccr_zero
- ;; mov.b @(dd:32, rs.b), @(dd:32, rd.b)
- mov.b @(byte_src-1:32, r1.b), @(byte_dst-2:32, r0.b)
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 0xffffff02 er0
- test_h_gr32 0xffffff01 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- bne fail1
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- beq fail1
- mov_b_indexw32_to_indexw32: ; reg 32-bit indexed, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0xffff0003, er1
- mov.l #0xffff0004, er0
- set_ccr_zero
- ;; mov.b @(dd:32, rs.w), @(dd:32, rd.w)
- mov.b @(byte_src-3:32, r1.w), @(byte_dst-4:32, r0.w)
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 0xffff0004 er0
- test_h_gr32 0xffff0003 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- bne fail1
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- beq fail1
- mov_b_indexl32_to_indexl32: ; reg 32-bit indexed, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- mov.l #0x00000005, er1
- mov.l #0x00000006, er0
- set_ccr_zero
- ;; mov.b @(dd:32, rs.w), @(dd:32, rd.w)
- mov.b @(byte_src-5:32, er1.l), @(byte_dst-6:32, er0.l)
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- ;; Verify the affected registers.
- test_h_gr32 0x00000006 er0
- test_h_gr32 0x00000005 er1
- test_gr_a5a5 2 ; Make sure other general regs not disturbed
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- bne fail1
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- beq fail1
- mov_b_abs16_to_abs16: ; 16-bit absolute addr, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @aa:16, @aa:16
- mov.b @byte_src:16, @byte_dst:16
- ;;; .word 0x0178
- ;;; .word 0x4040
- ;;; .word @byte_src
- ;;; .word @byte_dst
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure *NO* general registers are changed
- test_gr_a5a5 1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext135
- fail
- .Lnext135:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext136
- fail
- .Lnext136: ; OK, pass on.
- mov_b_abs32_to_abs32: ; 32-bit absolute addr, memory to memory
- set_grs_a5a5 ; Fill all general regs with a fixed pattern
- set_ccr_zero
- ;; mov.b @aa:32, @aa:32
- mov.b @byte_src:32, @byte_dst:32
- ;;; .word 0x0178
- ;;; .word 0x4848
- ;;; .long @byte_src
- ;;; .long @byte_dst
- ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
- test_neg_clear
- test_zero_clear
- test_ovf_clear
- test_carry_clear
- test_gr_a5a5 0 ; Make sure *NO* general registers are changed
- test_gr_a5a5 1
- test_gr_a5a5 2
- test_gr_a5a5 3
- test_gr_a5a5 4
- test_gr_a5a5 5
- test_gr_a5a5 6
- test_gr_a5a5 7
- ;; Now check the result of the move to memory.
- cmp.b @byte_src, @byte_dst
- beq .Lnext145
- fail
- .Lnext145:
- ;; Now clear the destination location, and verify that.
- mov.b #0, @byte_dst
- cmp.b @byte_src, @byte_dst
- bne .Lnext146
- fail
- .Lnext146: ; OK, pass on.
- .endif
- pass
- exit 0
- fail1:
- fail
|