divh.cgs 1.1 KB

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  1. # v850 divh
  2. # mach: all
  3. .include "testutils.inc"
  4. # Regular division - check signs
  5. seti 6, r1
  6. seti 45, r2
  7. divh r1, r2
  8. flags 0
  9. reg r1, 6
  10. reg r2, 7
  11. seti -6, r1
  12. seti 45, r2
  13. divh r1, r2
  14. flags s
  15. reg r1, -6
  16. reg r2, -7
  17. seti 6, r1
  18. seti -45, r2
  19. divh r1, r2
  20. flags s
  21. reg r1, 6
  22. reg r2, -7
  23. seti -6, r1
  24. seti -45, r2
  25. divh r1, r2
  26. flags 0
  27. reg r1, -6
  28. reg r2, 7
  29. # Only the lower half of the dividend is used
  30. seti 0x0000fffa, r1
  31. seti -45, r2
  32. divh r1, r2
  33. flags 0
  34. reg r1, 0x0000fffa
  35. reg r2, 7
  36. # If the data is divhided by zero, OV=1 and the quotient is undefined.
  37. # According to NEC, the S and Z flags, and the output registers, are
  38. # unchanged.
  39. noflags
  40. seti 0, r1
  41. seti 45, r2
  42. seti 67, r3
  43. divh r1, r2
  44. flags v
  45. reg r2, 45
  46. allflags
  47. seti 0, r1
  48. seti 45, r2
  49. seti 67, r3
  50. divh r1, r2
  51. flags sat + c + v + s + z
  52. reg r2, 45
  53. # Zero / (N!=0) => normal
  54. noflags
  55. seti 45, r1
  56. seti 0, r2
  57. seti 67, r3
  58. divh r1, r2
  59. flags z
  60. reg r1, 45
  61. reg r2, 0
  62. # Test for regular overflow
  63. noflags
  64. seti -1, r1
  65. seti 0x80000000, r2
  66. divh r1, r2
  67. flags v + s
  68. reg r1, -1
  69. reg r2, 0x80000000
  70. pass