mep-c5.cpu 10 KB

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  1. ; Copyright 2011 Free Software Foundation, Inc.
  2. ;
  3. ; Contributed by Red Hat Inc;
  4. ;
  5. ; This file is part of the GNU Binutils.
  6. ;
  7. ; This program is free software; you can redistribute it and/or modify
  8. ; it under the terms of the GNU General Public License as published by
  9. ; the Free Software Foundation; either version 3 of the License, or
  10. ; (at your option) any later version.
  11. ;
  12. ; This program is distributed in the hope that it will be useful,
  13. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. ; GNU General Public License for more details.
  16. ;
  17. ; You should have received a copy of the GNU General Public License
  18. ; along with this program; if not, write to the Free Software
  19. ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  20. ; MA 02110-1301, USA.
  21. ; Insns introduced for the MeP-c5 core
  22. ;
  23. (dnf f-c5n4 "extended field" (all-mep-core-isas) 16 4)
  24. (dnf f-c5n5 "extended field" (all-mep-core-isas) 20 4)
  25. (dnf f-c5n6 "extended field" (all-mep-core-isas) 24 4)
  26. (dnf f-c5n7 "extended field" (all-mep-core-isas) 28 4)
  27. (dnf f-rl5 "register l c5" (all-mep-core-isas) 20 4)
  28. (df f-12s20 "extended field" (all-mep-core-isas) 20 12 INT #f #f)
  29. (dnop rl5 "register Rl c5" (all-mep-core-isas) h-gpr f-rl5)
  30. (dnop cdisp12 "copro addend (12 bits)" (all-mep-core-isas) h-sint f-12s20)
  31. (dnci stcb_r "store in control bus space" (VOLATILE (MACH c5))
  32. "stcb $rn,($rma)"
  33. (+ MAJ_7 rn rma (f-sub4 12))
  34. (c-call VOID "do_stcb" rn (and rma #xffff))
  35. ((mep (unit u-use-gpr (in usereg rn))
  36. (unit u-use-gpr (in usereg rma))
  37. (unit u-exec)
  38. (unit u-stcb))))
  39. (dnci ldcb_r "load from control bus space" (VOLATILE (MACH c5) (LATENCY 3))
  40. "ldcb $rn,($rma)"
  41. (+ MAJ_7 rn rma (f-sub4 13))
  42. (set rn (c-call SI "do_ldcb" (and rma #xffff)))
  43. ((mep (unit u-use-gpr (in usereg rma))
  44. (unit u-ldcb)
  45. (unit u-exec)
  46. (unit u-ldcb-gpr (out loadreg rn)))))
  47. (dnci pref "cache prefetch" ((MACH c5) VOLATILE)
  48. "pref $cimm4,($rma)"
  49. (+ MAJ_7 cimm4 rma (f-sub4 5))
  50. (sequence ()
  51. (c-call VOID "check_option_dcache" pc)
  52. (c-call VOID "do_cache_prefetch" cimm4 rma pc))
  53. ((mep (unit u-use-gpr (in usereg rma))
  54. (unit u-exec))))
  55. (dnci prefd "cache prefetch" ((MACH c5) VOLATILE)
  56. "pref $cimm4,$sdisp16($rma)"
  57. (+ MAJ_15 cimm4 rma (f-sub4 3) sdisp16)
  58. (sequence ()
  59. (c-call VOID "check_option_dcache" pc)
  60. (c-call VOID "do_cache_prefetch" cimm4 (add INT rma (ext SI sdisp16)) pc))
  61. ((mep (unit u-use-gpr (in usereg rma))
  62. (unit u-exec))))
  63. (dnci casb3 "compare and swap byte 3" ((MACH c5) VOLATILE OPTIONAL_BIT_INSN)
  64. "casb3 $rl5,$rn,($rm)"
  65. (+ MAJ_15 rn rm (f-sub4 #x1) (f-c5n4 #x2) rl5 (f-c5n6 #x0) (f-c5n7 #x0))
  66. (sequence ()
  67. (c-call VOID "do_casb3" (index-of rl5) rn rm pc)
  68. (set rl5 rl5)
  69. )
  70. ((mep (unit u-use-gpr (in usereg rl5))
  71. (unit u-load-gpr (out loadreg rl5))
  72. (unit u-exec))))
  73. (dnci cash3 "compare and swap halfword 3" ((MACH c5) VOLATILE OPTIONAL_BIT_INSN)
  74. "cash3 $rl5,$rn,($rm)"
  75. (+ MAJ_15 rn rm (f-sub4 #x1) (f-c5n4 #x2) rl5 (f-c5n6 #x0) (f-c5n7 #x1))
  76. (sequence ()
  77. (c-call VOID "do_cash3" (index-of rl5) rn rm pc)
  78. (set rl5 rl5)
  79. )
  80. ((mep (unit u-use-gpr (in usereg rl5))
  81. (unit u-load-gpr (out loadreg rl5))
  82. (unit u-exec))))
  83. (dnci casw3 "compare and swap word 3" ((MACH c5) VOLATILE OPTIONAL_BIT_INSN)
  84. "casw3 $rl5,$rn,($rm)"
  85. (+ MAJ_15 rn rm (f-sub4 #x1) (f-c5n4 #x2) rl5 (f-c5n6 #x0) (f-c5n7 #x2))
  86. (sequence ()
  87. (c-call VOID "do_casw3" (index-of rl5) rn rm pc)
  88. (set rl5 rl5)
  89. )
  90. ((mep (unit u-use-gpr (in usereg rl5))
  91. (unit u-load-gpr (out loadreg rl5))
  92. (unit u-exec))))
  93. (dnci sbcp "store byte coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
  94. "sbcp $crn,$cdisp12($rma)"
  95. (+ MAJ_15 crn rma (f-sub4 6) (f-ext4 0) cdisp12)
  96. (sequence ()
  97. (c-call "check_option_cp" pc)
  98. (c-call VOID "check_write_to_text" (add rma (ext SI cdisp12)))
  99. (set (mem QI (add rma (ext SI cdisp12))) (and crn #xff)))
  100. ((mep (unit u-use-gpr (in usereg rma))
  101. (unit u-exec))))
  102. (dnci lbcp "load byte coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
  103. "lbcp $crn,$cdisp12($rma)"
  104. (+ MAJ_15 crn rma (f-sub4 6) (f-ext4 4) cdisp12)
  105. (sequence ()
  106. (c-call "check_option_cp" pc)
  107. (set crn (ext SI (mem QI (add rma (ext SI cdisp12))))))
  108. ((mep (unit u-use-gpr (in usereg rma))
  109. (unit u-exec))))
  110. (dnci lbucp "load byte coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
  111. "lbucp $crn,$cdisp12($rma)"
  112. (+ MAJ_15 crn rma (f-sub4 6) (f-ext4 12) cdisp12)
  113. (sequence ()
  114. (c-call "check_option_cp" pc)
  115. (set crn (zext SI (mem QI (add rma (ext SI cdisp12))))))
  116. ((mep (unit u-use-gpr (in usereg rma))
  117. (unit u-exec))))
  118. (dnci shcp "store half-word coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
  119. "shcp $crn,$cdisp12($rma)"
  120. (+ MAJ_15 crn rma (f-sub4 6) (f-ext4 1) cdisp12)
  121. (sequence ()
  122. (c-call "check_option_cp" pc)
  123. (c-call VOID "check_write_to_text" (add rma (ext SI cdisp12)))
  124. (set (mem HI (add rma (ext SI cdisp12))) (and crn #xffff)))
  125. ((mep (unit u-use-gpr (in usereg rma))
  126. (unit u-exec))))
  127. (dnci lhcp "load half-word coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
  128. "lhcp $crn,$cdisp12($rma)"
  129. (+ MAJ_15 crn rma (f-sub4 6) (f-ext4 5) cdisp12)
  130. (sequence ()
  131. (c-call "check_option_cp" pc)
  132. (set crn (ext SI (mem HI (add rma (ext SI cdisp12))))))
  133. ((mep (unit u-use-gpr (in usereg rma))
  134. (unit u-exec))))
  135. (dnci lhucp "load half-word coprocessor" (OPTIONAL_CP_INSN (STALL STORE) (MACH c5))
  136. "lhucp $crn,$cdisp12($rma)"
  137. (+ MAJ_15 crn rma (f-sub4 6) (f-ext4 13) cdisp12)
  138. (sequence ()
  139. (c-call "check_option_cp" pc)
  140. (set crn (zext SI (mem HI (add rma (ext SI cdisp12))))))
  141. ((mep (unit u-use-gpr (in usereg rma))
  142. (unit u-exec))))
  143. (dnci lbucpa "load byte coprocessor" (OPTIONAL_CP_INSN (STALL LOAD) (MACH c5))
  144. "lbucpa $crn,($rma+),$cdisp10"
  145. (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xC) (f-ext62 #x0) cdisp10)
  146. (sequence ()
  147. (c-call "check_option_cp" pc)
  148. (set crn (zext SI (mem QI rma)))
  149. (set rma (add rma cdisp10)))
  150. ((mep (unit u-use-gpr (in usereg rma))
  151. (unit u-exec))))
  152. (dnci lhucpa "load half-word coprocessor" (OPTIONAL_CP_INSN (STALL LOAD) (MACH c5))
  153. "lhucpa $crn,($rma+),$cdisp10a2"
  154. (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xD) (f-ext62 #x0) cdisp10a2)
  155. (sequence ()
  156. (c-call "check_option_cp" pc)
  157. (set crn (zext SI (mem HI (and rma (inv SI 1)))))
  158. (set rma (add rma (ext SI cdisp10a2))))
  159. ((mep (unit u-use-gpr (in usereg rma))
  160. (unit u-exec))))
  161. (dnci lbucpm0 "lbucpm0" (OPTIONAL_CP_INSN (MACH c5))
  162. "lbucpm0 $crn,($rma+),$cdisp10"
  163. (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xc) (f-ext62 #x2) cdisp10)
  164. (sequence ()
  165. (c-call "check_option_cp" pc)
  166. (set crn (zext SI (mem QI rma)))
  167. (set rma (mod0 cdisp10)))
  168. ((mep (unit u-use-gpr (in usereg rma))
  169. (unit u-exec))))
  170. (dnci lhucpm0 "lhucpm0" (OPTIONAL_CP_INSN (MACH c5))
  171. "lhucpm0 $crn,($rma+),$cdisp10a2"
  172. (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xd) (f-ext62 #x2) cdisp10a2)
  173. (sequence ()
  174. (c-call "check_option_cp" pc)
  175. (set crn (zext SI (mem HI (and rma (inv SI 1)))))
  176. (set rma (mod0 cdisp10a2)))
  177. ((mep (unit u-use-gpr (in usereg rma))
  178. (unit u-exec))))
  179. (dnci lbucpm1 "lbucpm1" (OPTIONAL_CP_INSN (MACH c5))
  180. "lbucpm1 $crn,($rma+),$cdisp10"
  181. (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xc) (f-ext62 #x3) cdisp10)
  182. (sequence ()
  183. (c-call "check_option_cp" pc)
  184. (set crn (zext SI (mem QI rma)))
  185. (set rma (mod1 cdisp10)))
  186. ((mep (unit u-use-gpr (in usereg rma))
  187. (unit u-exec))))
  188. (dnci lhucpm1 "lhucpm1" (OPTIONAL_CP_INSN (MACH c5))
  189. "lhucpm1 $crn,($rma+),$cdisp10a2"
  190. (+ MAJ_15 crn rma (f-sub4 5) (f-ext4 #xd) (f-ext62 #x3) cdisp10a2)
  191. (sequence ()
  192. (c-call "check_option_cp" pc)
  193. (set crn (zext SI (mem HI (and rma (inv SI 1)))))
  194. (set rma (mod1 cdisp10a2)))
  195. ((mep (unit u-use-gpr (in usereg rma))
  196. (unit u-exec))))
  197. (dnci uci "uci" ((MACH c5) VOLATILE)
  198. "uci $rn,$rm,$uimm16"
  199. (+ MAJ_15 rn rm (f-sub4 2) simm16)
  200. (set rn (c-call SI "do_UCI" rn rm (zext SI uimm16) pc))
  201. ((mep (unit u-use-gpr (in usereg rm))
  202. (unit u-use-gpr (in usereg rn))
  203. (unit u-exec))))
  204. (dnf f-c5-rnm "register n/m" (all-mep-isas) 4 8)
  205. (dnf f-c5-rm "register m" (all-mep-isas) 8 4)
  206. (df f-c5-16u16 "general 16-bit u-val" (all-mep-isas) 16 16 UINT #f #f)
  207. (dnmf f-c5-rmuimm20 "20-bit immediate in Rm/Imm16" (all-mep-isas) UINT
  208. (f-c5-rm f-c5-16u16)
  209. (sequence () ; insert
  210. (set (ifield f-c5-rm) (srl (ifield f-c5-rmuimm20) 16))
  211. (set (ifield f-c5-16u16) (and (ifield f-c5-rmuimm20) #xffff))
  212. )
  213. (sequence () ; extract
  214. (set (ifield f-c5-rmuimm20) (or (ifield f-c5-16u16)
  215. (sll (ifield f-c5-rm) 16)))
  216. )
  217. )
  218. (dnop c5rmuimm20 "20-bit immediate in rm and imm16" (all-mep-core-isas) h-uint f-c5-rmuimm20)
  219. (dnmf f-c5-rnmuimm24 "24-bit immediate in Rm/Imm16" (all-mep-isas) UINT
  220. (f-c5-rnm f-c5-16u16)
  221. (sequence () ; insert
  222. (set (ifield f-c5-rnm) (srl (ifield f-c5-rnmuimm24) 16))
  223. (set (ifield f-c5-16u16) (and (ifield f-c5-rnmuimm24) #xffff))
  224. )
  225. (sequence () ; extract
  226. (set (ifield f-c5-rnmuimm24) (or (ifield f-c5-16u16)
  227. (sll (ifield f-c5-rnm) 16)))
  228. )
  229. )
  230. (dnop c5rnmuimm24 "24-bit immediate in rn, rm, and imm16" (all-mep-core-isas) h-uint f-c5-rnmuimm24)
  231. (dnci dsp "dsp" ((MACH c5) VOLATILE)
  232. "dsp $rn,$rm,$uimm16"
  233. (+ MAJ_15 rn rm (f-sub4 0) uimm16)
  234. (set rn (c-call SI "do_DSP" rn rm (zext SI uimm16) pc))
  235. ((mep (unit u-use-gpr (in usereg rm))
  236. (unit u-use-gpr (in usereg rn))
  237. (unit u-exec))))
  238. (dnci dsp0 "dsp0" ((MACH c5) VOLATILE NO-DIS ALIAS)
  239. "dsp0 $c5rnmuimm24"
  240. (+ MAJ_15 c5rnmuimm24 (f-sub4 0))
  241. (c-call VOID "do_DSP" (zext SI c5rnmuimm24) pc)
  242. ((mep (unit u-exec))))
  243. (dnci dsp1 "dsp1" ((MACH c5) VOLATILE NO-DIS ALIAS)
  244. "dsp1 $rn,$c5rmuimm20"
  245. (+ MAJ_15 rn (f-sub4 0) c5rmuimm20)
  246. (set rn (c-call SI "do_DSP" rn (zext SI c5rmuimm20) pc))
  247. ((mep (unit u-use-gpr (in usereg rn))
  248. (unit u-exec))))