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- -*- text -*-
- * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
- Intel K1OM.
- Changes in 2.38:
- * Add support for AArch64 system registers that were missing in previous
- releases.
- * Add support for the LoongArch instruction set.
- * Add a command-line option, -muse-unaligned-vector-move, for x86 target
- to encode aligned vector move as unaligned vector move.
- * Add support for Cortex-R52+ for Arm.
- * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
- * Add support for Cortex-A710 for Arm.
- * Add support for Scalable Matrix Extension (SME) for AArch64.
- * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
- assembler what to when it encoutners multibyte characters in the input. The
- default is to allow them. Setting the option to "warn" will generate a
- warning message whenever any multibyte character is encountered. Using the
- option to "warn-sym-only" will make the assembler generate a warning whenever a
- symbol is defined containing multibyte characters. (References to undefined
- symbols will not generate warnings).
- * Outputs of .ds.x directive and .tfloat directive with hex input from
- x86 assembler have been reduced from 12 bytes to 10 bytes to match the
- output of .tfloat directive.
- * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
- 'armv9.3-a' for -march in AArch64 GAS.
- * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
- 'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
- * Add support for Intel AVX512_FP16 instructions.
- Changes in 2.37:
- * arm-symbianelf support removed.
- * Add support for Realm Management Extension (RME) for AArch64.
- Changes in 2.36:
- * Add support for Intel AVX VNNI instructions.
- * Add support for Intel HRESET instruction.
- * Add support for Intel UINTR instructions.
- * Support non-absolute segment values for i386 lcall and ljmp.
- * When setting the link order attribute of ELF sections, it is now possible to
- use a numeric section index instead of symbol name.
- * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
- AArch64 and ARM.
- Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
- * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
- Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
- Extension) system registers for AArch64.
- * Add support for Armv8-R and Armv8.7-A AArch64.
- * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
- AArch64.
- * Add support for +flagm feature for -march in Armv8.4 AArch64.
- * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
- 64-byte load/store instructions for this feature.
- * Add support for +pauth (Pointer Authentication) feature for -march in
- AArch64.
- * Add support for Intel TDX instructions.
- * Add support for Intel Key Locker instructions.
- * Added a .nop directive to generate a single no-op instruction in a target
- neutral manner. This instruction does have an effect on DWARF line number
- generation, if that is active.
- * Removed --reduce-memory-overheads and --hash-size as gas now
- uses hash tables that can be expand and shrink automatically.
- * Add {disp16} pseudo prefix to x86 assembler.
- * Add support for Intel AMX instructions.
- * Configure with --enable-x86-used-note by default for Linux/x86.
- * Add support for the SHF_GNU_RETAIN flag, which can be applied to
- sections using the 'R' flag in the .section directive.
- SHF_GNU_RETAIN specifies that the section should not be garbage
- collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
- Changes in 2.35:
- * X86 NaCl target support is removed.
- * Extend .symver directive to update visibility of the original symbol
- and assign one original symbol to different versioned symbols.
- * Add support for Intel SERIALIZE and TSXLDTRK instructions.
- * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
- -mlfence-before-ret= options to x86 assembler to help mitigate
- CVE-2020-0551.
- * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
- (if such output is being generated). Added the ability to generate
- version 5 .debug_line sections.
- * Add -mbig-obj support to i386 MingW targets.
- Changes in 2.34:
- * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
- -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
- options to x86 assembler to align branches within a fixed boundary
- with segment prefixes or NOPs.
- * Add support for Zilog eZ80 and Zilog Z180 CPUs.
- * Add support for z80-elf target.
- * Add support for relocation of each byte or word of multibyte value to Z80
- targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
- with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
- * Add SDCC support for Z80 targets.
- Changes in 2.33:
- * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
- instructions.
- * Add support for the Arm Transactional Memory Extension (TME)
- instructions.
- * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
- instructions.
- * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
- LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
- time option to set the default behavior. Set the default if the configure
- option is not used to "no".
- * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
- processors.
- * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
- Cortex-A76AE, and Cortex-A77 processors.
- * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
- floating point literals. Add .float16_format directive and
- -mfp16-format=[ieee|alternative] option for Arm to control the format of the
- encoding.
- * Add --gdwarf-cie-version command line flag. This allows control over which
- version of DWARF CIE the assembler creates.
- Changes in 2.32:
- * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
- VEX.W-ignored (WIG) VEX instructions.
- * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
- notes. Add a --enable-x86-used-note configure time option to set the
- default behavior. Set the default if the configure option is not used
- to "no".
- * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
- * Add support for the MIPS Loongson EXTensions (EXT) instructions.
- * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
- * Add support for the C-SKY processor series.
- * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
- ASE.
- Changes in 2.31:
- * The ADR and ADRL pseudo-instructions supported by the ARM assembler
- now only set the bottom bit of the address of thumb function symbols
- if the -mthumb-interwork command line option is active.
- * Add support for the MIPS Global INValidate (GINV) ASE.
- * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
- * Add support for the Freescale S12Z architecture.
- * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
- Build Attribute notes if none are present in the input sources. Add a
- --enable-generate-build-notes=[yes|no] configure time option to set the
- default behaviour. Set the default if the configure option is not used
- to "no".
- * Remove -mold-gcc command-line option for x86 targets.
- * Add -O[2|s] command-line options to x86 assembler to enable alternate
- shorter instruction encoding.
- * Add support for .nops directive. It is currently supported only for
- x86 targets.
- Changes in 2.30:
- * Add support for loaction views in DWARF debug line information.
- Changes in 2.29:
- * Add support for ELF SHF_GNU_MBIND.
- * Add support for the WebAssembly file format and wasm32 ELF conversion.
- * PowerPC gas now checks that the correct register class is used in
- instructions. For instance, "addi %f4,%cr3,%r31" warns three times
- that the registers are invalid.
- * Add support for the Texas Instruments PRU processor.
- * Support for the ARMv8-R architecture and Cortex-R52 processor has been
- added to the ARM port.
- Changes in 2.28:
- * Add support for the RISC-V architecture.
- * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
- Changes in 2.27:
- * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
- * Add --no-pad-sections to stop the assembler from padding the end of output
- sections up to their alignment boundary.
- * Support for the ARMv8-M architecture has been added to the ARM port. Support
- for the ARMv8-M Security and DSP Extensions has also been added to the ARM
- port.
- * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
- .extCoreRegister pseudo-ops that allow an user to define custom
- instructions, conditional codes, auxiliary and core registers.
- * Add a configure option --enable-elf-stt-common to decide whether ELF
- assembler should generate common symbols with the STT_COMMON type by
- default. Default to no.
- * New command-line option --elf-stt-common= for ELF targets to control
- whether to generate common symbols with the STT_COMMON type.
- * Add ability to set section flags and types via numeric values for ELF
- based targets.
- * Add a configure option --enable-x86-relax-relocations to decide whether
- x86 assembler should generate relax relocations by default. Default to
- yes, except for x86 Solaris targets older than Solaris 12.
- * New command-line option -mrelax-relocations= for x86 target to control
- whether to generate relax relocations.
- * New command-line option -mfence-as-lock-add=yes for x86 target to encode
- lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
- * Add assembly-time relaxation option for ARC cpus.
- * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
- cpu type to be adjusted at configure time.
- Changes in 2.26:
- * Add a configure option --enable-compressed-debug-sections={all,gas} to
- decide whether DWARF debug sections should be compressed by default.
- * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
- assembler support for Argonaut RISC architectures.
- * Symbol and label names can now be enclosed in double quotes (") which allows
- them to contain characters that are not part of valid symbol names in high
- level languages.
- * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
- previous spelling, -march=armv6zk, is still accepted.
- * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
- Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
- extensions has also been added to the Aarch64 port.
- * Support for the ARMv8.1 architecture has been added to the ARM port. Support
- for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
- been added to the ARM port.
- * Extend --compress-debug-sections option to support
- --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
- targets.
- * --compress-debug-sections is turned on for Linux/x86 by default.
- Changes in 2.25:
- * Add support for the AVR Tiny microcontrollers.
- * Replace support for openrisc and or32 with support for or1k.
- * Enhanced the ARM port to accept the assembler output from the CodeComposer
- Studio tool. Support is enabled via the new command-line option -mccs.
- * Add support for the Andes NDS32.
- Changes in 2.24:
- * Add support for the Texas Instruments MSP430X processor.
- * Add -gdwarf-sections command-line option to enable per-code-section
- generation of DWARF .debug_line sections.
- * Add support for Altera Nios II.
- * Add support for the Imagination Technologies Meta processor.
- * Add support for the v850e3v5.
- * Remove assembler support for MIPS ECOFF targets.
- Changes in 2.23:
- * Add support for the 64-bit ARM architecture: AArch64.
- * Add support for S12X processor.
- * Add support for the VLE extension to the PowerPC architecture.
- * Add support for the Freescale XGATE architecture.
- * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
- directives. These are currently available only for x86 and ARM targets.
- * Add support for the Renesas RL78 architecture.
- * Add support for the Adapteva EPIPHANY architecture.
- * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
- Changes in 2.22:
- * Add support for the Tilera TILEPro and TILE-Gx architectures.
- Changes in 2.21:
- * Gas no longer requires doubling of ampersands in macros.
- * Add support for the TMS320C6000 (TI C6X) processor family.
- * GAS now understands an extended syntax in the .section directive flags
- for COFF targets that allows the section's alignment to be specified. This
- feature has also been backported to the 2.20 release series, starting with
- 2.20.1.
- * Add support for the Renesas RX processor.
- * New command-line option, --compress-debug-sections, which requests
- compression of DWARF debug information sections in the relocatable output
- file. Compressed debug sections are supported by readelf, objdump, and
- gold, but not currently by Gnu ld.
- Changes in 2.20:
- * Added support for v850e2 and v850e2v3.
- * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
- pseudo op. It marks the symbol as being globally unique in the entire
- process.
- * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
- in binary rather than text.
- * Add support for common symbol alignment to PE formats.
- * Add support for the new discriminator column in the DWARF line table,
- with a discriminator operand for the .loc directive.
- * Add support for Sunplus score architecture.
- * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
- indicate that if the symbol is the target of a relocation, its value should
- not be use. Instead the function should be invoked and its result used as
- the value.
- * Add support for Lattice Mico32 (lm32) architecture.
- * Add support for Xilinx MicroBlaze architecture.
- Changes in 2.19:
- * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
- tables without runtime relocation.
- * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
- adds compatibility with H'00 style hex constants.
- * New command-line option, -msse-check=[none|error|warning], for x86
- targets.
- * New sub-option added to the assembler's -a command-line switch to
- generate a listing output. The 'g' sub-option will insert into the listing
- various information about the assembly, such as assembler version, the
- command-line options used, and a time stamp.
- * New command-line option -msse2avx for x86 target to encode SSE
- instructions with VEX prefix.
- * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
- * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
- -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
- -mnaked-reg and -mold-gcc, for x86 targets.
- * Support for generating wide character strings has been added via the new
- pseudo ops: .string16, .string32 and .string64.
- * Support for SSE5 has been added to the i386 port.
- Changes in 2.18:
- * The GAS sources are now released under the GPLv3.
- * Support for the National Semiconductor CR16 target has been added.
- * Added gas .reloc pseudo. This is a low-level interface for creating
- relocations.
- * Add support for x86_64 PE+ target.
- * Add support for Score target.
- Changes in 2.17:
- * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
- * Support for ms2 architecture has been added.
- * Support for the Z80 processor family has been added.
- * Add support for the "@<file>" syntax to the command line, so that extra
- switches can be read from <file>.
- * The SH target supports a new command-line switch --enable-reg-prefix which,
- if enabled, will allow register names to be optionally prefixed with a $
- character. This allows register names to be distinguished from label names.
- * Macros with a variable number of arguments are now supported. See the
- documentation for how this works.
- * Added --reduce-memory-overheads switch to reduce the size of the hash
- tables used, at the expense of longer assembly times, and
- --hash-size=<NUMBER> to set the size of the hash tables used by gas.
- * Macro names and macro parameter names can now be any identifier that would
- also be legal as a symbol elsewhere. For macro parameter names, this is
- known to cause problems in certain sources when the respective target uses
- characters inconsistently, and thus macro parameter references may no longer
- be recognized as such (see the documentation for details).
- * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
- for the VAX target in order to be more compatible with the VAX MACRO
- assembler.
- * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
- Changes in 2.16:
- * Redefinition of macros now results in an error.
- * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
- * New command-line option -munwind-check=[warning|error] for IA64
- targets.
- * The IA64 port now uses automatic dependency violation removal as its default
- mode.
- * Port to MAXQ processor contributed by HCL Tech.
- * Added support for generating unwind tables for ARM ELF targets.
- * Add a -g command-line option to generate debug information in the target's
- preferred debug format.
- * Support for the crx-elf target added.
- * Support for the sh-symbianelf target added.
- * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
- on pe[i]-i386; required for this target's DWARF 2 support.
- * Support for Motorola MCF521x/5249/547x/548x added.
- * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
- instrucitons.
- * New command-line option -mno-shared for MIPS ELF targets.
- * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
- added to enter (and leave) alternate macro syntax mode.
- Changes in 2.15:
- * The MIPS -membedded-pic option (Embedded-PIC code generation) is
- deprecated and will be removed in a future release.
- * Added PIC m32r Linux (ELF) and support to M32R assembler.
- * Added support for ARM V6.
- * Added support for sh4a and variants.
- * Support for Renesas M32R2 added.
- * Limited support for Mapping Symbols as specified in the ARM ELF
- specification has been added to the arm assembler.
- * On ARM architectures, added a new gas directive ".unreq" that undoes
- definitions created by ".req".
- * Support for Motorola ColdFire MCF528x added.
- * Added --gstabs+ switch to enable the generation of STABS debug format
- information with GNU extensions.
- * Added support for MIPS64 Release 2.
- * Added support for v850e1.
- * Added -n switch for x86 assembler. By default, x86 GAS replaces
- multiple nop instructions used for alignment within code sections
- with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
- switch disables the optimization.
- * Removed -n option from MIPS assembler. It was not useful, and confused the
- existing -non_shared option.
- Changes in 2.14:
- * Added support for MIPS32 Release 2.
- * Added support for Xtensa architecture.
- * Support for Intel's iWMMXt processor (an ARM variant) added.
- * An assembler test generator has been contributed and an example file that
- uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
- * Support for SH2E added.
- * GASP has now been removed.
- * Support for Texas Instruments TMS320C4x and TMS320C3x series of
- DSP's contributed by Michael Hayes and Svein E. Seldal.
- * Support for the Ubicom IP2xxx microcontroller added.
- Changes in 2.13:
- * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
- and FR500 included.
- * Support for DLX processor added.
- * GASP has now been deprecated and will be removed in a future release. Use
- the macro facilities in GAS instead.
- * GASP now correctly parses floating point numbers. Unless the base is
- explicitly specified, they are interpreted as decimal numbers regardless of
- the currently specified base.
- Changes in 2.12:
- * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
- * Support for the OpenRISC 32-bit embedded processor by OpenCores.
- * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
- specifying the target instruction set. The old method of specifying the
- target processor has been deprecated, but is still accepted for
- compatibility.
- * Support for the VFP floating-point instruction set has been added to
- the ARM assembler.
- * New psuedo op: .incbin to include a set of binary data at a given point
- in the assembly. Contributed by Anders Norlander.
- * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
- but still works for compatability.
- * The MIPS assembler no longer issues a warning by default when it
- generates a nop instruction from a macro. The new command-line option
- -n will turn on the warning.
- Changes in 2.11:
- * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
- * x86 gas now supports the full Pentium4 instruction set.
- * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
- * Support for Motorola 68HC11 and 68HC12.
- * Support for Texas Instruments TMS320C54x (tic54x).
- * Support for IA-64.
- * Support for i860, by Jason Eckhardt.
- * Support for CRIS (Axis Communications ETRAX series).
- * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
- * x86 gas -q command-line option quietens warnings about register size changes
- due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
- translating various deprecated floating point instructions.
- Changes in 2.10:
- * Support for the ARM msr instruction was changed to only allow an immediate
- operand when altering the flags field.
- * Support for ATMEL AVR.
- * Support for IBM 370 ELF. Somewhat experimental.
- * Support for numbers with suffixes.
- * Added support for breaking to the end of repeat loops.
- * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
- * New .elseif pseudo-op added.
- * New --fatal-warnings option.
- * picoJava architecture support added.
- * Motorola MCore 210 processor support added.
- * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
- assembly programs with intel syntax.
- * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
- * Added -gdwarf2 option to generate DWARF 2 debugging information.
- * Full 16-bit mode support for i386.
- * Greatly improved instruction operand checking for i386. This change will
- produce errors or warnings on incorrect assembly code that previous versions
- of gas accepted. If you get unexpected messages from code that worked with
- older versions of gas, please double check the code before reporting a bug.
- * Weak symbol support added for COFF targets.
- * Mitsubishi D30V support added.
- * Texas Instruments c80 (tms320c80) support added.
- * i960 ELF support added.
- * ARM ELF support added.
- Changes in 2.9:
- * Texas Instruments c30 (tms320c30) support added.
- * The assembler now optimizes the exception frame information generated by egcs
- and gcc 2.8. The new --traditional-format option disables this optimization.
- * Added --gstabs option to generate stabs debugging information.
- * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
- listing.
- * Added -MD option to print dependencies.
- Changes in 2.8:
- * BeOS support added.
- * MIPS16 support added.
- * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
- * Alpha/VMS support added.
- * m68k options --base-size-default-16, --base-size-default-32,
- --disp-size-default-16, and --disp-size-default-32 added.
- * The alignment directives now take an optional third argument, which is the
- maximum number of bytes to skip. If doing the alignment would require
- skipping more than the given number of bytes, the alignment is not done at
- all.
- * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
- * The -a option takes a new suboption, c (e.g., -alc), to skip false
- conditionals in listings.
- * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
- the symbol is already defined.
- Changes in 2.7:
- * The PowerPC assembler now allows the use of symbolic register names (r0,
- etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
- can be used any time. PowerPC 860 move to/from SPR instructions have been
- added.
- * Alpha Linux (ELF) support added.
- * PowerPC ELF support added.
- * m68k Linux (ELF) support added.
- * i960 Hx/Jx support added.
- * i386/PowerPC gnu-win32 support added.
- * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
- default is to build COFF-only support. To get a set of tools that generate
- ELF (they'll understand both COFF and ELF), you must configure with
- target=i386-unknown-sco3.2v5elf.
- * m88k-motorola-sysv3* support added.
- Changes in 2.6:
- * Gas now directly supports macros, without requiring GASP.
- * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
- MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
- ``.mri 0'' is seen; this can be convenient for inline assembler code.
- * Added --defsym SYM=VALUE option.
- * Added -mips4 support to MIPS assembler.
- * Added PIC support to Solaris and SPARC SunOS 4 assembler.
- Changes in 2.4:
- * Converted this directory to use an autoconf-generated configure script.
- * ARM support, from Richard Earnshaw.
- * Updated VMS support, from Pat Rankin, including considerably improved
- debugging support.
- * Support for the control registers in the 68060.
- * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
- provide for possible future gcc changes, for targets where gas provides some
- features not available in the native assembler. If the native assembler is
- used, it should become obvious pretty quickly what the problem is.
- * Usage message is available with "--help".
- * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
- also, but didn't get into the NEWS file.)
- * Weak symbol support for a.out.
- * A bug in the listing code which could cause an infinite loop has been fixed.
- Bugs in listings when generating a COFF object file have also been fixed.
- * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
- Paul Kranenburg.
- * Improved Alpha support. Immediate constants can have a much larger range
- now. Support for the 21164 has been contributed by Digital.
- * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
- Changes in 2.3:
- * Mach i386 support, by David Mackenzie and Ken Raeburn.
- * RS/6000 and PowerPC support by Ian Taylor.
- * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
- based on mail received from various people. The `-h#' option should work
- again too.
- * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
- with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
- version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
- this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
- in the "dist" directory.
- * Vax support in gas fixed for BSD, so it builds and seems to run a couple
- simple tests okay. I haven't put it through extensive testing. (GNU make is
- currently required for BSD 4.3 builds.)
- * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
- based on code donated by CMU, which used an a.out-based format. I'm afraid
- the alpha-a.out support is pretty badly mangled, and much of it removed;
- making it work will require rewriting it as BFD support for the format anyways.
- * Irix 5 support.
- * The test suites have been fixed up a bit, so that they should work with a
- couple different versions of expect and dejagnu.
- * Symbols' values are now handled internally as expressions, permitting more
- flexibility in evaluating them in some cases. Some details of relocation
- handling have also changed, and simple constant pool management has been
- added, to make the Alpha port easier.
- * New option "--statistics" for printing out program run times. This is
- intended to be used with the gcc "-Q" option, which prints out times spent in
- various phases of compilation. (You should be able to get all of them
- printed out with "gcc -Q -Wa,--statistics", I think.)
- Changes in 2.2:
- * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
- * Configurations that are still in development (and therefore are convenient to
- have listed in configure.in) still get rejected without a minor change to
- gas/Makefile.in, so people not doing development work shouldn't get the
- impression that support for such configurations is actually believed to be
- reliable.
- * The program name (usually "as") is printed when a fatal error message is
- displayed. This should prevent some confusion about the source of occasional
- messages about "internal errors".
- * ELF support is falling into place. Support for the 386 should be working.
- Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
- * Symbol values are maintained as expressions instead of being immediately
- boiled down to add-symbol, sub-symbol, and constant. This permits slightly
- more complex calculations involving symbols whose values are not alreadey
- known.
- * DBX-style debugging info ("stabs") is now supported for COFF formats.
- If any stabs directives are seen in the source, GAS will create two new
- sections: a ".stab" and a ".stabstr" section. The format of the .stab
- section is nearly identical to the a.out symbol format, and .stabstr is
- its string table. For this to be useful, you must have configured GCC
- to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
- that can use the stab sections (4.11 or later).
- * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
- support is in progress.
- Changes in 2.1:
- * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
- incorporated, but not well tested yet.
- * Altered the opcode table split for m68k; it should require less VM to compile
- with gcc now.
- * Some minor adjustments to add (Convergent Technologies') Miniframe support,
- suggested by Ronald Cole.
- * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
- includes improved ELF support, which I've started adapting for SPARC Solaris
- 2.x. Integration isn't completely, so it probably won't work.
- * HP9000/300 support, donated by HP, has been merged in.
- * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
- * Better error messages for unsupported configurations (e.g., hppa-hpux).
- * Test suite framework is starting to become reasonable.
- Changes in 2.0:
- * Mostly bug fixes.
- * Some more merging of BFD and ELF code, but ELF still doesn't work.
- Changes in 1.94:
- * BFD merge is partly done. Adventurous souls may try giving configure the
- "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
- format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
- or "solaris". (ELF isn't really supported yet. It needs work. I've got
- some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
- fully merged yet.)
- * The 68K opcode table has been split in half. It should now compile under gcc
- without consuming ridiculous amounts of memory.
- * A couple data structures have been reduced in size. This should result in
- saving a little bit of space at runtime.
- * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
- code provided ROSE format support, which I haven't merged in yet. (I can
- make it available, if anyone wants to try it out.) Ralph's code, for BSD
- 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
- coming.
- * Support for the Hitachi H8/500 has been added.
- * VMS host and target support should be working now, thanks chiefly to Eric
- Youngdale.
- Changes in 1.93.01:
- * For m68k, support for more processors has been added: 68040, CPU32, 68851.
- * For i386, .align is now power-of-two; was number-of-bytes.
- * For m68k, "%" is now accepted before register names. For COFF format, which
- doesn't use underscore prefixes for C labels, it is required, so variable "a0"
- can be distinguished from the register.
- * Last public release was 1.38. Lots of configuration changes since then, lots
- of new CPUs and formats, lots of bugs fixed.
- Copyright (C) 2012-2022 Free Software Foundation, Inc.
- Copying and distribution of this file, with or without modification,
- are permitted in any medium without royalty provided the copyright
- notice and this notice are preserved.
- Local variables:
- fill-column: 79
- End:
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