bpf-dis.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631
  1. /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
  2. /* Disassembler interface for targets using CGEN. -*- C -*-
  3. CGEN: Cpu tools GENerator
  4. THIS FILE IS MACHINE GENERATED WITH CGEN.
  5. - the resultant file is machine generated, cgen-dis.in isn't
  6. Copyright (C) 1996-2022 Free Software Foundation, Inc.
  7. This file is part of libopcodes.
  8. This library is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 3, or (at your option)
  11. any later version.
  12. It is distributed in the hope that it will be useful, but WITHOUT
  13. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14. or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  15. License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software Foundation, Inc.,
  18. 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
  19. /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  20. Keep that in mind. */
  21. #include "sysdep.h"
  22. #include <stdio.h>
  23. #include "ansidecl.h"
  24. #include "disassemble.h"
  25. #include "bfd.h"
  26. #include "symcat.h"
  27. #include "libiberty.h"
  28. #include "bpf-desc.h"
  29. #include "bpf-opc.h"
  30. #include "opintl.h"
  31. /* Default text to print if an instruction isn't recognized. */
  32. #define UNKNOWN_INSN_MSG _("*unknown*")
  33. static void print_normal
  34. (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  35. static void print_address
  36. (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  37. static void print_keyword
  38. (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  39. static void print_insn_normal
  40. (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  41. static int print_insn
  42. (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
  43. static int default_print_insn
  44. (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  45. static int read_insn
  46. (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  47. unsigned long *);
  48. /* -- disassembler routines inserted here. */
  49. /* -- dis.c */
  50. /* We need to customize the disassembler a bit:
  51. - Use 8 bytes per line by default.
  52. */
  53. #define CGEN_PRINT_INSN bpf_print_insn
  54. static int
  55. bpf_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
  56. {
  57. bfd_byte buf[CGEN_MAX_INSN_SIZE];
  58. int buflen;
  59. int status;
  60. info->bytes_per_chunk = 1;
  61. info->bytes_per_line = 8;
  62. /* Attempt to read the base part of the insn. */
  63. buflen = cd->base_insn_bitsize / 8;
  64. status = (*info->read_memory_func) (pc, buf, buflen, info);
  65. /* Try again with the minimum part, if min < base. */
  66. if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
  67. {
  68. buflen = cd->min_insn_bitsize / 8;
  69. status = (*info->read_memory_func) (pc, buf, buflen, info);
  70. }
  71. if (status != 0)
  72. {
  73. (*info->memory_error_func) (status, pc, info);
  74. return -1;
  75. }
  76. return print_insn (cd, pc, info, buf, buflen);
  77. }
  78. /* Signed immediates should be printed in hexadecimal. */
  79. static void
  80. print_immediate (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  81. void *dis_info,
  82. int64_t value,
  83. unsigned int attrs ATTRIBUTE_UNUSED,
  84. bfd_vma pc ATTRIBUTE_UNUSED,
  85. int length ATTRIBUTE_UNUSED)
  86. {
  87. disassemble_info *info = (disassemble_info *) dis_info;
  88. if (value <= 9)
  89. (*info->fprintf_func) (info->stream, "%" PRId64, value);
  90. else
  91. (*info->fprintf_func) (info->stream, "%#" PRIx64, value);
  92. /* This is to avoid -Wunused-function for print_normal. */
  93. if (0)
  94. print_normal (cd, dis_info, value, attrs, pc, length);
  95. }
  96. /* Endianness bit sizes should be printed in decimal. */
  97. static void
  98. print_endsize (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  99. void *dis_info,
  100. unsigned long value,
  101. unsigned int attrs ATTRIBUTE_UNUSED,
  102. bfd_vma pc ATTRIBUTE_UNUSED,
  103. int length ATTRIBUTE_UNUSED)
  104. {
  105. disassemble_info *info = (disassemble_info *) dis_info;
  106. (*info->fprintf_func) (info->stream, "%lu", value);
  107. }
  108. /* -- */
  109. void bpf_cgen_print_operand
  110. (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
  111. /* Main entry point for printing operands.
  112. XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
  113. of dis-asm.h on cgen.h.
  114. This function is basically just a big switch statement. Earlier versions
  115. used tables to look up the function to use, but
  116. - if the table contains both assembler and disassembler functions then
  117. the disassembler contains much of the assembler and vice-versa,
  118. - there's a lot of inlining possibilities as things grow,
  119. - using a switch statement avoids the function call overhead.
  120. This function could be moved into `print_insn_normal', but keeping it
  121. separate makes clear the interface between `print_insn_normal' and each of
  122. the handlers. */
  123. void
  124. bpf_cgen_print_operand (CGEN_CPU_DESC cd,
  125. int opindex,
  126. void * xinfo,
  127. CGEN_FIELDS *fields,
  128. void const *attrs ATTRIBUTE_UNUSED,
  129. bfd_vma pc,
  130. int length)
  131. {
  132. disassemble_info *info = (disassemble_info *) xinfo;
  133. switch (opindex)
  134. {
  135. case BPF_OPERAND_DISP16 :
  136. print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
  137. break;
  138. case BPF_OPERAND_DISP32 :
  139. print_normal (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
  140. break;
  141. case BPF_OPERAND_DSTBE :
  142. print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstbe, 0);
  143. break;
  144. case BPF_OPERAND_DSTLE :
  145. print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstle, 0);
  146. break;
  147. case BPF_OPERAND_ENDSIZE :
  148. print_endsize (cd, info, fields->f_imm32, 0, pc, length);
  149. break;
  150. case BPF_OPERAND_IMM32 :
  151. print_immediate (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
  152. break;
  153. case BPF_OPERAND_IMM64 :
  154. print_immediate (cd, info, fields->f_imm64, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
  155. break;
  156. case BPF_OPERAND_OFFSET16 :
  157. print_immediate (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
  158. break;
  159. case BPF_OPERAND_SRCBE :
  160. print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcbe, 0);
  161. break;
  162. case BPF_OPERAND_SRCLE :
  163. print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcle, 0);
  164. break;
  165. default :
  166. /* xgettext:c-format */
  167. opcodes_error_handler
  168. (_("internal error: unrecognized field %d while printing insn"),
  169. opindex);
  170. abort ();
  171. }
  172. }
  173. cgen_print_fn * const bpf_cgen_print_handlers[] =
  174. {
  175. print_insn_normal,
  176. };
  177. void
  178. bpf_cgen_init_dis (CGEN_CPU_DESC cd)
  179. {
  180. bpf_cgen_init_opcode_table (cd);
  181. bpf_cgen_init_ibld_table (cd);
  182. cd->print_handlers = & bpf_cgen_print_handlers[0];
  183. cd->print_operand = bpf_cgen_print_operand;
  184. }
  185. /* Default print handler. */
  186. static void
  187. print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  188. void *dis_info,
  189. long value,
  190. unsigned int attrs,
  191. bfd_vma pc ATTRIBUTE_UNUSED,
  192. int length ATTRIBUTE_UNUSED)
  193. {
  194. disassemble_info *info = (disassemble_info *) dis_info;
  195. /* Print the operand as directed by the attributes. */
  196. if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
  197. ; /* nothing to do */
  198. else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
  199. (*info->fprintf_func) (info->stream, "%ld", value);
  200. else
  201. (*info->fprintf_func) (info->stream, "0x%lx", value);
  202. }
  203. /* Default address handler. */
  204. static void
  205. print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  206. void *dis_info,
  207. bfd_vma value,
  208. unsigned int attrs,
  209. bfd_vma pc ATTRIBUTE_UNUSED,
  210. int length ATTRIBUTE_UNUSED)
  211. {
  212. disassemble_info *info = (disassemble_info *) dis_info;
  213. /* Print the operand as directed by the attributes. */
  214. if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
  215. ; /* Nothing to do. */
  216. else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
  217. (*info->print_address_func) (value, info);
  218. else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
  219. (*info->print_address_func) (value, info);
  220. else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
  221. (*info->fprintf_func) (info->stream, "%ld", (long) value);
  222. else
  223. (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
  224. }
  225. /* Keyword print handler. */
  226. static void
  227. print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  228. void *dis_info,
  229. CGEN_KEYWORD *keyword_table,
  230. long value,
  231. unsigned int attrs ATTRIBUTE_UNUSED)
  232. {
  233. disassemble_info *info = (disassemble_info *) dis_info;
  234. const CGEN_KEYWORD_ENTRY *ke;
  235. ke = cgen_keyword_lookup_value (keyword_table, value);
  236. if (ke != NULL)
  237. (*info->fprintf_func) (info->stream, "%s", ke->name);
  238. else
  239. (*info->fprintf_func) (info->stream, "???");
  240. }
  241. /* Default insn printer.
  242. DIS_INFO is defined as `void *' so the disassembler needn't know anything
  243. about disassemble_info. */
  244. static void
  245. print_insn_normal (CGEN_CPU_DESC cd,
  246. void *dis_info,
  247. const CGEN_INSN *insn,
  248. CGEN_FIELDS *fields,
  249. bfd_vma pc,
  250. int length)
  251. {
  252. const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
  253. disassemble_info *info = (disassemble_info *) dis_info;
  254. const CGEN_SYNTAX_CHAR_TYPE *syn;
  255. CGEN_INIT_PRINT (cd);
  256. for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
  257. {
  258. if (CGEN_SYNTAX_MNEMONIC_P (*syn))
  259. {
  260. (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
  261. continue;
  262. }
  263. if (CGEN_SYNTAX_CHAR_P (*syn))
  264. {
  265. (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
  266. continue;
  267. }
  268. /* We have an operand. */
  269. bpf_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
  270. fields, CGEN_INSN_ATTRS (insn), pc, length);
  271. }
  272. }
  273. /* Subroutine of print_insn. Reads an insn into the given buffers and updates
  274. the extract info.
  275. Returns 0 if all is well, non-zero otherwise. */
  276. static int
  277. read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  278. bfd_vma pc,
  279. disassemble_info *info,
  280. bfd_byte *buf,
  281. int buflen,
  282. CGEN_EXTRACT_INFO *ex_info,
  283. unsigned long *insn_value)
  284. {
  285. int status = (*info->read_memory_func) (pc, buf, buflen, info);
  286. if (status != 0)
  287. {
  288. (*info->memory_error_func) (status, pc, info);
  289. return -1;
  290. }
  291. ex_info->dis_info = info;
  292. ex_info->valid = (1 << buflen) - 1;
  293. ex_info->insn_bytes = buf;
  294. *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
  295. return 0;
  296. }
  297. /* Utility to print an insn.
  298. BUF is the base part of the insn, target byte order, BUFLEN bytes long.
  299. The result is the size of the insn in bytes or zero for an unknown insn
  300. or -1 if an error occurs fetching data (memory_error_func will have
  301. been called). */
  302. static int
  303. print_insn (CGEN_CPU_DESC cd,
  304. bfd_vma pc,
  305. disassemble_info *info,
  306. bfd_byte *buf,
  307. unsigned int buflen)
  308. {
  309. CGEN_INSN_INT insn_value;
  310. const CGEN_INSN_LIST *insn_list;
  311. CGEN_EXTRACT_INFO ex_info;
  312. int basesize;
  313. /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
  314. basesize = cd->base_insn_bitsize < buflen * 8 ?
  315. cd->base_insn_bitsize : buflen * 8;
  316. insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
  317. /* Fill in ex_info fields like read_insn would. Don't actually call
  318. read_insn, since the incoming buffer is already read (and possibly
  319. modified a la m32r). */
  320. ex_info.valid = (1 << buflen) - 1;
  321. ex_info.dis_info = info;
  322. ex_info.insn_bytes = buf;
  323. /* The instructions are stored in hash lists.
  324. Pick the first one and keep trying until we find the right one. */
  325. insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
  326. while (insn_list != NULL)
  327. {
  328. const CGEN_INSN *insn = insn_list->insn;
  329. CGEN_FIELDS fields;
  330. int length;
  331. unsigned long insn_value_cropped;
  332. #ifdef CGEN_VALIDATE_INSN_SUPPORTED
  333. /* Not needed as insn shouldn't be in hash lists if not supported. */
  334. /* Supported by this cpu? */
  335. if (! bpf_cgen_insn_supported (cd, insn))
  336. {
  337. insn_list = CGEN_DIS_NEXT_INSN (insn_list);
  338. continue;
  339. }
  340. #endif
  341. /* Basic bit mask must be correct. */
  342. /* ??? May wish to allow target to defer this check until the extract
  343. handler. */
  344. /* Base size may exceed this instruction's size. Extract the
  345. relevant part from the buffer. */
  346. if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
  347. (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
  348. insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
  349. info->endian == BFD_ENDIAN_BIG);
  350. else
  351. insn_value_cropped = insn_value;
  352. if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
  353. == CGEN_INSN_BASE_VALUE (insn))
  354. {
  355. /* Printing is handled in two passes. The first pass parses the
  356. machine insn and extracts the fields. The second pass prints
  357. them. */
  358. /* Make sure the entire insn is loaded into insn_value, if it
  359. can fit. */
  360. if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
  361. (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
  362. {
  363. unsigned long full_insn_value;
  364. int rc = read_insn (cd, pc, info, buf,
  365. CGEN_INSN_BITSIZE (insn) / 8,
  366. & ex_info, & full_insn_value);
  367. if (rc != 0)
  368. return rc;
  369. length = CGEN_EXTRACT_FN (cd, insn)
  370. (cd, insn, &ex_info, full_insn_value, &fields, pc);
  371. }
  372. else
  373. length = CGEN_EXTRACT_FN (cd, insn)
  374. (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
  375. /* Length < 0 -> error. */
  376. if (length < 0)
  377. return length;
  378. if (length > 0)
  379. {
  380. CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
  381. /* Length is in bits, result is in bytes. */
  382. return length / 8;
  383. }
  384. }
  385. insn_list = CGEN_DIS_NEXT_INSN (insn_list);
  386. }
  387. return 0;
  388. }
  389. /* Default value for CGEN_PRINT_INSN.
  390. The result is the size of the insn in bytes or zero for an unknown insn
  391. or -1 if an error occured fetching bytes. */
  392. #ifndef CGEN_PRINT_INSN
  393. #define CGEN_PRINT_INSN default_print_insn
  394. #endif
  395. static int
  396. default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
  397. {
  398. bfd_byte buf[CGEN_MAX_INSN_SIZE];
  399. int buflen;
  400. int status;
  401. /* Attempt to read the base part of the insn. */
  402. buflen = cd->base_insn_bitsize / 8;
  403. status = (*info->read_memory_func) (pc, buf, buflen, info);
  404. /* Try again with the minimum part, if min < base. */
  405. if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
  406. {
  407. buflen = cd->min_insn_bitsize / 8;
  408. status = (*info->read_memory_func) (pc, buf, buflen, info);
  409. }
  410. if (status != 0)
  411. {
  412. (*info->memory_error_func) (status, pc, info);
  413. return -1;
  414. }
  415. return print_insn (cd, pc, info, buf, buflen);
  416. }
  417. /* Main entry point.
  418. Print one instruction from PC on INFO->STREAM.
  419. Return the size of the instruction (in bytes). */
  420. typedef struct cpu_desc_list
  421. {
  422. struct cpu_desc_list *next;
  423. CGEN_BITSET *isa;
  424. int mach;
  425. int endian;
  426. int insn_endian;
  427. CGEN_CPU_DESC cd;
  428. } cpu_desc_list;
  429. int
  430. print_insn_bpf (bfd_vma pc, disassemble_info *info)
  431. {
  432. static cpu_desc_list *cd_list = 0;
  433. cpu_desc_list *cl = 0;
  434. static CGEN_CPU_DESC cd = 0;
  435. static CGEN_BITSET *prev_isa;
  436. static int prev_mach;
  437. static int prev_endian;
  438. static int prev_insn_endian;
  439. int length;
  440. CGEN_BITSET *isa;
  441. int mach;
  442. int endian = (info->endian == BFD_ENDIAN_BIG
  443. ? CGEN_ENDIAN_BIG
  444. : CGEN_ENDIAN_LITTLE);
  445. int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
  446. ? CGEN_ENDIAN_BIG
  447. : CGEN_ENDIAN_LITTLE);
  448. enum bfd_architecture arch;
  449. /* ??? gdb will set mach but leave the architecture as "unknown" */
  450. #ifndef CGEN_BFD_ARCH
  451. #define CGEN_BFD_ARCH bfd_arch_bpf
  452. #endif
  453. arch = info->arch;
  454. if (arch == bfd_arch_unknown)
  455. arch = CGEN_BFD_ARCH;
  456. /* There's no standard way to compute the machine or isa number
  457. so we leave it to the target. */
  458. #ifdef CGEN_COMPUTE_MACH
  459. mach = CGEN_COMPUTE_MACH (info);
  460. #else
  461. mach = info->mach;
  462. #endif
  463. #ifdef CGEN_COMPUTE_ISA
  464. {
  465. static CGEN_BITSET *permanent_isa;
  466. if (!permanent_isa)
  467. permanent_isa = cgen_bitset_create (MAX_ISAS);
  468. isa = permanent_isa;
  469. cgen_bitset_clear (isa);
  470. cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
  471. }
  472. #else
  473. isa = info->private_data;
  474. #endif
  475. /* If we've switched cpu's, try to find a handle we've used before */
  476. if (cd
  477. && (cgen_bitset_compare (isa, prev_isa) != 0
  478. || mach != prev_mach
  479. || endian != prev_endian))
  480. {
  481. cd = 0;
  482. for (cl = cd_list; cl; cl = cl->next)
  483. {
  484. if (cgen_bitset_compare (cl->isa, isa) == 0 &&
  485. cl->mach == mach &&
  486. cl->endian == endian)
  487. {
  488. cd = cl->cd;
  489. prev_isa = cd->isas;
  490. break;
  491. }
  492. }
  493. }
  494. /* If we haven't initialized yet, initialize the opcode table. */
  495. if (! cd)
  496. {
  497. const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
  498. const char *mach_name;
  499. if (!arch_type)
  500. abort ();
  501. mach_name = arch_type->printable_name;
  502. prev_isa = cgen_bitset_copy (isa);
  503. prev_mach = mach;
  504. prev_endian = endian;
  505. prev_insn_endian = insn_endian;
  506. cd = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
  507. CGEN_CPU_OPEN_BFDMACH, mach_name,
  508. CGEN_CPU_OPEN_ENDIAN, prev_endian,
  509. CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
  510. CGEN_CPU_OPEN_END);
  511. if (!cd)
  512. abort ();
  513. /* Save this away for future reference. */
  514. cl = xmalloc (sizeof (struct cpu_desc_list));
  515. cl->cd = cd;
  516. cl->isa = prev_isa;
  517. cl->mach = mach;
  518. cl->endian = endian;
  519. cl->next = cd_list;
  520. cd_list = cl;
  521. bpf_cgen_init_dis (cd);
  522. }
  523. /* We try to have as much common code as possible.
  524. But at this point some targets need to take over. */
  525. /* ??? Some targets may need a hook elsewhere. Try to avoid this,
  526. but if not possible try to move this hook elsewhere rather than
  527. have two hooks. */
  528. length = CGEN_PRINT_INSN (cd, pc, info);
  529. if (length > 0)
  530. return length;
  531. if (length < 0)
  532. return -1;
  533. (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
  534. return cd->default_insn_bitsize / 8;
  535. }