frv-desc.c 319 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498
  1. /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
  2. /* CPU data for frv.
  3. THIS FILE IS MACHINE GENERATED WITH CGEN.
  4. Copyright (C) 1996-2022 Free Software Foundation, Inc.
  5. This file is part of the GNU Binutils and/or GDB, the GNU debugger.
  6. This file is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 3, or (at your option)
  9. any later version.
  10. It is distributed in the hope that it will be useful, but WITHOUT
  11. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  13. License for more details.
  14. You should have received a copy of the GNU General Public License along
  15. with this program; if not, write to the Free Software Foundation, Inc.,
  16. 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  17. */
  18. #include "sysdep.h"
  19. #include <stdio.h>
  20. #include <stdarg.h>
  21. #include <stdlib.h>
  22. #include "ansidecl.h"
  23. #include "bfd.h"
  24. #include "symcat.h"
  25. #include "frv-desc.h"
  26. #include "frv-opc.h"
  27. #include "opintl.h"
  28. #include "libiberty.h"
  29. #include "xregex.h"
  30. /* Attributes. */
  31. static const CGEN_ATTR_ENTRY bool_attr[] =
  32. {
  33. { "#f", 0 },
  34. { "#t", 1 },
  35. { 0, 0 }
  36. };
  37. static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
  38. {
  39. { "base", MACH_BASE },
  40. { "frv", MACH_FRV },
  41. { "fr550", MACH_FR550 },
  42. { "fr500", MACH_FR500 },
  43. { "fr450", MACH_FR450 },
  44. { "fr400", MACH_FR400 },
  45. { "tomcat", MACH_TOMCAT },
  46. { "simple", MACH_SIMPLE },
  47. { "max", MACH_MAX },
  48. { 0, 0 }
  49. };
  50. static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
  51. {
  52. { "frv", ISA_FRV },
  53. { "max", ISA_MAX },
  54. { 0, 0 }
  55. };
  56. static const CGEN_ATTR_ENTRY UNIT_attr[] ATTRIBUTE_UNUSED =
  57. {
  58. { "NIL", UNIT_NIL },
  59. { "I0", UNIT_I0 },
  60. { "I1", UNIT_I1 },
  61. { "I01", UNIT_I01 },
  62. { "I2", UNIT_I2 },
  63. { "I3", UNIT_I3 },
  64. { "IALL", UNIT_IALL },
  65. { "FM0", UNIT_FM0 },
  66. { "FM1", UNIT_FM1 },
  67. { "FM01", UNIT_FM01 },
  68. { "FM2", UNIT_FM2 },
  69. { "FM3", UNIT_FM3 },
  70. { "FMALL", UNIT_FMALL },
  71. { "FMLOW", UNIT_FMLOW },
  72. { "B0", UNIT_B0 },
  73. { "B1", UNIT_B1 },
  74. { "B01", UNIT_B01 },
  75. { "C", UNIT_C },
  76. { "MULT_DIV", UNIT_MULT_DIV },
  77. { "IACC", UNIT_IACC },
  78. { "LOAD", UNIT_LOAD },
  79. { "STORE", UNIT_STORE },
  80. { "SCAN", UNIT_SCAN },
  81. { "DCPL", UNIT_DCPL },
  82. { "MDUALACC", UNIT_MDUALACC },
  83. { "MDCUTSSI", UNIT_MDCUTSSI },
  84. { "MCLRACC_1", UNIT_MCLRACC_1 },
  85. { "NUM_UNITS", UNIT_NUM_UNITS },
  86. { 0, 0 }
  87. };
  88. static const CGEN_ATTR_ENTRY FR400_MAJOR_attr[] ATTRIBUTE_UNUSED =
  89. {
  90. { "NONE", FR400_MAJOR_NONE },
  91. { "I_1", FR400_MAJOR_I_1 },
  92. { "I_2", FR400_MAJOR_I_2 },
  93. { "I_3", FR400_MAJOR_I_3 },
  94. { "I_4", FR400_MAJOR_I_4 },
  95. { "I_5", FR400_MAJOR_I_5 },
  96. { "B_1", FR400_MAJOR_B_1 },
  97. { "B_2", FR400_MAJOR_B_2 },
  98. { "B_3", FR400_MAJOR_B_3 },
  99. { "B_4", FR400_MAJOR_B_4 },
  100. { "B_5", FR400_MAJOR_B_5 },
  101. { "B_6", FR400_MAJOR_B_6 },
  102. { "C_1", FR400_MAJOR_C_1 },
  103. { "C_2", FR400_MAJOR_C_2 },
  104. { "M_1", FR400_MAJOR_M_1 },
  105. { "M_2", FR400_MAJOR_M_2 },
  106. { 0, 0 }
  107. };
  108. static const CGEN_ATTR_ENTRY FR450_MAJOR_attr[] ATTRIBUTE_UNUSED =
  109. {
  110. { "NONE", FR450_MAJOR_NONE },
  111. { "I_1", FR450_MAJOR_I_1 },
  112. { "I_2", FR450_MAJOR_I_2 },
  113. { "I_3", FR450_MAJOR_I_3 },
  114. { "I_4", FR450_MAJOR_I_4 },
  115. { "I_5", FR450_MAJOR_I_5 },
  116. { "B_1", FR450_MAJOR_B_1 },
  117. { "B_2", FR450_MAJOR_B_2 },
  118. { "B_3", FR450_MAJOR_B_3 },
  119. { "B_4", FR450_MAJOR_B_4 },
  120. { "B_5", FR450_MAJOR_B_5 },
  121. { "B_6", FR450_MAJOR_B_6 },
  122. { "C_1", FR450_MAJOR_C_1 },
  123. { "C_2", FR450_MAJOR_C_2 },
  124. { "M_1", FR450_MAJOR_M_1 },
  125. { "M_2", FR450_MAJOR_M_2 },
  126. { "M_3", FR450_MAJOR_M_3 },
  127. { "M_4", FR450_MAJOR_M_4 },
  128. { "M_5", FR450_MAJOR_M_5 },
  129. { "M_6", FR450_MAJOR_M_6 },
  130. { 0, 0 }
  131. };
  132. static const CGEN_ATTR_ENTRY FR500_MAJOR_attr[] ATTRIBUTE_UNUSED =
  133. {
  134. { "NONE", FR500_MAJOR_NONE },
  135. { "I_1", FR500_MAJOR_I_1 },
  136. { "I_2", FR500_MAJOR_I_2 },
  137. { "I_3", FR500_MAJOR_I_3 },
  138. { "I_4", FR500_MAJOR_I_4 },
  139. { "I_5", FR500_MAJOR_I_5 },
  140. { "I_6", FR500_MAJOR_I_6 },
  141. { "B_1", FR500_MAJOR_B_1 },
  142. { "B_2", FR500_MAJOR_B_2 },
  143. { "B_3", FR500_MAJOR_B_3 },
  144. { "B_4", FR500_MAJOR_B_4 },
  145. { "B_5", FR500_MAJOR_B_5 },
  146. { "B_6", FR500_MAJOR_B_6 },
  147. { "C_1", FR500_MAJOR_C_1 },
  148. { "C_2", FR500_MAJOR_C_2 },
  149. { "F_1", FR500_MAJOR_F_1 },
  150. { "F_2", FR500_MAJOR_F_2 },
  151. { "F_3", FR500_MAJOR_F_3 },
  152. { "F_4", FR500_MAJOR_F_4 },
  153. { "F_5", FR500_MAJOR_F_5 },
  154. { "F_6", FR500_MAJOR_F_6 },
  155. { "F_7", FR500_MAJOR_F_7 },
  156. { "F_8", FR500_MAJOR_F_8 },
  157. { "M_1", FR500_MAJOR_M_1 },
  158. { "M_2", FR500_MAJOR_M_2 },
  159. { "M_3", FR500_MAJOR_M_3 },
  160. { "M_4", FR500_MAJOR_M_4 },
  161. { "M_5", FR500_MAJOR_M_5 },
  162. { "M_6", FR500_MAJOR_M_6 },
  163. { "M_7", FR500_MAJOR_M_7 },
  164. { "M_8", FR500_MAJOR_M_8 },
  165. { 0, 0 }
  166. };
  167. static const CGEN_ATTR_ENTRY FR550_MAJOR_attr[] ATTRIBUTE_UNUSED =
  168. {
  169. { "NONE", FR550_MAJOR_NONE },
  170. { "I_1", FR550_MAJOR_I_1 },
  171. { "I_2", FR550_MAJOR_I_2 },
  172. { "I_3", FR550_MAJOR_I_3 },
  173. { "I_4", FR550_MAJOR_I_4 },
  174. { "I_5", FR550_MAJOR_I_5 },
  175. { "I_6", FR550_MAJOR_I_6 },
  176. { "I_7", FR550_MAJOR_I_7 },
  177. { "I_8", FR550_MAJOR_I_8 },
  178. { "B_1", FR550_MAJOR_B_1 },
  179. { "B_2", FR550_MAJOR_B_2 },
  180. { "B_3", FR550_MAJOR_B_3 },
  181. { "B_4", FR550_MAJOR_B_4 },
  182. { "B_5", FR550_MAJOR_B_5 },
  183. { "B_6", FR550_MAJOR_B_6 },
  184. { "C_1", FR550_MAJOR_C_1 },
  185. { "C_2", FR550_MAJOR_C_2 },
  186. { "F_1", FR550_MAJOR_F_1 },
  187. { "F_2", FR550_MAJOR_F_2 },
  188. { "F_3", FR550_MAJOR_F_3 },
  189. { "F_4", FR550_MAJOR_F_4 },
  190. { "M_1", FR550_MAJOR_M_1 },
  191. { "M_2", FR550_MAJOR_M_2 },
  192. { "M_3", FR550_MAJOR_M_3 },
  193. { "M_4", FR550_MAJOR_M_4 },
  194. { "M_5", FR550_MAJOR_M_5 },
  195. { 0, 0 }
  196. };
  197. const CGEN_ATTR_TABLE frv_cgen_ifield_attr_table[] =
  198. {
  199. { "MACH", & MACH_attr[0], & MACH_attr[0] },
  200. { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  201. { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
  202. { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
  203. { "RESERVED", &bool_attr[0], &bool_attr[0] },
  204. { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
  205. { "SIGNED", &bool_attr[0], &bool_attr[0] },
  206. { 0, 0, 0 }
  207. };
  208. const CGEN_ATTR_TABLE frv_cgen_hardware_attr_table[] =
  209. {
  210. { "MACH", & MACH_attr[0], & MACH_attr[0] },
  211. { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  212. { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
  213. { "PC", &bool_attr[0], &bool_attr[0] },
  214. { "PROFILE", &bool_attr[0], &bool_attr[0] },
  215. { 0, 0, 0 }
  216. };
  217. const CGEN_ATTR_TABLE frv_cgen_operand_attr_table[] =
  218. {
  219. { "MACH", & MACH_attr[0], & MACH_attr[0] },
  220. { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  221. { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
  222. { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
  223. { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
  224. { "SIGNED", &bool_attr[0], &bool_attr[0] },
  225. { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
  226. { "RELAX", &bool_attr[0], &bool_attr[0] },
  227. { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
  228. { "HASH-PREFIX", &bool_attr[0], &bool_attr[0] },
  229. { 0, 0, 0 }
  230. };
  231. const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[] =
  232. {
  233. { "MACH", & MACH_attr[0], & MACH_attr[0] },
  234. { "UNIT", & UNIT_attr[0], & UNIT_attr[0] },
  235. { "FR400-MAJOR", & FR400_MAJOR_attr[0], & FR400_MAJOR_attr[0] },
  236. { "FR450-MAJOR", & FR450_MAJOR_attr[0], & FR450_MAJOR_attr[0] },
  237. { "FR500-MAJOR", & FR500_MAJOR_attr[0], & FR500_MAJOR_attr[0] },
  238. { "FR550-MAJOR", & FR550_MAJOR_attr[0], & FR550_MAJOR_attr[0] },
  239. { "ALIAS", &bool_attr[0], &bool_attr[0] },
  240. { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  241. { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
  242. { "COND-CTI", &bool_attr[0], &bool_attr[0] },
  243. { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
  244. { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
  245. { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
  246. { "RELAXED", &bool_attr[0], &bool_attr[0] },
  247. { "NO-DIS", &bool_attr[0], &bool_attr[0] },
  248. { "PBB", &bool_attr[0], &bool_attr[0] },
  249. { "PRIVILEGED", &bool_attr[0], &bool_attr[0] },
  250. { "NON-EXCEPTING", &bool_attr[0], &bool_attr[0] },
  251. { "CONDITIONAL", &bool_attr[0], &bool_attr[0] },
  252. { "FR-ACCESS", &bool_attr[0], &bool_attr[0] },
  253. { "PRESERVE-OVF", &bool_attr[0], &bool_attr[0] },
  254. { "AUDIO", &bool_attr[0], &bool_attr[0] },
  255. { 0, 0, 0 }
  256. };
  257. /* Instruction set variants. */
  258. static const CGEN_ISA frv_cgen_isa_table[] = {
  259. { "frv", 32, 32, 32, 32 },
  260. { 0, 0, 0, 0, 0 }
  261. };
  262. /* Machine variants. */
  263. static const CGEN_MACH frv_cgen_mach_table[] = {
  264. { "frv", "frv", MACH_FRV, 0 },
  265. { "fr550", "fr550", MACH_FR550, 0 },
  266. { "fr500", "fr500", MACH_FR500, 0 },
  267. { "tomcat", "tomcat", MACH_TOMCAT, 0 },
  268. { "fr400", "fr400", MACH_FR400, 0 },
  269. { "fr450", "fr450", MACH_FR450, 0 },
  270. { "simple", "simple", MACH_SIMPLE, 0 },
  271. { 0, 0, 0, 0 }
  272. };
  273. static CGEN_KEYWORD_ENTRY frv_cgen_opval_gr_names_entries[] =
  274. {
  275. { "sp", 1, {0, {{{0, 0}}}}, 0, 0 },
  276. { "fp", 2, {0, {{{0, 0}}}}, 0, 0 },
  277. { "gr0", 0, {0, {{{0, 0}}}}, 0, 0 },
  278. { "gr1", 1, {0, {{{0, 0}}}}, 0, 0 },
  279. { "gr2", 2, {0, {{{0, 0}}}}, 0, 0 },
  280. { "gr3", 3, {0, {{{0, 0}}}}, 0, 0 },
  281. { "gr4", 4, {0, {{{0, 0}}}}, 0, 0 },
  282. { "gr5", 5, {0, {{{0, 0}}}}, 0, 0 },
  283. { "gr6", 6, {0, {{{0, 0}}}}, 0, 0 },
  284. { "gr7", 7, {0, {{{0, 0}}}}, 0, 0 },
  285. { "gr8", 8, {0, {{{0, 0}}}}, 0, 0 },
  286. { "gr9", 9, {0, {{{0, 0}}}}, 0, 0 },
  287. { "gr10", 10, {0, {{{0, 0}}}}, 0, 0 },
  288. { "gr11", 11, {0, {{{0, 0}}}}, 0, 0 },
  289. { "gr12", 12, {0, {{{0, 0}}}}, 0, 0 },
  290. { "gr13", 13, {0, {{{0, 0}}}}, 0, 0 },
  291. { "gr14", 14, {0, {{{0, 0}}}}, 0, 0 },
  292. { "gr15", 15, {0, {{{0, 0}}}}, 0, 0 },
  293. { "gr16", 16, {0, {{{0, 0}}}}, 0, 0 },
  294. { "gr17", 17, {0, {{{0, 0}}}}, 0, 0 },
  295. { "gr18", 18, {0, {{{0, 0}}}}, 0, 0 },
  296. { "gr19", 19, {0, {{{0, 0}}}}, 0, 0 },
  297. { "gr20", 20, {0, {{{0, 0}}}}, 0, 0 },
  298. { "gr21", 21, {0, {{{0, 0}}}}, 0, 0 },
  299. { "gr22", 22, {0, {{{0, 0}}}}, 0, 0 },
  300. { "gr23", 23, {0, {{{0, 0}}}}, 0, 0 },
  301. { "gr24", 24, {0, {{{0, 0}}}}, 0, 0 },
  302. { "gr25", 25, {0, {{{0, 0}}}}, 0, 0 },
  303. { "gr26", 26, {0, {{{0, 0}}}}, 0, 0 },
  304. { "gr27", 27, {0, {{{0, 0}}}}, 0, 0 },
  305. { "gr28", 28, {0, {{{0, 0}}}}, 0, 0 },
  306. { "gr29", 29, {0, {{{0, 0}}}}, 0, 0 },
  307. { "gr30", 30, {0, {{{0, 0}}}}, 0, 0 },
  308. { "gr31", 31, {0, {{{0, 0}}}}, 0, 0 },
  309. { "gr32", 32, {0, {{{0, 0}}}}, 0, 0 },
  310. { "gr33", 33, {0, {{{0, 0}}}}, 0, 0 },
  311. { "gr34", 34, {0, {{{0, 0}}}}, 0, 0 },
  312. { "gr35", 35, {0, {{{0, 0}}}}, 0, 0 },
  313. { "gr36", 36, {0, {{{0, 0}}}}, 0, 0 },
  314. { "gr37", 37, {0, {{{0, 0}}}}, 0, 0 },
  315. { "gr38", 38, {0, {{{0, 0}}}}, 0, 0 },
  316. { "gr39", 39, {0, {{{0, 0}}}}, 0, 0 },
  317. { "gr40", 40, {0, {{{0, 0}}}}, 0, 0 },
  318. { "gr41", 41, {0, {{{0, 0}}}}, 0, 0 },
  319. { "gr42", 42, {0, {{{0, 0}}}}, 0, 0 },
  320. { "gr43", 43, {0, {{{0, 0}}}}, 0, 0 },
  321. { "gr44", 44, {0, {{{0, 0}}}}, 0, 0 },
  322. { "gr45", 45, {0, {{{0, 0}}}}, 0, 0 },
  323. { "gr46", 46, {0, {{{0, 0}}}}, 0, 0 },
  324. { "gr47", 47, {0, {{{0, 0}}}}, 0, 0 },
  325. { "gr48", 48, {0, {{{0, 0}}}}, 0, 0 },
  326. { "gr49", 49, {0, {{{0, 0}}}}, 0, 0 },
  327. { "gr50", 50, {0, {{{0, 0}}}}, 0, 0 },
  328. { "gr51", 51, {0, {{{0, 0}}}}, 0, 0 },
  329. { "gr52", 52, {0, {{{0, 0}}}}, 0, 0 },
  330. { "gr53", 53, {0, {{{0, 0}}}}, 0, 0 },
  331. { "gr54", 54, {0, {{{0, 0}}}}, 0, 0 },
  332. { "gr55", 55, {0, {{{0, 0}}}}, 0, 0 },
  333. { "gr56", 56, {0, {{{0, 0}}}}, 0, 0 },
  334. { "gr57", 57, {0, {{{0, 0}}}}, 0, 0 },
  335. { "gr58", 58, {0, {{{0, 0}}}}, 0, 0 },
  336. { "gr59", 59, {0, {{{0, 0}}}}, 0, 0 },
  337. { "gr60", 60, {0, {{{0, 0}}}}, 0, 0 },
  338. { "gr61", 61, {0, {{{0, 0}}}}, 0, 0 },
  339. { "gr62", 62, {0, {{{0, 0}}}}, 0, 0 },
  340. { "gr63", 63, {0, {{{0, 0}}}}, 0, 0 }
  341. };
  342. CGEN_KEYWORD frv_cgen_opval_gr_names =
  343. {
  344. & frv_cgen_opval_gr_names_entries[0],
  345. 66,
  346. 0, 0, 0, 0, ""
  347. };
  348. static CGEN_KEYWORD_ENTRY frv_cgen_opval_fr_names_entries[] =
  349. {
  350. { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
  351. { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
  352. { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
  353. { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
  354. { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
  355. { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
  356. { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
  357. { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
  358. { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
  359. { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
  360. { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
  361. { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
  362. { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
  363. { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
  364. { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
  365. { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 },
  366. { "fr16", 16, {0, {{{0, 0}}}}, 0, 0 },
  367. { "fr17", 17, {0, {{{0, 0}}}}, 0, 0 },
  368. { "fr18", 18, {0, {{{0, 0}}}}, 0, 0 },
  369. { "fr19", 19, {0, {{{0, 0}}}}, 0, 0 },
  370. { "fr20", 20, {0, {{{0, 0}}}}, 0, 0 },
  371. { "fr21", 21, {0, {{{0, 0}}}}, 0, 0 },
  372. { "fr22", 22, {0, {{{0, 0}}}}, 0, 0 },
  373. { "fr23", 23, {0, {{{0, 0}}}}, 0, 0 },
  374. { "fr24", 24, {0, {{{0, 0}}}}, 0, 0 },
  375. { "fr25", 25, {0, {{{0, 0}}}}, 0, 0 },
  376. { "fr26", 26, {0, {{{0, 0}}}}, 0, 0 },
  377. { "fr27", 27, {0, {{{0, 0}}}}, 0, 0 },
  378. { "fr28", 28, {0, {{{0, 0}}}}, 0, 0 },
  379. { "fr29", 29, {0, {{{0, 0}}}}, 0, 0 },
  380. { "fr30", 30, {0, {{{0, 0}}}}, 0, 0 },
  381. { "fr31", 31, {0, {{{0, 0}}}}, 0, 0 },
  382. { "fr32", 32, {0, {{{0, 0}}}}, 0, 0 },
  383. { "fr33", 33, {0, {{{0, 0}}}}, 0, 0 },
  384. { "fr34", 34, {0, {{{0, 0}}}}, 0, 0 },
  385. { "fr35", 35, {0, {{{0, 0}}}}, 0, 0 },
  386. { "fr36", 36, {0, {{{0, 0}}}}, 0, 0 },
  387. { "fr37", 37, {0, {{{0, 0}}}}, 0, 0 },
  388. { "fr38", 38, {0, {{{0, 0}}}}, 0, 0 },
  389. { "fr39", 39, {0, {{{0, 0}}}}, 0, 0 },
  390. { "fr40", 40, {0, {{{0, 0}}}}, 0, 0 },
  391. { "fr41", 41, {0, {{{0, 0}}}}, 0, 0 },
  392. { "fr42", 42, {0, {{{0, 0}}}}, 0, 0 },
  393. { "fr43", 43, {0, {{{0, 0}}}}, 0, 0 },
  394. { "fr44", 44, {0, {{{0, 0}}}}, 0, 0 },
  395. { "fr45", 45, {0, {{{0, 0}}}}, 0, 0 },
  396. { "fr46", 46, {0, {{{0, 0}}}}, 0, 0 },
  397. { "fr47", 47, {0, {{{0, 0}}}}, 0, 0 },
  398. { "fr48", 48, {0, {{{0, 0}}}}, 0, 0 },
  399. { "fr49", 49, {0, {{{0, 0}}}}, 0, 0 },
  400. { "fr50", 50, {0, {{{0, 0}}}}, 0, 0 },
  401. { "fr51", 51, {0, {{{0, 0}}}}, 0, 0 },
  402. { "fr52", 52, {0, {{{0, 0}}}}, 0, 0 },
  403. { "fr53", 53, {0, {{{0, 0}}}}, 0, 0 },
  404. { "fr54", 54, {0, {{{0, 0}}}}, 0, 0 },
  405. { "fr55", 55, {0, {{{0, 0}}}}, 0, 0 },
  406. { "fr56", 56, {0, {{{0, 0}}}}, 0, 0 },
  407. { "fr57", 57, {0, {{{0, 0}}}}, 0, 0 },
  408. { "fr58", 58, {0, {{{0, 0}}}}, 0, 0 },
  409. { "fr59", 59, {0, {{{0, 0}}}}, 0, 0 },
  410. { "fr60", 60, {0, {{{0, 0}}}}, 0, 0 },
  411. { "fr61", 61, {0, {{{0, 0}}}}, 0, 0 },
  412. { "fr62", 62, {0, {{{0, 0}}}}, 0, 0 },
  413. { "fr63", 63, {0, {{{0, 0}}}}, 0, 0 }
  414. };
  415. CGEN_KEYWORD frv_cgen_opval_fr_names =
  416. {
  417. & frv_cgen_opval_fr_names_entries[0],
  418. 64,
  419. 0, 0, 0, 0, ""
  420. };
  421. static CGEN_KEYWORD_ENTRY frv_cgen_opval_cpr_names_entries[] =
  422. {
  423. { "cpr0", 0, {0, {{{0, 0}}}}, 0, 0 },
  424. { "cpr1", 1, {0, {{{0, 0}}}}, 0, 0 },
  425. { "cpr2", 2, {0, {{{0, 0}}}}, 0, 0 },
  426. { "cpr3", 3, {0, {{{0, 0}}}}, 0, 0 },
  427. { "cpr4", 4, {0, {{{0, 0}}}}, 0, 0 },
  428. { "cpr5", 5, {0, {{{0, 0}}}}, 0, 0 },
  429. { "cpr6", 6, {0, {{{0, 0}}}}, 0, 0 },
  430. { "cpr7", 7, {0, {{{0, 0}}}}, 0, 0 },
  431. { "cpr8", 8, {0, {{{0, 0}}}}, 0, 0 },
  432. { "cpr9", 9, {0, {{{0, 0}}}}, 0, 0 },
  433. { "cpr10", 10, {0, {{{0, 0}}}}, 0, 0 },
  434. { "cpr11", 11, {0, {{{0, 0}}}}, 0, 0 },
  435. { "cpr12", 12, {0, {{{0, 0}}}}, 0, 0 },
  436. { "cpr13", 13, {0, {{{0, 0}}}}, 0, 0 },
  437. { "cpr14", 14, {0, {{{0, 0}}}}, 0, 0 },
  438. { "cpr15", 15, {0, {{{0, 0}}}}, 0, 0 },
  439. { "cpr16", 16, {0, {{{0, 0}}}}, 0, 0 },
  440. { "cpr17", 17, {0, {{{0, 0}}}}, 0, 0 },
  441. { "cpr18", 18, {0, {{{0, 0}}}}, 0, 0 },
  442. { "cpr19", 19, {0, {{{0, 0}}}}, 0, 0 },
  443. { "cpr20", 20, {0, {{{0, 0}}}}, 0, 0 },
  444. { "cpr21", 21, {0, {{{0, 0}}}}, 0, 0 },
  445. { "cpr22", 22, {0, {{{0, 0}}}}, 0, 0 },
  446. { "cpr23", 23, {0, {{{0, 0}}}}, 0, 0 },
  447. { "cpr24", 24, {0, {{{0, 0}}}}, 0, 0 },
  448. { "cpr25", 25, {0, {{{0, 0}}}}, 0, 0 },
  449. { "cpr26", 26, {0, {{{0, 0}}}}, 0, 0 },
  450. { "cpr27", 27, {0, {{{0, 0}}}}, 0, 0 },
  451. { "cpr28", 28, {0, {{{0, 0}}}}, 0, 0 },
  452. { "cpr29", 29, {0, {{{0, 0}}}}, 0, 0 },
  453. { "cpr30", 30, {0, {{{0, 0}}}}, 0, 0 },
  454. { "cpr31", 31, {0, {{{0, 0}}}}, 0, 0 },
  455. { "cpr32", 32, {0, {{{0, 0}}}}, 0, 0 },
  456. { "cpr33", 33, {0, {{{0, 0}}}}, 0, 0 },
  457. { "cpr34", 34, {0, {{{0, 0}}}}, 0, 0 },
  458. { "cpr35", 35, {0, {{{0, 0}}}}, 0, 0 },
  459. { "cpr36", 36, {0, {{{0, 0}}}}, 0, 0 },
  460. { "cpr37", 37, {0, {{{0, 0}}}}, 0, 0 },
  461. { "cpr38", 38, {0, {{{0, 0}}}}, 0, 0 },
  462. { "cpr39", 39, {0, {{{0, 0}}}}, 0, 0 },
  463. { "cpr40", 40, {0, {{{0, 0}}}}, 0, 0 },
  464. { "cpr41", 41, {0, {{{0, 0}}}}, 0, 0 },
  465. { "cpr42", 42, {0, {{{0, 0}}}}, 0, 0 },
  466. { "cpr43", 43, {0, {{{0, 0}}}}, 0, 0 },
  467. { "cpr44", 44, {0, {{{0, 0}}}}, 0, 0 },
  468. { "cpr45", 45, {0, {{{0, 0}}}}, 0, 0 },
  469. { "cpr46", 46, {0, {{{0, 0}}}}, 0, 0 },
  470. { "cpr47", 47, {0, {{{0, 0}}}}, 0, 0 },
  471. { "cpr48", 48, {0, {{{0, 0}}}}, 0, 0 },
  472. { "cpr49", 49, {0, {{{0, 0}}}}, 0, 0 },
  473. { "cpr50", 50, {0, {{{0, 0}}}}, 0, 0 },
  474. { "cpr51", 51, {0, {{{0, 0}}}}, 0, 0 },
  475. { "cpr52", 52, {0, {{{0, 0}}}}, 0, 0 },
  476. { "cpr53", 53, {0, {{{0, 0}}}}, 0, 0 },
  477. { "cpr54", 54, {0, {{{0, 0}}}}, 0, 0 },
  478. { "cpr55", 55, {0, {{{0, 0}}}}, 0, 0 },
  479. { "cpr56", 56, {0, {{{0, 0}}}}, 0, 0 },
  480. { "cpr57", 57, {0, {{{0, 0}}}}, 0, 0 },
  481. { "cpr58", 58, {0, {{{0, 0}}}}, 0, 0 },
  482. { "cpr59", 59, {0, {{{0, 0}}}}, 0, 0 },
  483. { "cpr60", 60, {0, {{{0, 0}}}}, 0, 0 },
  484. { "cpr61", 61, {0, {{{0, 0}}}}, 0, 0 },
  485. { "cpr62", 62, {0, {{{0, 0}}}}, 0, 0 },
  486. { "cpr63", 63, {0, {{{0, 0}}}}, 0, 0 }
  487. };
  488. CGEN_KEYWORD frv_cgen_opval_cpr_names =
  489. {
  490. & frv_cgen_opval_cpr_names_entries[0],
  491. 64,
  492. 0, 0, 0, 0, ""
  493. };
  494. static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
  495. {
  496. { "psr", 0, {0, {{{0, 0}}}}, 0, 0 },
  497. { "pcsr", 1, {0, {{{0, 0}}}}, 0, 0 },
  498. { "bpcsr", 2, {0, {{{0, 0}}}}, 0, 0 },
  499. { "tbr", 3, {0, {{{0, 0}}}}, 0, 0 },
  500. { "bpsr", 4, {0, {{{0, 0}}}}, 0, 0 },
  501. { "hsr0", 16, {0, {{{0, 0}}}}, 0, 0 },
  502. { "hsr1", 17, {0, {{{0, 0}}}}, 0, 0 },
  503. { "hsr2", 18, {0, {{{0, 0}}}}, 0, 0 },
  504. { "hsr3", 19, {0, {{{0, 0}}}}, 0, 0 },
  505. { "hsr4", 20, {0, {{{0, 0}}}}, 0, 0 },
  506. { "hsr5", 21, {0, {{{0, 0}}}}, 0, 0 },
  507. { "hsr6", 22, {0, {{{0, 0}}}}, 0, 0 },
  508. { "hsr7", 23, {0, {{{0, 0}}}}, 0, 0 },
  509. { "hsr8", 24, {0, {{{0, 0}}}}, 0, 0 },
  510. { "hsr9", 25, {0, {{{0, 0}}}}, 0, 0 },
  511. { "hsr10", 26, {0, {{{0, 0}}}}, 0, 0 },
  512. { "hsr11", 27, {0, {{{0, 0}}}}, 0, 0 },
  513. { "hsr12", 28, {0, {{{0, 0}}}}, 0, 0 },
  514. { "hsr13", 29, {0, {{{0, 0}}}}, 0, 0 },
  515. { "hsr14", 30, {0, {{{0, 0}}}}, 0, 0 },
  516. { "hsr15", 31, {0, {{{0, 0}}}}, 0, 0 },
  517. { "hsr16", 32, {0, {{{0, 0}}}}, 0, 0 },
  518. { "hsr17", 33, {0, {{{0, 0}}}}, 0, 0 },
  519. { "hsr18", 34, {0, {{{0, 0}}}}, 0, 0 },
  520. { "hsr19", 35, {0, {{{0, 0}}}}, 0, 0 },
  521. { "hsr20", 36, {0, {{{0, 0}}}}, 0, 0 },
  522. { "hsr21", 37, {0, {{{0, 0}}}}, 0, 0 },
  523. { "hsr22", 38, {0, {{{0, 0}}}}, 0, 0 },
  524. { "hsr23", 39, {0, {{{0, 0}}}}, 0, 0 },
  525. { "hsr24", 40, {0, {{{0, 0}}}}, 0, 0 },
  526. { "hsr25", 41, {0, {{{0, 0}}}}, 0, 0 },
  527. { "hsr26", 42, {0, {{{0, 0}}}}, 0, 0 },
  528. { "hsr27", 43, {0, {{{0, 0}}}}, 0, 0 },
  529. { "hsr28", 44, {0, {{{0, 0}}}}, 0, 0 },
  530. { "hsr29", 45, {0, {{{0, 0}}}}, 0, 0 },
  531. { "hsr30", 46, {0, {{{0, 0}}}}, 0, 0 },
  532. { "hsr31", 47, {0, {{{0, 0}}}}, 0, 0 },
  533. { "hsr32", 48, {0, {{{0, 0}}}}, 0, 0 },
  534. { "hsr33", 49, {0, {{{0, 0}}}}, 0, 0 },
  535. { "hsr34", 50, {0, {{{0, 0}}}}, 0, 0 },
  536. { "hsr35", 51, {0, {{{0, 0}}}}, 0, 0 },
  537. { "hsr36", 52, {0, {{{0, 0}}}}, 0, 0 },
  538. { "hsr37", 53, {0, {{{0, 0}}}}, 0, 0 },
  539. { "hsr38", 54, {0, {{{0, 0}}}}, 0, 0 },
  540. { "hsr39", 55, {0, {{{0, 0}}}}, 0, 0 },
  541. { "hsr40", 56, {0, {{{0, 0}}}}, 0, 0 },
  542. { "hsr41", 57, {0, {{{0, 0}}}}, 0, 0 },
  543. { "hsr42", 58, {0, {{{0, 0}}}}, 0, 0 },
  544. { "hsr43", 59, {0, {{{0, 0}}}}, 0, 0 },
  545. { "hsr44", 60, {0, {{{0, 0}}}}, 0, 0 },
  546. { "hsr45", 61, {0, {{{0, 0}}}}, 0, 0 },
  547. { "hsr46", 62, {0, {{{0, 0}}}}, 0, 0 },
  548. { "hsr47", 63, {0, {{{0, 0}}}}, 0, 0 },
  549. { "hsr48", 64, {0, {{{0, 0}}}}, 0, 0 },
  550. { "hsr49", 65, {0, {{{0, 0}}}}, 0, 0 },
  551. { "hsr50", 66, {0, {{{0, 0}}}}, 0, 0 },
  552. { "hsr51", 67, {0, {{{0, 0}}}}, 0, 0 },
  553. { "hsr52", 68, {0, {{{0, 0}}}}, 0, 0 },
  554. { "hsr53", 69, {0, {{{0, 0}}}}, 0, 0 },
  555. { "hsr54", 70, {0, {{{0, 0}}}}, 0, 0 },
  556. { "hsr55", 71, {0, {{{0, 0}}}}, 0, 0 },
  557. { "hsr56", 72, {0, {{{0, 0}}}}, 0, 0 },
  558. { "hsr57", 73, {0, {{{0, 0}}}}, 0, 0 },
  559. { "hsr58", 74, {0, {{{0, 0}}}}, 0, 0 },
  560. { "hsr59", 75, {0, {{{0, 0}}}}, 0, 0 },
  561. { "hsr60", 76, {0, {{{0, 0}}}}, 0, 0 },
  562. { "hsr61", 77, {0, {{{0, 0}}}}, 0, 0 },
  563. { "hsr62", 78, {0, {{{0, 0}}}}, 0, 0 },
  564. { "hsr63", 79, {0, {{{0, 0}}}}, 0, 0 },
  565. { "ccr", 256, {0, {{{0, 0}}}}, 0, 0 },
  566. { "cccr", 263, {0, {{{0, 0}}}}, 0, 0 },
  567. { "lr", 272, {0, {{{0, 0}}}}, 0, 0 },
  568. { "lcr", 273, {0, {{{0, 0}}}}, 0, 0 },
  569. { "iacc0h", 280, {0, {{{0, 0}}}}, 0, 0 },
  570. { "iacc0l", 281, {0, {{{0, 0}}}}, 0, 0 },
  571. { "isr", 288, {0, {{{0, 0}}}}, 0, 0 },
  572. { "neear0", 352, {0, {{{0, 0}}}}, 0, 0 },
  573. { "neear1", 353, {0, {{{0, 0}}}}, 0, 0 },
  574. { "neear2", 354, {0, {{{0, 0}}}}, 0, 0 },
  575. { "neear3", 355, {0, {{{0, 0}}}}, 0, 0 },
  576. { "neear4", 356, {0, {{{0, 0}}}}, 0, 0 },
  577. { "neear5", 357, {0, {{{0, 0}}}}, 0, 0 },
  578. { "neear6", 358, {0, {{{0, 0}}}}, 0, 0 },
  579. { "neear7", 359, {0, {{{0, 0}}}}, 0, 0 },
  580. { "neear8", 360, {0, {{{0, 0}}}}, 0, 0 },
  581. { "neear9", 361, {0, {{{0, 0}}}}, 0, 0 },
  582. { "neear10", 362, {0, {{{0, 0}}}}, 0, 0 },
  583. { "neear11", 363, {0, {{{0, 0}}}}, 0, 0 },
  584. { "neear12", 364, {0, {{{0, 0}}}}, 0, 0 },
  585. { "neear13", 365, {0, {{{0, 0}}}}, 0, 0 },
  586. { "neear14", 366, {0, {{{0, 0}}}}, 0, 0 },
  587. { "neear15", 367, {0, {{{0, 0}}}}, 0, 0 },
  588. { "neear16", 368, {0, {{{0, 0}}}}, 0, 0 },
  589. { "neear17", 369, {0, {{{0, 0}}}}, 0, 0 },
  590. { "neear18", 370, {0, {{{0, 0}}}}, 0, 0 },
  591. { "neear19", 371, {0, {{{0, 0}}}}, 0, 0 },
  592. { "neear20", 372, {0, {{{0, 0}}}}, 0, 0 },
  593. { "neear21", 373, {0, {{{0, 0}}}}, 0, 0 },
  594. { "neear22", 374, {0, {{{0, 0}}}}, 0, 0 },
  595. { "neear23", 375, {0, {{{0, 0}}}}, 0, 0 },
  596. { "neear24", 376, {0, {{{0, 0}}}}, 0, 0 },
  597. { "neear25", 377, {0, {{{0, 0}}}}, 0, 0 },
  598. { "neear26", 378, {0, {{{0, 0}}}}, 0, 0 },
  599. { "neear27", 379, {0, {{{0, 0}}}}, 0, 0 },
  600. { "neear28", 380, {0, {{{0, 0}}}}, 0, 0 },
  601. { "neear29", 381, {0, {{{0, 0}}}}, 0, 0 },
  602. { "neear30", 382, {0, {{{0, 0}}}}, 0, 0 },
  603. { "neear31", 383, {0, {{{0, 0}}}}, 0, 0 },
  604. { "nesr0", 384, {0, {{{0, 0}}}}, 0, 0 },
  605. { "nesr1", 385, {0, {{{0, 0}}}}, 0, 0 },
  606. { "nesr2", 386, {0, {{{0, 0}}}}, 0, 0 },
  607. { "nesr3", 387, {0, {{{0, 0}}}}, 0, 0 },
  608. { "nesr4", 388, {0, {{{0, 0}}}}, 0, 0 },
  609. { "nesr5", 389, {0, {{{0, 0}}}}, 0, 0 },
  610. { "nesr6", 390, {0, {{{0, 0}}}}, 0, 0 },
  611. { "nesr7", 391, {0, {{{0, 0}}}}, 0, 0 },
  612. { "nesr8", 392, {0, {{{0, 0}}}}, 0, 0 },
  613. { "nesr9", 393, {0, {{{0, 0}}}}, 0, 0 },
  614. { "nesr10", 394, {0, {{{0, 0}}}}, 0, 0 },
  615. { "nesr11", 395, {0, {{{0, 0}}}}, 0, 0 },
  616. { "nesr12", 396, {0, {{{0, 0}}}}, 0, 0 },
  617. { "nesr13", 397, {0, {{{0, 0}}}}, 0, 0 },
  618. { "nesr14", 398, {0, {{{0, 0}}}}, 0, 0 },
  619. { "nesr15", 399, {0, {{{0, 0}}}}, 0, 0 },
  620. { "nesr16", 400, {0, {{{0, 0}}}}, 0, 0 },
  621. { "nesr17", 401, {0, {{{0, 0}}}}, 0, 0 },
  622. { "nesr18", 402, {0, {{{0, 0}}}}, 0, 0 },
  623. { "nesr19", 403, {0, {{{0, 0}}}}, 0, 0 },
  624. { "nesr20", 404, {0, {{{0, 0}}}}, 0, 0 },
  625. { "nesr21", 405, {0, {{{0, 0}}}}, 0, 0 },
  626. { "nesr22", 406, {0, {{{0, 0}}}}, 0, 0 },
  627. { "nesr23", 407, {0, {{{0, 0}}}}, 0, 0 },
  628. { "nesr24", 408, {0, {{{0, 0}}}}, 0, 0 },
  629. { "nesr25", 409, {0, {{{0, 0}}}}, 0, 0 },
  630. { "nesr26", 410, {0, {{{0, 0}}}}, 0, 0 },
  631. { "nesr27", 411, {0, {{{0, 0}}}}, 0, 0 },
  632. { "nesr28", 412, {0, {{{0, 0}}}}, 0, 0 },
  633. { "nesr29", 413, {0, {{{0, 0}}}}, 0, 0 },
  634. { "nesr30", 414, {0, {{{0, 0}}}}, 0, 0 },
  635. { "nesr31", 415, {0, {{{0, 0}}}}, 0, 0 },
  636. { "necr", 416, {0, {{{0, 0}}}}, 0, 0 },
  637. { "gner0", 432, {0, {{{0, 0}}}}, 0, 0 },
  638. { "gner1", 433, {0, {{{0, 0}}}}, 0, 0 },
  639. { "fner0", 434, {0, {{{0, 0}}}}, 0, 0 },
  640. { "fner1", 435, {0, {{{0, 0}}}}, 0, 0 },
  641. { "epcr0", 512, {0, {{{0, 0}}}}, 0, 0 },
  642. { "epcr1", 513, {0, {{{0, 0}}}}, 0, 0 },
  643. { "epcr2", 514, {0, {{{0, 0}}}}, 0, 0 },
  644. { "epcr3", 515, {0, {{{0, 0}}}}, 0, 0 },
  645. { "epcr4", 516, {0, {{{0, 0}}}}, 0, 0 },
  646. { "epcr5", 517, {0, {{{0, 0}}}}, 0, 0 },
  647. { "epcr6", 518, {0, {{{0, 0}}}}, 0, 0 },
  648. { "epcr7", 519, {0, {{{0, 0}}}}, 0, 0 },
  649. { "epcr8", 520, {0, {{{0, 0}}}}, 0, 0 },
  650. { "epcr9", 521, {0, {{{0, 0}}}}, 0, 0 },
  651. { "epcr10", 522, {0, {{{0, 0}}}}, 0, 0 },
  652. { "epcr11", 523, {0, {{{0, 0}}}}, 0, 0 },
  653. { "epcr12", 524, {0, {{{0, 0}}}}, 0, 0 },
  654. { "epcr13", 525, {0, {{{0, 0}}}}, 0, 0 },
  655. { "epcr14", 526, {0, {{{0, 0}}}}, 0, 0 },
  656. { "epcr15", 527, {0, {{{0, 0}}}}, 0, 0 },
  657. { "epcr16", 528, {0, {{{0, 0}}}}, 0, 0 },
  658. { "epcr17", 529, {0, {{{0, 0}}}}, 0, 0 },
  659. { "epcr18", 530, {0, {{{0, 0}}}}, 0, 0 },
  660. { "epcr19", 531, {0, {{{0, 0}}}}, 0, 0 },
  661. { "epcr20", 532, {0, {{{0, 0}}}}, 0, 0 },
  662. { "epcr21", 533, {0, {{{0, 0}}}}, 0, 0 },
  663. { "epcr22", 534, {0, {{{0, 0}}}}, 0, 0 },
  664. { "epcr23", 535, {0, {{{0, 0}}}}, 0, 0 },
  665. { "epcr24", 536, {0, {{{0, 0}}}}, 0, 0 },
  666. { "epcr25", 537, {0, {{{0, 0}}}}, 0, 0 },
  667. { "epcr26", 538, {0, {{{0, 0}}}}, 0, 0 },
  668. { "epcr27", 539, {0, {{{0, 0}}}}, 0, 0 },
  669. { "epcr28", 540, {0, {{{0, 0}}}}, 0, 0 },
  670. { "epcr29", 541, {0, {{{0, 0}}}}, 0, 0 },
  671. { "epcr30", 542, {0, {{{0, 0}}}}, 0, 0 },
  672. { "epcr31", 543, {0, {{{0, 0}}}}, 0, 0 },
  673. { "epcr32", 544, {0, {{{0, 0}}}}, 0, 0 },
  674. { "epcr33", 545, {0, {{{0, 0}}}}, 0, 0 },
  675. { "epcr34", 546, {0, {{{0, 0}}}}, 0, 0 },
  676. { "epcr35", 547, {0, {{{0, 0}}}}, 0, 0 },
  677. { "epcr36", 548, {0, {{{0, 0}}}}, 0, 0 },
  678. { "epcr37", 549, {0, {{{0, 0}}}}, 0, 0 },
  679. { "epcr38", 550, {0, {{{0, 0}}}}, 0, 0 },
  680. { "epcr39", 551, {0, {{{0, 0}}}}, 0, 0 },
  681. { "epcr40", 552, {0, {{{0, 0}}}}, 0, 0 },
  682. { "epcr41", 553, {0, {{{0, 0}}}}, 0, 0 },
  683. { "epcr42", 554, {0, {{{0, 0}}}}, 0, 0 },
  684. { "epcr43", 555, {0, {{{0, 0}}}}, 0, 0 },
  685. { "epcr44", 556, {0, {{{0, 0}}}}, 0, 0 },
  686. { "epcr45", 557, {0, {{{0, 0}}}}, 0, 0 },
  687. { "epcr46", 558, {0, {{{0, 0}}}}, 0, 0 },
  688. { "epcr47", 559, {0, {{{0, 0}}}}, 0, 0 },
  689. { "epcr48", 560, {0, {{{0, 0}}}}, 0, 0 },
  690. { "epcr49", 561, {0, {{{0, 0}}}}, 0, 0 },
  691. { "epcr50", 562, {0, {{{0, 0}}}}, 0, 0 },
  692. { "epcr51", 563, {0, {{{0, 0}}}}, 0, 0 },
  693. { "epcr52", 564, {0, {{{0, 0}}}}, 0, 0 },
  694. { "epcr53", 565, {0, {{{0, 0}}}}, 0, 0 },
  695. { "epcr54", 566, {0, {{{0, 0}}}}, 0, 0 },
  696. { "epcr55", 567, {0, {{{0, 0}}}}, 0, 0 },
  697. { "epcr56", 568, {0, {{{0, 0}}}}, 0, 0 },
  698. { "epcr57", 569, {0, {{{0, 0}}}}, 0, 0 },
  699. { "epcr58", 570, {0, {{{0, 0}}}}, 0, 0 },
  700. { "epcr59", 571, {0, {{{0, 0}}}}, 0, 0 },
  701. { "epcr60", 572, {0, {{{0, 0}}}}, 0, 0 },
  702. { "epcr61", 573, {0, {{{0, 0}}}}, 0, 0 },
  703. { "epcr62", 574, {0, {{{0, 0}}}}, 0, 0 },
  704. { "epcr63", 575, {0, {{{0, 0}}}}, 0, 0 },
  705. { "esr0", 576, {0, {{{0, 0}}}}, 0, 0 },
  706. { "esr1", 577, {0, {{{0, 0}}}}, 0, 0 },
  707. { "esr2", 578, {0, {{{0, 0}}}}, 0, 0 },
  708. { "esr3", 579, {0, {{{0, 0}}}}, 0, 0 },
  709. { "esr4", 580, {0, {{{0, 0}}}}, 0, 0 },
  710. { "esr5", 581, {0, {{{0, 0}}}}, 0, 0 },
  711. { "esr6", 582, {0, {{{0, 0}}}}, 0, 0 },
  712. { "esr7", 583, {0, {{{0, 0}}}}, 0, 0 },
  713. { "esr8", 584, {0, {{{0, 0}}}}, 0, 0 },
  714. { "esr9", 585, {0, {{{0, 0}}}}, 0, 0 },
  715. { "esr10", 586, {0, {{{0, 0}}}}, 0, 0 },
  716. { "esr11", 587, {0, {{{0, 0}}}}, 0, 0 },
  717. { "esr12", 588, {0, {{{0, 0}}}}, 0, 0 },
  718. { "esr13", 589, {0, {{{0, 0}}}}, 0, 0 },
  719. { "esr14", 590, {0, {{{0, 0}}}}, 0, 0 },
  720. { "esr15", 591, {0, {{{0, 0}}}}, 0, 0 },
  721. { "esr16", 592, {0, {{{0, 0}}}}, 0, 0 },
  722. { "esr17", 593, {0, {{{0, 0}}}}, 0, 0 },
  723. { "esr18", 594, {0, {{{0, 0}}}}, 0, 0 },
  724. { "esr19", 595, {0, {{{0, 0}}}}, 0, 0 },
  725. { "esr20", 596, {0, {{{0, 0}}}}, 0, 0 },
  726. { "esr21", 597, {0, {{{0, 0}}}}, 0, 0 },
  727. { "esr22", 598, {0, {{{0, 0}}}}, 0, 0 },
  728. { "esr23", 599, {0, {{{0, 0}}}}, 0, 0 },
  729. { "esr24", 600, {0, {{{0, 0}}}}, 0, 0 },
  730. { "esr25", 601, {0, {{{0, 0}}}}, 0, 0 },
  731. { "esr26", 602, {0, {{{0, 0}}}}, 0, 0 },
  732. { "esr27", 603, {0, {{{0, 0}}}}, 0, 0 },
  733. { "esr28", 604, {0, {{{0, 0}}}}, 0, 0 },
  734. { "esr29", 605, {0, {{{0, 0}}}}, 0, 0 },
  735. { "esr30", 606, {0, {{{0, 0}}}}, 0, 0 },
  736. { "esr31", 607, {0, {{{0, 0}}}}, 0, 0 },
  737. { "esr32", 608, {0, {{{0, 0}}}}, 0, 0 },
  738. { "esr33", 609, {0, {{{0, 0}}}}, 0, 0 },
  739. { "esr34", 610, {0, {{{0, 0}}}}, 0, 0 },
  740. { "esr35", 611, {0, {{{0, 0}}}}, 0, 0 },
  741. { "esr36", 612, {0, {{{0, 0}}}}, 0, 0 },
  742. { "esr37", 613, {0, {{{0, 0}}}}, 0, 0 },
  743. { "esr38", 614, {0, {{{0, 0}}}}, 0, 0 },
  744. { "esr39", 615, {0, {{{0, 0}}}}, 0, 0 },
  745. { "esr40", 616, {0, {{{0, 0}}}}, 0, 0 },
  746. { "esr41", 617, {0, {{{0, 0}}}}, 0, 0 },
  747. { "esr42", 618, {0, {{{0, 0}}}}, 0, 0 },
  748. { "esr43", 619, {0, {{{0, 0}}}}, 0, 0 },
  749. { "esr44", 620, {0, {{{0, 0}}}}, 0, 0 },
  750. { "esr45", 621, {0, {{{0, 0}}}}, 0, 0 },
  751. { "esr46", 622, {0, {{{0, 0}}}}, 0, 0 },
  752. { "esr47", 623, {0, {{{0, 0}}}}, 0, 0 },
  753. { "esr48", 624, {0, {{{0, 0}}}}, 0, 0 },
  754. { "esr49", 625, {0, {{{0, 0}}}}, 0, 0 },
  755. { "esr50", 626, {0, {{{0, 0}}}}, 0, 0 },
  756. { "esr51", 627, {0, {{{0, 0}}}}, 0, 0 },
  757. { "esr52", 628, {0, {{{0, 0}}}}, 0, 0 },
  758. { "esr53", 629, {0, {{{0, 0}}}}, 0, 0 },
  759. { "esr54", 630, {0, {{{0, 0}}}}, 0, 0 },
  760. { "esr55", 631, {0, {{{0, 0}}}}, 0, 0 },
  761. { "esr56", 632, {0, {{{0, 0}}}}, 0, 0 },
  762. { "esr57", 633, {0, {{{0, 0}}}}, 0, 0 },
  763. { "esr58", 634, {0, {{{0, 0}}}}, 0, 0 },
  764. { "esr59", 635, {0, {{{0, 0}}}}, 0, 0 },
  765. { "esr60", 636, {0, {{{0, 0}}}}, 0, 0 },
  766. { "esr61", 637, {0, {{{0, 0}}}}, 0, 0 },
  767. { "esr62", 638, {0, {{{0, 0}}}}, 0, 0 },
  768. { "esr63", 639, {0, {{{0, 0}}}}, 0, 0 },
  769. { "eir0", 640, {0, {{{0, 0}}}}, 0, 0 },
  770. { "eir1", 641, {0, {{{0, 0}}}}, 0, 0 },
  771. { "eir2", 642, {0, {{{0, 0}}}}, 0, 0 },
  772. { "eir3", 643, {0, {{{0, 0}}}}, 0, 0 },
  773. { "eir4", 644, {0, {{{0, 0}}}}, 0, 0 },
  774. { "eir5", 645, {0, {{{0, 0}}}}, 0, 0 },
  775. { "eir6", 646, {0, {{{0, 0}}}}, 0, 0 },
  776. { "eir7", 647, {0, {{{0, 0}}}}, 0, 0 },
  777. { "eir8", 648, {0, {{{0, 0}}}}, 0, 0 },
  778. { "eir9", 649, {0, {{{0, 0}}}}, 0, 0 },
  779. { "eir10", 650, {0, {{{0, 0}}}}, 0, 0 },
  780. { "eir11", 651, {0, {{{0, 0}}}}, 0, 0 },
  781. { "eir12", 652, {0, {{{0, 0}}}}, 0, 0 },
  782. { "eir13", 653, {0, {{{0, 0}}}}, 0, 0 },
  783. { "eir14", 654, {0, {{{0, 0}}}}, 0, 0 },
  784. { "eir15", 655, {0, {{{0, 0}}}}, 0, 0 },
  785. { "eir16", 656, {0, {{{0, 0}}}}, 0, 0 },
  786. { "eir17", 657, {0, {{{0, 0}}}}, 0, 0 },
  787. { "eir18", 658, {0, {{{0, 0}}}}, 0, 0 },
  788. { "eir19", 659, {0, {{{0, 0}}}}, 0, 0 },
  789. { "eir20", 660, {0, {{{0, 0}}}}, 0, 0 },
  790. { "eir21", 661, {0, {{{0, 0}}}}, 0, 0 },
  791. { "eir22", 662, {0, {{{0, 0}}}}, 0, 0 },
  792. { "eir23", 663, {0, {{{0, 0}}}}, 0, 0 },
  793. { "eir24", 664, {0, {{{0, 0}}}}, 0, 0 },
  794. { "eir25", 665, {0, {{{0, 0}}}}, 0, 0 },
  795. { "eir26", 666, {0, {{{0, 0}}}}, 0, 0 },
  796. { "eir27", 667, {0, {{{0, 0}}}}, 0, 0 },
  797. { "eir28", 668, {0, {{{0, 0}}}}, 0, 0 },
  798. { "eir29", 669, {0, {{{0, 0}}}}, 0, 0 },
  799. { "eir30", 670, {0, {{{0, 0}}}}, 0, 0 },
  800. { "eir31", 671, {0, {{{0, 0}}}}, 0, 0 },
  801. { "esfr0", 672, {0, {{{0, 0}}}}, 0, 0 },
  802. { "esfr1", 673, {0, {{{0, 0}}}}, 0, 0 },
  803. { "sr0", 768, {0, {{{0, 0}}}}, 0, 0 },
  804. { "sr1", 769, {0, {{{0, 0}}}}, 0, 0 },
  805. { "sr2", 770, {0, {{{0, 0}}}}, 0, 0 },
  806. { "sr3", 771, {0, {{{0, 0}}}}, 0, 0 },
  807. { "scr0", 832, {0, {{{0, 0}}}}, 0, 0 },
  808. { "scr1", 833, {0, {{{0, 0}}}}, 0, 0 },
  809. { "scr2", 834, {0, {{{0, 0}}}}, 0, 0 },
  810. { "scr3", 835, {0, {{{0, 0}}}}, 0, 0 },
  811. { "fsr0", 1024, {0, {{{0, 0}}}}, 0, 0 },
  812. { "fsr1", 1025, {0, {{{0, 0}}}}, 0, 0 },
  813. { "fsr2", 1026, {0, {{{0, 0}}}}, 0, 0 },
  814. { "fsr3", 1027, {0, {{{0, 0}}}}, 0, 0 },
  815. { "fsr4", 1028, {0, {{{0, 0}}}}, 0, 0 },
  816. { "fsr5", 1029, {0, {{{0, 0}}}}, 0, 0 },
  817. { "fsr6", 1030, {0, {{{0, 0}}}}, 0, 0 },
  818. { "fsr7", 1031, {0, {{{0, 0}}}}, 0, 0 },
  819. { "fsr8", 1032, {0, {{{0, 0}}}}, 0, 0 },
  820. { "fsr9", 1033, {0, {{{0, 0}}}}, 0, 0 },
  821. { "fsr10", 1034, {0, {{{0, 0}}}}, 0, 0 },
  822. { "fsr11", 1035, {0, {{{0, 0}}}}, 0, 0 },
  823. { "fsr12", 1036, {0, {{{0, 0}}}}, 0, 0 },
  824. { "fsr13", 1037, {0, {{{0, 0}}}}, 0, 0 },
  825. { "fsr14", 1038, {0, {{{0, 0}}}}, 0, 0 },
  826. { "fsr15", 1039, {0, {{{0, 0}}}}, 0, 0 },
  827. { "fsr16", 1040, {0, {{{0, 0}}}}, 0, 0 },
  828. { "fsr17", 1041, {0, {{{0, 0}}}}, 0, 0 },
  829. { "fsr18", 1042, {0, {{{0, 0}}}}, 0, 0 },
  830. { "fsr19", 1043, {0, {{{0, 0}}}}, 0, 0 },
  831. { "fsr20", 1044, {0, {{{0, 0}}}}, 0, 0 },
  832. { "fsr21", 1045, {0, {{{0, 0}}}}, 0, 0 },
  833. { "fsr22", 1046, {0, {{{0, 0}}}}, 0, 0 },
  834. { "fsr23", 1047, {0, {{{0, 0}}}}, 0, 0 },
  835. { "fsr24", 1048, {0, {{{0, 0}}}}, 0, 0 },
  836. { "fsr25", 1049, {0, {{{0, 0}}}}, 0, 0 },
  837. { "fsr26", 1050, {0, {{{0, 0}}}}, 0, 0 },
  838. { "fsr27", 1051, {0, {{{0, 0}}}}, 0, 0 },
  839. { "fsr28", 1052, {0, {{{0, 0}}}}, 0, 0 },
  840. { "fsr29", 1053, {0, {{{0, 0}}}}, 0, 0 },
  841. { "fsr30", 1054, {0, {{{0, 0}}}}, 0, 0 },
  842. { "fsr31", 1055, {0, {{{0, 0}}}}, 0, 0 },
  843. { "fsr32", 1056, {0, {{{0, 0}}}}, 0, 0 },
  844. { "fsr33", 1057, {0, {{{0, 0}}}}, 0, 0 },
  845. { "fsr34", 1058, {0, {{{0, 0}}}}, 0, 0 },
  846. { "fsr35", 1059, {0, {{{0, 0}}}}, 0, 0 },
  847. { "fsr36", 1060, {0, {{{0, 0}}}}, 0, 0 },
  848. { "fsr37", 1061, {0, {{{0, 0}}}}, 0, 0 },
  849. { "fsr38", 1062, {0, {{{0, 0}}}}, 0, 0 },
  850. { "fsr39", 1063, {0, {{{0, 0}}}}, 0, 0 },
  851. { "fsr40", 1064, {0, {{{0, 0}}}}, 0, 0 },
  852. { "fsr41", 1065, {0, {{{0, 0}}}}, 0, 0 },
  853. { "fsr42", 1066, {0, {{{0, 0}}}}, 0, 0 },
  854. { "fsr43", 1067, {0, {{{0, 0}}}}, 0, 0 },
  855. { "fsr44", 1068, {0, {{{0, 0}}}}, 0, 0 },
  856. { "fsr45", 1069, {0, {{{0, 0}}}}, 0, 0 },
  857. { "fsr46", 1070, {0, {{{0, 0}}}}, 0, 0 },
  858. { "fsr47", 1071, {0, {{{0, 0}}}}, 0, 0 },
  859. { "fsr48", 1072, {0, {{{0, 0}}}}, 0, 0 },
  860. { "fsr49", 1073, {0, {{{0, 0}}}}, 0, 0 },
  861. { "fsr50", 1074, {0, {{{0, 0}}}}, 0, 0 },
  862. { "fsr51", 1075, {0, {{{0, 0}}}}, 0, 0 },
  863. { "fsr52", 1076, {0, {{{0, 0}}}}, 0, 0 },
  864. { "fsr53", 1077, {0, {{{0, 0}}}}, 0, 0 },
  865. { "fsr54", 1078, {0, {{{0, 0}}}}, 0, 0 },
  866. { "fsr55", 1079, {0, {{{0, 0}}}}, 0, 0 },
  867. { "fsr56", 1080, {0, {{{0, 0}}}}, 0, 0 },
  868. { "fsr57", 1081, {0, {{{0, 0}}}}, 0, 0 },
  869. { "fsr58", 1082, {0, {{{0, 0}}}}, 0, 0 },
  870. { "fsr59", 1083, {0, {{{0, 0}}}}, 0, 0 },
  871. { "fsr60", 1084, {0, {{{0, 0}}}}, 0, 0 },
  872. { "fsr61", 1085, {0, {{{0, 0}}}}, 0, 0 },
  873. { "fsr62", 1086, {0, {{{0, 0}}}}, 0, 0 },
  874. { "fsr63", 1087, {0, {{{0, 0}}}}, 0, 0 },
  875. { "fqop0", 1088, {0, {{{0, 0}}}}, 0, 0 },
  876. { "fqop1", 1090, {0, {{{0, 0}}}}, 0, 0 },
  877. { "fqop2", 1092, {0, {{{0, 0}}}}, 0, 0 },
  878. { "fqop3", 1094, {0, {{{0, 0}}}}, 0, 0 },
  879. { "fqop4", 1096, {0, {{{0, 0}}}}, 0, 0 },
  880. { "fqop5", 1098, {0, {{{0, 0}}}}, 0, 0 },
  881. { "fqop6", 1100, {0, {{{0, 0}}}}, 0, 0 },
  882. { "fqop7", 1102, {0, {{{0, 0}}}}, 0, 0 },
  883. { "fqop8", 1104, {0, {{{0, 0}}}}, 0, 0 },
  884. { "fqop9", 1106, {0, {{{0, 0}}}}, 0, 0 },
  885. { "fqop10", 1108, {0, {{{0, 0}}}}, 0, 0 },
  886. { "fqop11", 1110, {0, {{{0, 0}}}}, 0, 0 },
  887. { "fqop12", 1112, {0, {{{0, 0}}}}, 0, 0 },
  888. { "fqop13", 1114, {0, {{{0, 0}}}}, 0, 0 },
  889. { "fqop14", 1116, {0, {{{0, 0}}}}, 0, 0 },
  890. { "fqop15", 1118, {0, {{{0, 0}}}}, 0, 0 },
  891. { "fqop16", 1120, {0, {{{0, 0}}}}, 0, 0 },
  892. { "fqop17", 1122, {0, {{{0, 0}}}}, 0, 0 },
  893. { "fqop18", 1124, {0, {{{0, 0}}}}, 0, 0 },
  894. { "fqop19", 1126, {0, {{{0, 0}}}}, 0, 0 },
  895. { "fqop20", 1128, {0, {{{0, 0}}}}, 0, 0 },
  896. { "fqop21", 1130, {0, {{{0, 0}}}}, 0, 0 },
  897. { "fqop22", 1132, {0, {{{0, 0}}}}, 0, 0 },
  898. { "fqop23", 1134, {0, {{{0, 0}}}}, 0, 0 },
  899. { "fqop24", 1136, {0, {{{0, 0}}}}, 0, 0 },
  900. { "fqop25", 1138, {0, {{{0, 0}}}}, 0, 0 },
  901. { "fqop26", 1140, {0, {{{0, 0}}}}, 0, 0 },
  902. { "fqop27", 1142, {0, {{{0, 0}}}}, 0, 0 },
  903. { "fqop28", 1144, {0, {{{0, 0}}}}, 0, 0 },
  904. { "fqop29", 1146, {0, {{{0, 0}}}}, 0, 0 },
  905. { "fqop30", 1148, {0, {{{0, 0}}}}, 0, 0 },
  906. { "fqop31", 1150, {0, {{{0, 0}}}}, 0, 0 },
  907. { "fqst0", 1089, {0, {{{0, 0}}}}, 0, 0 },
  908. { "fqst1", 1091, {0, {{{0, 0}}}}, 0, 0 },
  909. { "fqst2", 1093, {0, {{{0, 0}}}}, 0, 0 },
  910. { "fqst3", 1095, {0, {{{0, 0}}}}, 0, 0 },
  911. { "fqst4", 1097, {0, {{{0, 0}}}}, 0, 0 },
  912. { "fqst5", 1099, {0, {{{0, 0}}}}, 0, 0 },
  913. { "fqst6", 1101, {0, {{{0, 0}}}}, 0, 0 },
  914. { "fqst7", 1103, {0, {{{0, 0}}}}, 0, 0 },
  915. { "fqst8", 1105, {0, {{{0, 0}}}}, 0, 0 },
  916. { "fqst9", 1107, {0, {{{0, 0}}}}, 0, 0 },
  917. { "fqst10", 1109, {0, {{{0, 0}}}}, 0, 0 },
  918. { "fqst11", 1111, {0, {{{0, 0}}}}, 0, 0 },
  919. { "fqst12", 1113, {0, {{{0, 0}}}}, 0, 0 },
  920. { "fqst13", 1115, {0, {{{0, 0}}}}, 0, 0 },
  921. { "fqst14", 1117, {0, {{{0, 0}}}}, 0, 0 },
  922. { "fqst15", 1119, {0, {{{0, 0}}}}, 0, 0 },
  923. { "fqst16", 1121, {0, {{{0, 0}}}}, 0, 0 },
  924. { "fqst17", 1123, {0, {{{0, 0}}}}, 0, 0 },
  925. { "fqst18", 1125, {0, {{{0, 0}}}}, 0, 0 },
  926. { "fqst19", 1127, {0, {{{0, 0}}}}, 0, 0 },
  927. { "fqst20", 1129, {0, {{{0, 0}}}}, 0, 0 },
  928. { "fqst21", 1131, {0, {{{0, 0}}}}, 0, 0 },
  929. { "fqst22", 1133, {0, {{{0, 0}}}}, 0, 0 },
  930. { "fqst23", 1135, {0, {{{0, 0}}}}, 0, 0 },
  931. { "fqst24", 1137, {0, {{{0, 0}}}}, 0, 0 },
  932. { "fqst25", 1139, {0, {{{0, 0}}}}, 0, 0 },
  933. { "fqst26", 1141, {0, {{{0, 0}}}}, 0, 0 },
  934. { "fqst27", 1143, {0, {{{0, 0}}}}, 0, 0 },
  935. { "fqst28", 1145, {0, {{{0, 0}}}}, 0, 0 },
  936. { "fqst29", 1147, {0, {{{0, 0}}}}, 0, 0 },
  937. { "fqst30", 1149, {0, {{{0, 0}}}}, 0, 0 },
  938. { "fqst31", 1151, {0, {{{0, 0}}}}, 0, 0 },
  939. { "mcilr0", 1272, {0, {{{0, 0}}}}, 0, 0 },
  940. { "mcilr1", 1273, {0, {{{0, 0}}}}, 0, 0 },
  941. { "msr0", 1280, {0, {{{0, 0}}}}, 0, 0 },
  942. { "msr1", 1281, {0, {{{0, 0}}}}, 0, 0 },
  943. { "msr2", 1282, {0, {{{0, 0}}}}, 0, 0 },
  944. { "msr3", 1283, {0, {{{0, 0}}}}, 0, 0 },
  945. { "msr4", 1284, {0, {{{0, 0}}}}, 0, 0 },
  946. { "msr5", 1285, {0, {{{0, 0}}}}, 0, 0 },
  947. { "msr6", 1286, {0, {{{0, 0}}}}, 0, 0 },
  948. { "msr7", 1287, {0, {{{0, 0}}}}, 0, 0 },
  949. { "msr8", 1288, {0, {{{0, 0}}}}, 0, 0 },
  950. { "msr9", 1289, {0, {{{0, 0}}}}, 0, 0 },
  951. { "msr10", 1290, {0, {{{0, 0}}}}, 0, 0 },
  952. { "msr11", 1291, {0, {{{0, 0}}}}, 0, 0 },
  953. { "msr12", 1292, {0, {{{0, 0}}}}, 0, 0 },
  954. { "msr13", 1293, {0, {{{0, 0}}}}, 0, 0 },
  955. { "msr14", 1294, {0, {{{0, 0}}}}, 0, 0 },
  956. { "msr15", 1295, {0, {{{0, 0}}}}, 0, 0 },
  957. { "msr16", 1296, {0, {{{0, 0}}}}, 0, 0 },
  958. { "msr17", 1297, {0, {{{0, 0}}}}, 0, 0 },
  959. { "msr18", 1298, {0, {{{0, 0}}}}, 0, 0 },
  960. { "msr19", 1299, {0, {{{0, 0}}}}, 0, 0 },
  961. { "msr20", 1300, {0, {{{0, 0}}}}, 0, 0 },
  962. { "msr21", 1301, {0, {{{0, 0}}}}, 0, 0 },
  963. { "msr22", 1302, {0, {{{0, 0}}}}, 0, 0 },
  964. { "msr23", 1303, {0, {{{0, 0}}}}, 0, 0 },
  965. { "msr24", 1304, {0, {{{0, 0}}}}, 0, 0 },
  966. { "msr25", 1305, {0, {{{0, 0}}}}, 0, 0 },
  967. { "msr26", 1306, {0, {{{0, 0}}}}, 0, 0 },
  968. { "msr27", 1307, {0, {{{0, 0}}}}, 0, 0 },
  969. { "msr28", 1308, {0, {{{0, 0}}}}, 0, 0 },
  970. { "msr29", 1309, {0, {{{0, 0}}}}, 0, 0 },
  971. { "msr30", 1310, {0, {{{0, 0}}}}, 0, 0 },
  972. { "msr31", 1311, {0, {{{0, 0}}}}, 0, 0 },
  973. { "msr32", 1312, {0, {{{0, 0}}}}, 0, 0 },
  974. { "msr33", 1313, {0, {{{0, 0}}}}, 0, 0 },
  975. { "msr34", 1314, {0, {{{0, 0}}}}, 0, 0 },
  976. { "msr35", 1315, {0, {{{0, 0}}}}, 0, 0 },
  977. { "msr36", 1316, {0, {{{0, 0}}}}, 0, 0 },
  978. { "msr37", 1317, {0, {{{0, 0}}}}, 0, 0 },
  979. { "msr38", 1318, {0, {{{0, 0}}}}, 0, 0 },
  980. { "msr39", 1319, {0, {{{0, 0}}}}, 0, 0 },
  981. { "msr40", 1320, {0, {{{0, 0}}}}, 0, 0 },
  982. { "msr41", 1321, {0, {{{0, 0}}}}, 0, 0 },
  983. { "msr42", 1322, {0, {{{0, 0}}}}, 0, 0 },
  984. { "msr43", 1323, {0, {{{0, 0}}}}, 0, 0 },
  985. { "msr44", 1324, {0, {{{0, 0}}}}, 0, 0 },
  986. { "msr45", 1325, {0, {{{0, 0}}}}, 0, 0 },
  987. { "msr46", 1326, {0, {{{0, 0}}}}, 0, 0 },
  988. { "msr47", 1327, {0, {{{0, 0}}}}, 0, 0 },
  989. { "msr48", 1328, {0, {{{0, 0}}}}, 0, 0 },
  990. { "msr49", 1329, {0, {{{0, 0}}}}, 0, 0 },
  991. { "msr50", 1330, {0, {{{0, 0}}}}, 0, 0 },
  992. { "msr51", 1331, {0, {{{0, 0}}}}, 0, 0 },
  993. { "msr52", 1332, {0, {{{0, 0}}}}, 0, 0 },
  994. { "msr53", 1333, {0, {{{0, 0}}}}, 0, 0 },
  995. { "msr54", 1334, {0, {{{0, 0}}}}, 0, 0 },
  996. { "msr55", 1335, {0, {{{0, 0}}}}, 0, 0 },
  997. { "msr56", 1336, {0, {{{0, 0}}}}, 0, 0 },
  998. { "msr57", 1337, {0, {{{0, 0}}}}, 0, 0 },
  999. { "msr58", 1338, {0, {{{0, 0}}}}, 0, 0 },
  1000. { "msr59", 1339, {0, {{{0, 0}}}}, 0, 0 },
  1001. { "msr60", 1340, {0, {{{0, 0}}}}, 0, 0 },
  1002. { "msr61", 1341, {0, {{{0, 0}}}}, 0, 0 },
  1003. { "msr62", 1342, {0, {{{0, 0}}}}, 0, 0 },
  1004. { "msr63", 1343, {0, {{{0, 0}}}}, 0, 0 },
  1005. { "mqop0", 1344, {0, {{{0, 0}}}}, 0, 0 },
  1006. { "mqop1", 1346, {0, {{{0, 0}}}}, 0, 0 },
  1007. { "mqop2", 1348, {0, {{{0, 0}}}}, 0, 0 },
  1008. { "mqop3", 1350, {0, {{{0, 0}}}}, 0, 0 },
  1009. { "mqop4", 1352, {0, {{{0, 0}}}}, 0, 0 },
  1010. { "mqop5", 1354, {0, {{{0, 0}}}}, 0, 0 },
  1011. { "mqop6", 1356, {0, {{{0, 0}}}}, 0, 0 },
  1012. { "mqop7", 1358, {0, {{{0, 0}}}}, 0, 0 },
  1013. { "mqop8", 1360, {0, {{{0, 0}}}}, 0, 0 },
  1014. { "mqop9", 1362, {0, {{{0, 0}}}}, 0, 0 },
  1015. { "mqop10", 1364, {0, {{{0, 0}}}}, 0, 0 },
  1016. { "mqop11", 1366, {0, {{{0, 0}}}}, 0, 0 },
  1017. { "mqop12", 1368, {0, {{{0, 0}}}}, 0, 0 },
  1018. { "mqop13", 1370, {0, {{{0, 0}}}}, 0, 0 },
  1019. { "mqop14", 1372, {0, {{{0, 0}}}}, 0, 0 },
  1020. { "mqop15", 1374, {0, {{{0, 0}}}}, 0, 0 },
  1021. { "mqop16", 1376, {0, {{{0, 0}}}}, 0, 0 },
  1022. { "mqop17", 1378, {0, {{{0, 0}}}}, 0, 0 },
  1023. { "mqop18", 1380, {0, {{{0, 0}}}}, 0, 0 },
  1024. { "mqop19", 1382, {0, {{{0, 0}}}}, 0, 0 },
  1025. { "mqop20", 1384, {0, {{{0, 0}}}}, 0, 0 },
  1026. { "mqop21", 1386, {0, {{{0, 0}}}}, 0, 0 },
  1027. { "mqop22", 1388, {0, {{{0, 0}}}}, 0, 0 },
  1028. { "mqop23", 1390, {0, {{{0, 0}}}}, 0, 0 },
  1029. { "mqop24", 1392, {0, {{{0, 0}}}}, 0, 0 },
  1030. { "mqop25", 1394, {0, {{{0, 0}}}}, 0, 0 },
  1031. { "mqop26", 1396, {0, {{{0, 0}}}}, 0, 0 },
  1032. { "mqop27", 1398, {0, {{{0, 0}}}}, 0, 0 },
  1033. { "mqop28", 1400, {0, {{{0, 0}}}}, 0, 0 },
  1034. { "mqop29", 1402, {0, {{{0, 0}}}}, 0, 0 },
  1035. { "mqop30", 1404, {0, {{{0, 0}}}}, 0, 0 },
  1036. { "mqop31", 1406, {0, {{{0, 0}}}}, 0, 0 },
  1037. { "mqst0", 1345, {0, {{{0, 0}}}}, 0, 0 },
  1038. { "mqst1", 1347, {0, {{{0, 0}}}}, 0, 0 },
  1039. { "mqst2", 1349, {0, {{{0, 0}}}}, 0, 0 },
  1040. { "mqst3", 1351, {0, {{{0, 0}}}}, 0, 0 },
  1041. { "mqst4", 1353, {0, {{{0, 0}}}}, 0, 0 },
  1042. { "mqst5", 1355, {0, {{{0, 0}}}}, 0, 0 },
  1043. { "mqst6", 1357, {0, {{{0, 0}}}}, 0, 0 },
  1044. { "mqst7", 1359, {0, {{{0, 0}}}}, 0, 0 },
  1045. { "mqst8", 1361, {0, {{{0, 0}}}}, 0, 0 },
  1046. { "mqst9", 1363, {0, {{{0, 0}}}}, 0, 0 },
  1047. { "mqst10", 1365, {0, {{{0, 0}}}}, 0, 0 },
  1048. { "mqst11", 1367, {0, {{{0, 0}}}}, 0, 0 },
  1049. { "mqst12", 1369, {0, {{{0, 0}}}}, 0, 0 },
  1050. { "mqst13", 1371, {0, {{{0, 0}}}}, 0, 0 },
  1051. { "mqst14", 1373, {0, {{{0, 0}}}}, 0, 0 },
  1052. { "mqst15", 1375, {0, {{{0, 0}}}}, 0, 0 },
  1053. { "mqst16", 1377, {0, {{{0, 0}}}}, 0, 0 },
  1054. { "mqst17", 1379, {0, {{{0, 0}}}}, 0, 0 },
  1055. { "mqst18", 1381, {0, {{{0, 0}}}}, 0, 0 },
  1056. { "mqst19", 1383, {0, {{{0, 0}}}}, 0, 0 },
  1057. { "mqst20", 1385, {0, {{{0, 0}}}}, 0, 0 },
  1058. { "mqst21", 1387, {0, {{{0, 0}}}}, 0, 0 },
  1059. { "mqst22", 1389, {0, {{{0, 0}}}}, 0, 0 },
  1060. { "mqst23", 1391, {0, {{{0, 0}}}}, 0, 0 },
  1061. { "mqst24", 1393, {0, {{{0, 0}}}}, 0, 0 },
  1062. { "mqst25", 1395, {0, {{{0, 0}}}}, 0, 0 },
  1063. { "mqst26", 1397, {0, {{{0, 0}}}}, 0, 0 },
  1064. { "mqst27", 1399, {0, {{{0, 0}}}}, 0, 0 },
  1065. { "mqst28", 1401, {0, {{{0, 0}}}}, 0, 0 },
  1066. { "mqst29", 1403, {0, {{{0, 0}}}}, 0, 0 },
  1067. { "mqst30", 1405, {0, {{{0, 0}}}}, 0, 0 },
  1068. { "mqst31", 1407, {0, {{{0, 0}}}}, 0, 0 },
  1069. { "ear0", 1536, {0, {{{0, 0}}}}, 0, 0 },
  1070. { "ear1", 1537, {0, {{{0, 0}}}}, 0, 0 },
  1071. { "ear2", 1538, {0, {{{0, 0}}}}, 0, 0 },
  1072. { "ear3", 1539, {0, {{{0, 0}}}}, 0, 0 },
  1073. { "ear4", 1540, {0, {{{0, 0}}}}, 0, 0 },
  1074. { "ear5", 1541, {0, {{{0, 0}}}}, 0, 0 },
  1075. { "ear6", 1542, {0, {{{0, 0}}}}, 0, 0 },
  1076. { "ear7", 1543, {0, {{{0, 0}}}}, 0, 0 },
  1077. { "ear8", 1544, {0, {{{0, 0}}}}, 0, 0 },
  1078. { "ear9", 1545, {0, {{{0, 0}}}}, 0, 0 },
  1079. { "ear10", 1546, {0, {{{0, 0}}}}, 0, 0 },
  1080. { "ear11", 1547, {0, {{{0, 0}}}}, 0, 0 },
  1081. { "ear12", 1548, {0, {{{0, 0}}}}, 0, 0 },
  1082. { "ear13", 1549, {0, {{{0, 0}}}}, 0, 0 },
  1083. { "ear14", 1550, {0, {{{0, 0}}}}, 0, 0 },
  1084. { "ear15", 1551, {0, {{{0, 0}}}}, 0, 0 },
  1085. { "ear16", 1552, {0, {{{0, 0}}}}, 0, 0 },
  1086. { "ear17", 1553, {0, {{{0, 0}}}}, 0, 0 },
  1087. { "ear18", 1554, {0, {{{0, 0}}}}, 0, 0 },
  1088. { "ear19", 1555, {0, {{{0, 0}}}}, 0, 0 },
  1089. { "ear20", 1556, {0, {{{0, 0}}}}, 0, 0 },
  1090. { "ear21", 1557, {0, {{{0, 0}}}}, 0, 0 },
  1091. { "ear22", 1558, {0, {{{0, 0}}}}, 0, 0 },
  1092. { "ear23", 1559, {0, {{{0, 0}}}}, 0, 0 },
  1093. { "ear24", 1560, {0, {{{0, 0}}}}, 0, 0 },
  1094. { "ear25", 1561, {0, {{{0, 0}}}}, 0, 0 },
  1095. { "ear26", 1562, {0, {{{0, 0}}}}, 0, 0 },
  1096. { "ear27", 1563, {0, {{{0, 0}}}}, 0, 0 },
  1097. { "ear28", 1564, {0, {{{0, 0}}}}, 0, 0 },
  1098. { "ear29", 1565, {0, {{{0, 0}}}}, 0, 0 },
  1099. { "ear30", 1566, {0, {{{0, 0}}}}, 0, 0 },
  1100. { "ear31", 1567, {0, {{{0, 0}}}}, 0, 0 },
  1101. { "ear32", 1568, {0, {{{0, 0}}}}, 0, 0 },
  1102. { "ear33", 1569, {0, {{{0, 0}}}}, 0, 0 },
  1103. { "ear34", 1570, {0, {{{0, 0}}}}, 0, 0 },
  1104. { "ear35", 1571, {0, {{{0, 0}}}}, 0, 0 },
  1105. { "ear36", 1572, {0, {{{0, 0}}}}, 0, 0 },
  1106. { "ear37", 1573, {0, {{{0, 0}}}}, 0, 0 },
  1107. { "ear38", 1574, {0, {{{0, 0}}}}, 0, 0 },
  1108. { "ear39", 1575, {0, {{{0, 0}}}}, 0, 0 },
  1109. { "ear40", 1576, {0, {{{0, 0}}}}, 0, 0 },
  1110. { "ear41", 1577, {0, {{{0, 0}}}}, 0, 0 },
  1111. { "ear42", 1578, {0, {{{0, 0}}}}, 0, 0 },
  1112. { "ear43", 1579, {0, {{{0, 0}}}}, 0, 0 },
  1113. { "ear44", 1580, {0, {{{0, 0}}}}, 0, 0 },
  1114. { "ear45", 1581, {0, {{{0, 0}}}}, 0, 0 },
  1115. { "ear46", 1582, {0, {{{0, 0}}}}, 0, 0 },
  1116. { "ear47", 1583, {0, {{{0, 0}}}}, 0, 0 },
  1117. { "ear48", 1584, {0, {{{0, 0}}}}, 0, 0 },
  1118. { "ear49", 1585, {0, {{{0, 0}}}}, 0, 0 },
  1119. { "ear50", 1586, {0, {{{0, 0}}}}, 0, 0 },
  1120. { "ear51", 1587, {0, {{{0, 0}}}}, 0, 0 },
  1121. { "ear52", 1588, {0, {{{0, 0}}}}, 0, 0 },
  1122. { "ear53", 1589, {0, {{{0, 0}}}}, 0, 0 },
  1123. { "ear54", 1590, {0, {{{0, 0}}}}, 0, 0 },
  1124. { "ear55", 1591, {0, {{{0, 0}}}}, 0, 0 },
  1125. { "ear56", 1592, {0, {{{0, 0}}}}, 0, 0 },
  1126. { "ear57", 1593, {0, {{{0, 0}}}}, 0, 0 },
  1127. { "ear58", 1594, {0, {{{0, 0}}}}, 0, 0 },
  1128. { "ear59", 1595, {0, {{{0, 0}}}}, 0, 0 },
  1129. { "ear60", 1596, {0, {{{0, 0}}}}, 0, 0 },
  1130. { "ear61", 1597, {0, {{{0, 0}}}}, 0, 0 },
  1131. { "ear62", 1598, {0, {{{0, 0}}}}, 0, 0 },
  1132. { "ear63", 1599, {0, {{{0, 0}}}}, 0, 0 },
  1133. { "edr0", 1600, {0, {{{0, 0}}}}, 0, 0 },
  1134. { "edr1", 1601, {0, {{{0, 0}}}}, 0, 0 },
  1135. { "edr2", 1602, {0, {{{0, 0}}}}, 0, 0 },
  1136. { "edr3", 1603, {0, {{{0, 0}}}}, 0, 0 },
  1137. { "edr4", 1604, {0, {{{0, 0}}}}, 0, 0 },
  1138. { "edr5", 1605, {0, {{{0, 0}}}}, 0, 0 },
  1139. { "edr6", 1606, {0, {{{0, 0}}}}, 0, 0 },
  1140. { "edr7", 1607, {0, {{{0, 0}}}}, 0, 0 },
  1141. { "edr8", 1608, {0, {{{0, 0}}}}, 0, 0 },
  1142. { "edr9", 1609, {0, {{{0, 0}}}}, 0, 0 },
  1143. { "edr10", 1610, {0, {{{0, 0}}}}, 0, 0 },
  1144. { "edr11", 1611, {0, {{{0, 0}}}}, 0, 0 },
  1145. { "edr12", 1612, {0, {{{0, 0}}}}, 0, 0 },
  1146. { "edr13", 1613, {0, {{{0, 0}}}}, 0, 0 },
  1147. { "edr14", 1614, {0, {{{0, 0}}}}, 0, 0 },
  1148. { "edr15", 1615, {0, {{{0, 0}}}}, 0, 0 },
  1149. { "edr16", 1616, {0, {{{0, 0}}}}, 0, 0 },
  1150. { "edr17", 1617, {0, {{{0, 0}}}}, 0, 0 },
  1151. { "edr18", 1618, {0, {{{0, 0}}}}, 0, 0 },
  1152. { "edr19", 1619, {0, {{{0, 0}}}}, 0, 0 },
  1153. { "edr20", 1620, {0, {{{0, 0}}}}, 0, 0 },
  1154. { "edr21", 1621, {0, {{{0, 0}}}}, 0, 0 },
  1155. { "edr22", 1622, {0, {{{0, 0}}}}, 0, 0 },
  1156. { "edr23", 1623, {0, {{{0, 0}}}}, 0, 0 },
  1157. { "edr24", 1624, {0, {{{0, 0}}}}, 0, 0 },
  1158. { "edr25", 1625, {0, {{{0, 0}}}}, 0, 0 },
  1159. { "edr26", 1626, {0, {{{0, 0}}}}, 0, 0 },
  1160. { "edr27", 1627, {0, {{{0, 0}}}}, 0, 0 },
  1161. { "edr28", 1628, {0, {{{0, 0}}}}, 0, 0 },
  1162. { "edr29", 1629, {0, {{{0, 0}}}}, 0, 0 },
  1163. { "edr30", 1630, {0, {{{0, 0}}}}, 0, 0 },
  1164. { "edr31", 1631, {0, {{{0, 0}}}}, 0, 0 },
  1165. { "edr32", 1632, {0, {{{0, 0}}}}, 0, 0 },
  1166. { "edr33", 1636, {0, {{{0, 0}}}}, 0, 0 },
  1167. { "edr34", 1634, {0, {{{0, 0}}}}, 0, 0 },
  1168. { "edr35", 1635, {0, {{{0, 0}}}}, 0, 0 },
  1169. { "edr36", 1636, {0, {{{0, 0}}}}, 0, 0 },
  1170. { "edr37", 1637, {0, {{{0, 0}}}}, 0, 0 },
  1171. { "edr38", 1638, {0, {{{0, 0}}}}, 0, 0 },
  1172. { "edr39", 1639, {0, {{{0, 0}}}}, 0, 0 },
  1173. { "edr40", 1640, {0, {{{0, 0}}}}, 0, 0 },
  1174. { "edr41", 1641, {0, {{{0, 0}}}}, 0, 0 },
  1175. { "edr42", 1642, {0, {{{0, 0}}}}, 0, 0 },
  1176. { "edr43", 1643, {0, {{{0, 0}}}}, 0, 0 },
  1177. { "edr44", 1644, {0, {{{0, 0}}}}, 0, 0 },
  1178. { "edr45", 1645, {0, {{{0, 0}}}}, 0, 0 },
  1179. { "edr46", 1646, {0, {{{0, 0}}}}, 0, 0 },
  1180. { "edr47", 1647, {0, {{{0, 0}}}}, 0, 0 },
  1181. { "edr48", 1648, {0, {{{0, 0}}}}, 0, 0 },
  1182. { "edr49", 1649, {0, {{{0, 0}}}}, 0, 0 },
  1183. { "edr50", 1650, {0, {{{0, 0}}}}, 0, 0 },
  1184. { "edr51", 1651, {0, {{{0, 0}}}}, 0, 0 },
  1185. { "edr52", 1652, {0, {{{0, 0}}}}, 0, 0 },
  1186. { "edr53", 1653, {0, {{{0, 0}}}}, 0, 0 },
  1187. { "edr54", 1654, {0, {{{0, 0}}}}, 0, 0 },
  1188. { "edr55", 1655, {0, {{{0, 0}}}}, 0, 0 },
  1189. { "edr56", 1656, {0, {{{0, 0}}}}, 0, 0 },
  1190. { "edr57", 1657, {0, {{{0, 0}}}}, 0, 0 },
  1191. { "edr58", 1658, {0, {{{0, 0}}}}, 0, 0 },
  1192. { "edr59", 1659, {0, {{{0, 0}}}}, 0, 0 },
  1193. { "edr60", 1660, {0, {{{0, 0}}}}, 0, 0 },
  1194. { "edr61", 1661, {0, {{{0, 0}}}}, 0, 0 },
  1195. { "edr62", 1662, {0, {{{0, 0}}}}, 0, 0 },
  1196. { "edr63", 1663, {0, {{{0, 0}}}}, 0, 0 },
  1197. { "iamlr0", 1664, {0, {{{0, 0}}}}, 0, 0 },
  1198. { "iamlr1", 1665, {0, {{{0, 0}}}}, 0, 0 },
  1199. { "iamlr2", 1666, {0, {{{0, 0}}}}, 0, 0 },
  1200. { "iamlr3", 1667, {0, {{{0, 0}}}}, 0, 0 },
  1201. { "iamlr4", 1668, {0, {{{0, 0}}}}, 0, 0 },
  1202. { "iamlr5", 1669, {0, {{{0, 0}}}}, 0, 0 },
  1203. { "iamlr6", 1670, {0, {{{0, 0}}}}, 0, 0 },
  1204. { "iamlr7", 1671, {0, {{{0, 0}}}}, 0, 0 },
  1205. { "iamlr8", 1672, {0, {{{0, 0}}}}, 0, 0 },
  1206. { "iamlr9", 1673, {0, {{{0, 0}}}}, 0, 0 },
  1207. { "iamlr10", 1674, {0, {{{0, 0}}}}, 0, 0 },
  1208. { "iamlr11", 1675, {0, {{{0, 0}}}}, 0, 0 },
  1209. { "iamlr12", 1676, {0, {{{0, 0}}}}, 0, 0 },
  1210. { "iamlr13", 1677, {0, {{{0, 0}}}}, 0, 0 },
  1211. { "iamlr14", 1678, {0, {{{0, 0}}}}, 0, 0 },
  1212. { "iamlr15", 1679, {0, {{{0, 0}}}}, 0, 0 },
  1213. { "iamlr16", 1680, {0, {{{0, 0}}}}, 0, 0 },
  1214. { "iamlr17", 1681, {0, {{{0, 0}}}}, 0, 0 },
  1215. { "iamlr18", 1682, {0, {{{0, 0}}}}, 0, 0 },
  1216. { "iamlr19", 1683, {0, {{{0, 0}}}}, 0, 0 },
  1217. { "iamlr20", 1684, {0, {{{0, 0}}}}, 0, 0 },
  1218. { "iamlr21", 1685, {0, {{{0, 0}}}}, 0, 0 },
  1219. { "iamlr22", 1686, {0, {{{0, 0}}}}, 0, 0 },
  1220. { "iamlr23", 1687, {0, {{{0, 0}}}}, 0, 0 },
  1221. { "iamlr24", 1688, {0, {{{0, 0}}}}, 0, 0 },
  1222. { "iamlr25", 1689, {0, {{{0, 0}}}}, 0, 0 },
  1223. { "iamlr26", 1690, {0, {{{0, 0}}}}, 0, 0 },
  1224. { "iamlr27", 1691, {0, {{{0, 0}}}}, 0, 0 },
  1225. { "iamlr28", 1692, {0, {{{0, 0}}}}, 0, 0 },
  1226. { "iamlr29", 1693, {0, {{{0, 0}}}}, 0, 0 },
  1227. { "iamlr30", 1694, {0, {{{0, 0}}}}, 0, 0 },
  1228. { "iamlr31", 1695, {0, {{{0, 0}}}}, 0, 0 },
  1229. { "iamlr32", 1696, {0, {{{0, 0}}}}, 0, 0 },
  1230. { "iamlr33", 1697, {0, {{{0, 0}}}}, 0, 0 },
  1231. { "iamlr34", 1698, {0, {{{0, 0}}}}, 0, 0 },
  1232. { "iamlr35", 1699, {0, {{{0, 0}}}}, 0, 0 },
  1233. { "iamlr36", 1700, {0, {{{0, 0}}}}, 0, 0 },
  1234. { "iamlr37", 1701, {0, {{{0, 0}}}}, 0, 0 },
  1235. { "iamlr38", 1702, {0, {{{0, 0}}}}, 0, 0 },
  1236. { "iamlr39", 1703, {0, {{{0, 0}}}}, 0, 0 },
  1237. { "iamlr40", 1704, {0, {{{0, 0}}}}, 0, 0 },
  1238. { "iamlr41", 1705, {0, {{{0, 0}}}}, 0, 0 },
  1239. { "iamlr42", 1706, {0, {{{0, 0}}}}, 0, 0 },
  1240. { "iamlr43", 1707, {0, {{{0, 0}}}}, 0, 0 },
  1241. { "iamlr44", 1708, {0, {{{0, 0}}}}, 0, 0 },
  1242. { "iamlr45", 1709, {0, {{{0, 0}}}}, 0, 0 },
  1243. { "iamlr46", 1710, {0, {{{0, 0}}}}, 0, 0 },
  1244. { "iamlr47", 1711, {0, {{{0, 0}}}}, 0, 0 },
  1245. { "iamlr48", 1712, {0, {{{0, 0}}}}, 0, 0 },
  1246. { "iamlr49", 1713, {0, {{{0, 0}}}}, 0, 0 },
  1247. { "iamlr50", 1714, {0, {{{0, 0}}}}, 0, 0 },
  1248. { "iamlr51", 1715, {0, {{{0, 0}}}}, 0, 0 },
  1249. { "iamlr52", 1716, {0, {{{0, 0}}}}, 0, 0 },
  1250. { "iamlr53", 1717, {0, {{{0, 0}}}}, 0, 0 },
  1251. { "iamlr54", 1718, {0, {{{0, 0}}}}, 0, 0 },
  1252. { "iamlr55", 1719, {0, {{{0, 0}}}}, 0, 0 },
  1253. { "iamlr56", 1720, {0, {{{0, 0}}}}, 0, 0 },
  1254. { "iamlr57", 1721, {0, {{{0, 0}}}}, 0, 0 },
  1255. { "iamlr58", 1722, {0, {{{0, 0}}}}, 0, 0 },
  1256. { "iamlr59", 1723, {0, {{{0, 0}}}}, 0, 0 },
  1257. { "iamlr60", 1724, {0, {{{0, 0}}}}, 0, 0 },
  1258. { "iamlr61", 1725, {0, {{{0, 0}}}}, 0, 0 },
  1259. { "iamlr62", 1726, {0, {{{0, 0}}}}, 0, 0 },
  1260. { "iamlr63", 1727, {0, {{{0, 0}}}}, 0, 0 },
  1261. { "iampr0", 1728, {0, {{{0, 0}}}}, 0, 0 },
  1262. { "iampr1", 1729, {0, {{{0, 0}}}}, 0, 0 },
  1263. { "iampr2", 1730, {0, {{{0, 0}}}}, 0, 0 },
  1264. { "iampr3", 1731, {0, {{{0, 0}}}}, 0, 0 },
  1265. { "iampr4", 1732, {0, {{{0, 0}}}}, 0, 0 },
  1266. { "iampr5", 1733, {0, {{{0, 0}}}}, 0, 0 },
  1267. { "iampr6", 1734, {0, {{{0, 0}}}}, 0, 0 },
  1268. { "iampr7", 1735, {0, {{{0, 0}}}}, 0, 0 },
  1269. { "iampr8", 1736, {0, {{{0, 0}}}}, 0, 0 },
  1270. { "iampr9", 1737, {0, {{{0, 0}}}}, 0, 0 },
  1271. { "iampr10", 1738, {0, {{{0, 0}}}}, 0, 0 },
  1272. { "iampr11", 1739, {0, {{{0, 0}}}}, 0, 0 },
  1273. { "iampr12", 1740, {0, {{{0, 0}}}}, 0, 0 },
  1274. { "iampr13", 1741, {0, {{{0, 0}}}}, 0, 0 },
  1275. { "iampr14", 1742, {0, {{{0, 0}}}}, 0, 0 },
  1276. { "iampr15", 1743, {0, {{{0, 0}}}}, 0, 0 },
  1277. { "iampr16", 1744, {0, {{{0, 0}}}}, 0, 0 },
  1278. { "iampr17", 1745, {0, {{{0, 0}}}}, 0, 0 },
  1279. { "iampr18", 1746, {0, {{{0, 0}}}}, 0, 0 },
  1280. { "iampr19", 1747, {0, {{{0, 0}}}}, 0, 0 },
  1281. { "iampr20", 1748, {0, {{{0, 0}}}}, 0, 0 },
  1282. { "iampr21", 1749, {0, {{{0, 0}}}}, 0, 0 },
  1283. { "iampr22", 1750, {0, {{{0, 0}}}}, 0, 0 },
  1284. { "iampr23", 1751, {0, {{{0, 0}}}}, 0, 0 },
  1285. { "iampr24", 1752, {0, {{{0, 0}}}}, 0, 0 },
  1286. { "iampr25", 1753, {0, {{{0, 0}}}}, 0, 0 },
  1287. { "iampr26", 1754, {0, {{{0, 0}}}}, 0, 0 },
  1288. { "iampr27", 1755, {0, {{{0, 0}}}}, 0, 0 },
  1289. { "iampr28", 1756, {0, {{{0, 0}}}}, 0, 0 },
  1290. { "iampr29", 1757, {0, {{{0, 0}}}}, 0, 0 },
  1291. { "iampr30", 1758, {0, {{{0, 0}}}}, 0, 0 },
  1292. { "iampr31", 1759, {0, {{{0, 0}}}}, 0, 0 },
  1293. { "iampr32", 1760, {0, {{{0, 0}}}}, 0, 0 },
  1294. { "iampr33", 1761, {0, {{{0, 0}}}}, 0, 0 },
  1295. { "iampr34", 1762, {0, {{{0, 0}}}}, 0, 0 },
  1296. { "iampr35", 1763, {0, {{{0, 0}}}}, 0, 0 },
  1297. { "iampr36", 1764, {0, {{{0, 0}}}}, 0, 0 },
  1298. { "iampr37", 1765, {0, {{{0, 0}}}}, 0, 0 },
  1299. { "iampr38", 1766, {0, {{{0, 0}}}}, 0, 0 },
  1300. { "iampr39", 1767, {0, {{{0, 0}}}}, 0, 0 },
  1301. { "iampr40", 1768, {0, {{{0, 0}}}}, 0, 0 },
  1302. { "iampr41", 1769, {0, {{{0, 0}}}}, 0, 0 },
  1303. { "iampr42", 1770, {0, {{{0, 0}}}}, 0, 0 },
  1304. { "iampr43", 1771, {0, {{{0, 0}}}}, 0, 0 },
  1305. { "iampr44", 1772, {0, {{{0, 0}}}}, 0, 0 },
  1306. { "iampr45", 1773, {0, {{{0, 0}}}}, 0, 0 },
  1307. { "iampr46", 1774, {0, {{{0, 0}}}}, 0, 0 },
  1308. { "iampr47", 1775, {0, {{{0, 0}}}}, 0, 0 },
  1309. { "iampr48", 1776, {0, {{{0, 0}}}}, 0, 0 },
  1310. { "iampr49", 1777, {0, {{{0, 0}}}}, 0, 0 },
  1311. { "iampr50", 1778, {0, {{{0, 0}}}}, 0, 0 },
  1312. { "iampr51", 1779, {0, {{{0, 0}}}}, 0, 0 },
  1313. { "iampr52", 1780, {0, {{{0, 0}}}}, 0, 0 },
  1314. { "iampr53", 1781, {0, {{{0, 0}}}}, 0, 0 },
  1315. { "iampr54", 1782, {0, {{{0, 0}}}}, 0, 0 },
  1316. { "iampr55", 1783, {0, {{{0, 0}}}}, 0, 0 },
  1317. { "iampr56", 1784, {0, {{{0, 0}}}}, 0, 0 },
  1318. { "iampr57", 1785, {0, {{{0, 0}}}}, 0, 0 },
  1319. { "iampr58", 1786, {0, {{{0, 0}}}}, 0, 0 },
  1320. { "iampr59", 1787, {0, {{{0, 0}}}}, 0, 0 },
  1321. { "iampr60", 1788, {0, {{{0, 0}}}}, 0, 0 },
  1322. { "iampr61", 1789, {0, {{{0, 0}}}}, 0, 0 },
  1323. { "iampr62", 1790, {0, {{{0, 0}}}}, 0, 0 },
  1324. { "iampr63", 1791, {0, {{{0, 0}}}}, 0, 0 },
  1325. { "damlr0", 1792, {0, {{{0, 0}}}}, 0, 0 },
  1326. { "damlr1", 1793, {0, {{{0, 0}}}}, 0, 0 },
  1327. { "damlr2", 1794, {0, {{{0, 0}}}}, 0, 0 },
  1328. { "damlr3", 1795, {0, {{{0, 0}}}}, 0, 0 },
  1329. { "damlr4", 1796, {0, {{{0, 0}}}}, 0, 0 },
  1330. { "damlr5", 1797, {0, {{{0, 0}}}}, 0, 0 },
  1331. { "damlr6", 1798, {0, {{{0, 0}}}}, 0, 0 },
  1332. { "damlr7", 1799, {0, {{{0, 0}}}}, 0, 0 },
  1333. { "damlr8", 1800, {0, {{{0, 0}}}}, 0, 0 },
  1334. { "damlr9", 1801, {0, {{{0, 0}}}}, 0, 0 },
  1335. { "damlr10", 1802, {0, {{{0, 0}}}}, 0, 0 },
  1336. { "damlr11", 1803, {0, {{{0, 0}}}}, 0, 0 },
  1337. { "damlr12", 1804, {0, {{{0, 0}}}}, 0, 0 },
  1338. { "damlr13", 1805, {0, {{{0, 0}}}}, 0, 0 },
  1339. { "damlr14", 1806, {0, {{{0, 0}}}}, 0, 0 },
  1340. { "damlr15", 1807, {0, {{{0, 0}}}}, 0, 0 },
  1341. { "damlr16", 1808, {0, {{{0, 0}}}}, 0, 0 },
  1342. { "damlr17", 1809, {0, {{{0, 0}}}}, 0, 0 },
  1343. { "damlr18", 1810, {0, {{{0, 0}}}}, 0, 0 },
  1344. { "damlr19", 1811, {0, {{{0, 0}}}}, 0, 0 },
  1345. { "damlr20", 1812, {0, {{{0, 0}}}}, 0, 0 },
  1346. { "damlr21", 1813, {0, {{{0, 0}}}}, 0, 0 },
  1347. { "damlr22", 1814, {0, {{{0, 0}}}}, 0, 0 },
  1348. { "damlr23", 1815, {0, {{{0, 0}}}}, 0, 0 },
  1349. { "damlr24", 1816, {0, {{{0, 0}}}}, 0, 0 },
  1350. { "damlr25", 1817, {0, {{{0, 0}}}}, 0, 0 },
  1351. { "damlr26", 1818, {0, {{{0, 0}}}}, 0, 0 },
  1352. { "damlr27", 1819, {0, {{{0, 0}}}}, 0, 0 },
  1353. { "damlr28", 1820, {0, {{{0, 0}}}}, 0, 0 },
  1354. { "damlr29", 1821, {0, {{{0, 0}}}}, 0, 0 },
  1355. { "damlr30", 1822, {0, {{{0, 0}}}}, 0, 0 },
  1356. { "damlr31", 1823, {0, {{{0, 0}}}}, 0, 0 },
  1357. { "damlr32", 1824, {0, {{{0, 0}}}}, 0, 0 },
  1358. { "damlr33", 1825, {0, {{{0, 0}}}}, 0, 0 },
  1359. { "damlr34", 1826, {0, {{{0, 0}}}}, 0, 0 },
  1360. { "damlr35", 1827, {0, {{{0, 0}}}}, 0, 0 },
  1361. { "damlr36", 1828, {0, {{{0, 0}}}}, 0, 0 },
  1362. { "damlr37", 1829, {0, {{{0, 0}}}}, 0, 0 },
  1363. { "damlr38", 1830, {0, {{{0, 0}}}}, 0, 0 },
  1364. { "damlr39", 1831, {0, {{{0, 0}}}}, 0, 0 },
  1365. { "damlr40", 1832, {0, {{{0, 0}}}}, 0, 0 },
  1366. { "damlr41", 1833, {0, {{{0, 0}}}}, 0, 0 },
  1367. { "damlr42", 1834, {0, {{{0, 0}}}}, 0, 0 },
  1368. { "damlr43", 1835, {0, {{{0, 0}}}}, 0, 0 },
  1369. { "damlr44", 1836, {0, {{{0, 0}}}}, 0, 0 },
  1370. { "damlr45", 1837, {0, {{{0, 0}}}}, 0, 0 },
  1371. { "damlr46", 1838, {0, {{{0, 0}}}}, 0, 0 },
  1372. { "damlr47", 1839, {0, {{{0, 0}}}}, 0, 0 },
  1373. { "damlr48", 1840, {0, {{{0, 0}}}}, 0, 0 },
  1374. { "damlr49", 1841, {0, {{{0, 0}}}}, 0, 0 },
  1375. { "damlr50", 1842, {0, {{{0, 0}}}}, 0, 0 },
  1376. { "damlr51", 1843, {0, {{{0, 0}}}}, 0, 0 },
  1377. { "damlr52", 1844, {0, {{{0, 0}}}}, 0, 0 },
  1378. { "damlr53", 1845, {0, {{{0, 0}}}}, 0, 0 },
  1379. { "damlr54", 1846, {0, {{{0, 0}}}}, 0, 0 },
  1380. { "damlr55", 1847, {0, {{{0, 0}}}}, 0, 0 },
  1381. { "damlr56", 1848, {0, {{{0, 0}}}}, 0, 0 },
  1382. { "damlr57", 1849, {0, {{{0, 0}}}}, 0, 0 },
  1383. { "damlr58", 1850, {0, {{{0, 0}}}}, 0, 0 },
  1384. { "damlr59", 1851, {0, {{{0, 0}}}}, 0, 0 },
  1385. { "damlr60", 1852, {0, {{{0, 0}}}}, 0, 0 },
  1386. { "damlr61", 1853, {0, {{{0, 0}}}}, 0, 0 },
  1387. { "damlr62", 1854, {0, {{{0, 0}}}}, 0, 0 },
  1388. { "damlr63", 1855, {0, {{{0, 0}}}}, 0, 0 },
  1389. { "dampr0", 1856, {0, {{{0, 0}}}}, 0, 0 },
  1390. { "dampr1", 1857, {0, {{{0, 0}}}}, 0, 0 },
  1391. { "dampr2", 1858, {0, {{{0, 0}}}}, 0, 0 },
  1392. { "dampr3", 1859, {0, {{{0, 0}}}}, 0, 0 },
  1393. { "dampr4", 1860, {0, {{{0, 0}}}}, 0, 0 },
  1394. { "dampr5", 1861, {0, {{{0, 0}}}}, 0, 0 },
  1395. { "dampr6", 1862, {0, {{{0, 0}}}}, 0, 0 },
  1396. { "dampr7", 1863, {0, {{{0, 0}}}}, 0, 0 },
  1397. { "dampr8", 1864, {0, {{{0, 0}}}}, 0, 0 },
  1398. { "dampr9", 1865, {0, {{{0, 0}}}}, 0, 0 },
  1399. { "dampr10", 1866, {0, {{{0, 0}}}}, 0, 0 },
  1400. { "dampr11", 1867, {0, {{{0, 0}}}}, 0, 0 },
  1401. { "dampr12", 1868, {0, {{{0, 0}}}}, 0, 0 },
  1402. { "dampr13", 1869, {0, {{{0, 0}}}}, 0, 0 },
  1403. { "dampr14", 1870, {0, {{{0, 0}}}}, 0, 0 },
  1404. { "dampr15", 1871, {0, {{{0, 0}}}}, 0, 0 },
  1405. { "dampr16", 1872, {0, {{{0, 0}}}}, 0, 0 },
  1406. { "dampr17", 1873, {0, {{{0, 0}}}}, 0, 0 },
  1407. { "dampr18", 1874, {0, {{{0, 0}}}}, 0, 0 },
  1408. { "dampr19", 1875, {0, {{{0, 0}}}}, 0, 0 },
  1409. { "dampr20", 1876, {0, {{{0, 0}}}}, 0, 0 },
  1410. { "dampr21", 1877, {0, {{{0, 0}}}}, 0, 0 },
  1411. { "dampr22", 1878, {0, {{{0, 0}}}}, 0, 0 },
  1412. { "dampr23", 1879, {0, {{{0, 0}}}}, 0, 0 },
  1413. { "dampr24", 1880, {0, {{{0, 0}}}}, 0, 0 },
  1414. { "dampr25", 1881, {0, {{{0, 0}}}}, 0, 0 },
  1415. { "dampr26", 1882, {0, {{{0, 0}}}}, 0, 0 },
  1416. { "dampr27", 1883, {0, {{{0, 0}}}}, 0, 0 },
  1417. { "dampr28", 1884, {0, {{{0, 0}}}}, 0, 0 },
  1418. { "dampr29", 1885, {0, {{{0, 0}}}}, 0, 0 },
  1419. { "dampr30", 1886, {0, {{{0, 0}}}}, 0, 0 },
  1420. { "dampr31", 1887, {0, {{{0, 0}}}}, 0, 0 },
  1421. { "dampr32", 1888, {0, {{{0, 0}}}}, 0, 0 },
  1422. { "dampr33", 1889, {0, {{{0, 0}}}}, 0, 0 },
  1423. { "dampr34", 1890, {0, {{{0, 0}}}}, 0, 0 },
  1424. { "dampr35", 1891, {0, {{{0, 0}}}}, 0, 0 },
  1425. { "dampr36", 1892, {0, {{{0, 0}}}}, 0, 0 },
  1426. { "dampr37", 1893, {0, {{{0, 0}}}}, 0, 0 },
  1427. { "dampr38", 1894, {0, {{{0, 0}}}}, 0, 0 },
  1428. { "dampr39", 1895, {0, {{{0, 0}}}}, 0, 0 },
  1429. { "dampr40", 1896, {0, {{{0, 0}}}}, 0, 0 },
  1430. { "dampr41", 1897, {0, {{{0, 0}}}}, 0, 0 },
  1431. { "dampr42", 1898, {0, {{{0, 0}}}}, 0, 0 },
  1432. { "dampr43", 1899, {0, {{{0, 0}}}}, 0, 0 },
  1433. { "dampr44", 1900, {0, {{{0, 0}}}}, 0, 0 },
  1434. { "dampr45", 1901, {0, {{{0, 0}}}}, 0, 0 },
  1435. { "dampr46", 1902, {0, {{{0, 0}}}}, 0, 0 },
  1436. { "dampr47", 1903, {0, {{{0, 0}}}}, 0, 0 },
  1437. { "dampr48", 1904, {0, {{{0, 0}}}}, 0, 0 },
  1438. { "dampr49", 1905, {0, {{{0, 0}}}}, 0, 0 },
  1439. { "dampr50", 1906, {0, {{{0, 0}}}}, 0, 0 },
  1440. { "dampr51", 1907, {0, {{{0, 0}}}}, 0, 0 },
  1441. { "dampr52", 1908, {0, {{{0, 0}}}}, 0, 0 },
  1442. { "dampr53", 1909, {0, {{{0, 0}}}}, 0, 0 },
  1443. { "dampr54", 1910, {0, {{{0, 0}}}}, 0, 0 },
  1444. { "dampr55", 1911, {0, {{{0, 0}}}}, 0, 0 },
  1445. { "dampr56", 1912, {0, {{{0, 0}}}}, 0, 0 },
  1446. { "dampr57", 1913, {0, {{{0, 0}}}}, 0, 0 },
  1447. { "dampr58", 1914, {0, {{{0, 0}}}}, 0, 0 },
  1448. { "dampr59", 1915, {0, {{{0, 0}}}}, 0, 0 },
  1449. { "dampr60", 1916, {0, {{{0, 0}}}}, 0, 0 },
  1450. { "dampr61", 1917, {0, {{{0, 0}}}}, 0, 0 },
  1451. { "dampr62", 1918, {0, {{{0, 0}}}}, 0, 0 },
  1452. { "dampr63", 1919, {0, {{{0, 0}}}}, 0, 0 },
  1453. { "amcr", 1920, {0, {{{0, 0}}}}, 0, 0 },
  1454. { "stbar", 1921, {0, {{{0, 0}}}}, 0, 0 },
  1455. { "mmcr", 1922, {0, {{{0, 0}}}}, 0, 0 },
  1456. { "iamvr1", 1925, {0, {{{0, 0}}}}, 0, 0 },
  1457. { "damvr1", 1927, {0, {{{0, 0}}}}, 0, 0 },
  1458. { "cxnr", 1936, {0, {{{0, 0}}}}, 0, 0 },
  1459. { "ttbr", 1937, {0, {{{0, 0}}}}, 0, 0 },
  1460. { "tplr", 1938, {0, {{{0, 0}}}}, 0, 0 },
  1461. { "tppr", 1939, {0, {{{0, 0}}}}, 0, 0 },
  1462. { "tpxr", 1940, {0, {{{0, 0}}}}, 0, 0 },
  1463. { "timerh", 1952, {0, {{{0, 0}}}}, 0, 0 },
  1464. { "timerl", 1953, {0, {{{0, 0}}}}, 0, 0 },
  1465. { "timerd", 1954, {0, {{{0, 0}}}}, 0, 0 },
  1466. { "dcr", 2048, {0, {{{0, 0}}}}, 0, 0 },
  1467. { "brr", 2049, {0, {{{0, 0}}}}, 0, 0 },
  1468. { "nmar", 2050, {0, {{{0, 0}}}}, 0, 0 },
  1469. { "btbr", 2051, {0, {{{0, 0}}}}, 0, 0 },
  1470. { "ibar0", 2052, {0, {{{0, 0}}}}, 0, 0 },
  1471. { "ibar1", 2053, {0, {{{0, 0}}}}, 0, 0 },
  1472. { "ibar2", 2054, {0, {{{0, 0}}}}, 0, 0 },
  1473. { "ibar3", 2055, {0, {{{0, 0}}}}, 0, 0 },
  1474. { "dbar0", 2056, {0, {{{0, 0}}}}, 0, 0 },
  1475. { "dbar1", 2057, {0, {{{0, 0}}}}, 0, 0 },
  1476. { "dbar2", 2058, {0, {{{0, 0}}}}, 0, 0 },
  1477. { "dbar3", 2059, {0, {{{0, 0}}}}, 0, 0 },
  1478. { "dbdr00", 2060, {0, {{{0, 0}}}}, 0, 0 },
  1479. { "dbdr01", 2061, {0, {{{0, 0}}}}, 0, 0 },
  1480. { "dbdr02", 2062, {0, {{{0, 0}}}}, 0, 0 },
  1481. { "dbdr03", 2063, {0, {{{0, 0}}}}, 0, 0 },
  1482. { "dbdr10", 2064, {0, {{{0, 0}}}}, 0, 0 },
  1483. { "dbdr11", 2065, {0, {{{0, 0}}}}, 0, 0 },
  1484. { "dbdr12", 2066, {0, {{{0, 0}}}}, 0, 0 },
  1485. { "dbdr13", 2067, {0, {{{0, 0}}}}, 0, 0 },
  1486. { "dbdr20", 2068, {0, {{{0, 0}}}}, 0, 0 },
  1487. { "dbdr21", 2069, {0, {{{0, 0}}}}, 0, 0 },
  1488. { "dbdr22", 2070, {0, {{{0, 0}}}}, 0, 0 },
  1489. { "dbdr23", 2071, {0, {{{0, 0}}}}, 0, 0 },
  1490. { "dbdr30", 2072, {0, {{{0, 0}}}}, 0, 0 },
  1491. { "dbdr31", 2073, {0, {{{0, 0}}}}, 0, 0 },
  1492. { "dbdr32", 2074, {0, {{{0, 0}}}}, 0, 0 },
  1493. { "dbdr33", 2075, {0, {{{0, 0}}}}, 0, 0 },
  1494. { "dbmr00", 2076, {0, {{{0, 0}}}}, 0, 0 },
  1495. { "dbmr01", 2077, {0, {{{0, 0}}}}, 0, 0 },
  1496. { "dbmr02", 2078, {0, {{{0, 0}}}}, 0, 0 },
  1497. { "dbmr03", 2079, {0, {{{0, 0}}}}, 0, 0 },
  1498. { "dbmr10", 2080, {0, {{{0, 0}}}}, 0, 0 },
  1499. { "dbmr11", 2081, {0, {{{0, 0}}}}, 0, 0 },
  1500. { "dbmr12", 2082, {0, {{{0, 0}}}}, 0, 0 },
  1501. { "dbmr13", 2083, {0, {{{0, 0}}}}, 0, 0 },
  1502. { "dbmr20", 2084, {0, {{{0, 0}}}}, 0, 0 },
  1503. { "dbmr21", 2085, {0, {{{0, 0}}}}, 0, 0 },
  1504. { "dbmr22", 2086, {0, {{{0, 0}}}}, 0, 0 },
  1505. { "dbmr23", 2087, {0, {{{0, 0}}}}, 0, 0 },
  1506. { "dbmr30", 2088, {0, {{{0, 0}}}}, 0, 0 },
  1507. { "dbmr31", 2089, {0, {{{0, 0}}}}, 0, 0 },
  1508. { "dbmr32", 2090, {0, {{{0, 0}}}}, 0, 0 },
  1509. { "dbmr33", 2091, {0, {{{0, 0}}}}, 0, 0 },
  1510. { "cpcfr", 2304, {0, {{{0, 0}}}}, 0, 0 },
  1511. { "cpcr", 2305, {0, {{{0, 0}}}}, 0, 0 },
  1512. { "cpsr", 2306, {0, {{{0, 0}}}}, 0, 0 },
  1513. { "cptr", 2307, {0, {{{0, 0}}}}, 0, 0 },
  1514. { "cphsr0", 2308, {0, {{{0, 0}}}}, 0, 0 },
  1515. { "cphsr1", 2309, {0, {{{0, 0}}}}, 0, 0 },
  1516. { "cpesr0", 2320, {0, {{{0, 0}}}}, 0, 0 },
  1517. { "cpesr1", 2321, {0, {{{0, 0}}}}, 0, 0 },
  1518. { "cpemr0", 2322, {0, {{{0, 0}}}}, 0, 0 },
  1519. { "cpemr1", 2323, {0, {{{0, 0}}}}, 0, 0 },
  1520. { "iperr0", 2324, {0, {{{0, 0}}}}, 0, 0 },
  1521. { "iperr1", 2325, {0, {{{0, 0}}}}, 0, 0 },
  1522. { "ipjsr", 2326, {0, {{{0, 0}}}}, 0, 0 },
  1523. { "ipjrr", 2327, {0, {{{0, 0}}}}, 0, 0 },
  1524. { "ipcsr0", 2336, {0, {{{0, 0}}}}, 0, 0 },
  1525. { "ipcsr1", 2337, {0, {{{0, 0}}}}, 0, 0 },
  1526. { "ipcwer0", 2338, {0, {{{0, 0}}}}, 0, 0 },
  1527. { "ipcwer1", 2339, {0, {{{0, 0}}}}, 0, 0 },
  1528. { "ipcwr", 2340, {0, {{{0, 0}}}}, 0, 0 },
  1529. { "mbhsr", 2352, {0, {{{0, 0}}}}, 0, 0 },
  1530. { "mbssr", 2353, {0, {{{0, 0}}}}, 0, 0 },
  1531. { "mbrsr", 2354, {0, {{{0, 0}}}}, 0, 0 },
  1532. { "mbsdr", 2355, {0, {{{0, 0}}}}, 0, 0 },
  1533. { "mbrdr", 2356, {0, {{{0, 0}}}}, 0, 0 },
  1534. { "mbsmr", 2357, {0, {{{0, 0}}}}, 0, 0 },
  1535. { "mbstr0", 2359, {0, {{{0, 0}}}}, 0, 0 },
  1536. { "mbstr1", 2360, {0, {{{0, 0}}}}, 0, 0 },
  1537. { "slpr", 2368, {0, {{{0, 0}}}}, 0, 0 },
  1538. { "sldr", 2369, {0, {{{0, 0}}}}, 0, 0 },
  1539. { "slhsr", 2370, {0, {{{0, 0}}}}, 0, 0 },
  1540. { "sltr", 2371, {0, {{{0, 0}}}}, 0, 0 },
  1541. { "slwr", 2372, {0, {{{0, 0}}}}, 0, 0 },
  1542. { "ihsr8", 3848, {0, {{{0, 0}}}}, 0, 0 },
  1543. { "ihsr9", 3849, {0, {{{0, 0}}}}, 0, 0 },
  1544. { "ihsr10", 3850, {0, {{{0, 0}}}}, 0, 0 }
  1545. };
  1546. CGEN_KEYWORD frv_cgen_opval_spr_names =
  1547. {
  1548. & frv_cgen_opval_spr_names_entries[0],
  1549. 1049,
  1550. 0, 0, 0, 0, ""
  1551. };
  1552. static CGEN_KEYWORD_ENTRY frv_cgen_opval_accg_names_entries[] =
  1553. {
  1554. { "accg0", 0, {0, {{{0, 0}}}}, 0, 0 },
  1555. { "accg1", 1, {0, {{{0, 0}}}}, 0, 0 },
  1556. { "accg2", 2, {0, {{{0, 0}}}}, 0, 0 },
  1557. { "accg3", 3, {0, {{{0, 0}}}}, 0, 0 },
  1558. { "accg4", 4, {0, {{{0, 0}}}}, 0, 0 },
  1559. { "accg5", 5, {0, {{{0, 0}}}}, 0, 0 },
  1560. { "accg6", 6, {0, {{{0, 0}}}}, 0, 0 },
  1561. { "accg7", 7, {0, {{{0, 0}}}}, 0, 0 },
  1562. { "accg8", 8, {0, {{{0, 0}}}}, 0, 0 },
  1563. { "accg9", 9, {0, {{{0, 0}}}}, 0, 0 },
  1564. { "accg10", 10, {0, {{{0, 0}}}}, 0, 0 },
  1565. { "accg11", 11, {0, {{{0, 0}}}}, 0, 0 },
  1566. { "accg12", 12, {0, {{{0, 0}}}}, 0, 0 },
  1567. { "accg13", 13, {0, {{{0, 0}}}}, 0, 0 },
  1568. { "accg14", 14, {0, {{{0, 0}}}}, 0, 0 },
  1569. { "accg15", 15, {0, {{{0, 0}}}}, 0, 0 },
  1570. { "accg16", 16, {0, {{{0, 0}}}}, 0, 0 },
  1571. { "accg17", 17, {0, {{{0, 0}}}}, 0, 0 },
  1572. { "accg18", 18, {0, {{{0, 0}}}}, 0, 0 },
  1573. { "accg19", 19, {0, {{{0, 0}}}}, 0, 0 },
  1574. { "accg20", 20, {0, {{{0, 0}}}}, 0, 0 },
  1575. { "accg21", 21, {0, {{{0, 0}}}}, 0, 0 },
  1576. { "accg22", 22, {0, {{{0, 0}}}}, 0, 0 },
  1577. { "accg23", 23, {0, {{{0, 0}}}}, 0, 0 },
  1578. { "accg24", 24, {0, {{{0, 0}}}}, 0, 0 },
  1579. { "accg25", 25, {0, {{{0, 0}}}}, 0, 0 },
  1580. { "accg26", 26, {0, {{{0, 0}}}}, 0, 0 },
  1581. { "accg27", 27, {0, {{{0, 0}}}}, 0, 0 },
  1582. { "accg28", 28, {0, {{{0, 0}}}}, 0, 0 },
  1583. { "accg29", 29, {0, {{{0, 0}}}}, 0, 0 },
  1584. { "accg30", 30, {0, {{{0, 0}}}}, 0, 0 },
  1585. { "accg31", 31, {0, {{{0, 0}}}}, 0, 0 },
  1586. { "accg32", 32, {0, {{{0, 0}}}}, 0, 0 },
  1587. { "accg33", 33, {0, {{{0, 0}}}}, 0, 0 },
  1588. { "accg34", 34, {0, {{{0, 0}}}}, 0, 0 },
  1589. { "accg35", 35, {0, {{{0, 0}}}}, 0, 0 },
  1590. { "accg36", 36, {0, {{{0, 0}}}}, 0, 0 },
  1591. { "accg37", 37, {0, {{{0, 0}}}}, 0, 0 },
  1592. { "accg38", 38, {0, {{{0, 0}}}}, 0, 0 },
  1593. { "accg39", 39, {0, {{{0, 0}}}}, 0, 0 },
  1594. { "accg40", 40, {0, {{{0, 0}}}}, 0, 0 },
  1595. { "accg41", 41, {0, {{{0, 0}}}}, 0, 0 },
  1596. { "accg42", 42, {0, {{{0, 0}}}}, 0, 0 },
  1597. { "accg43", 43, {0, {{{0, 0}}}}, 0, 0 },
  1598. { "accg44", 44, {0, {{{0, 0}}}}, 0, 0 },
  1599. { "accg45", 45, {0, {{{0, 0}}}}, 0, 0 },
  1600. { "accg46", 46, {0, {{{0, 0}}}}, 0, 0 },
  1601. { "accg47", 47, {0, {{{0, 0}}}}, 0, 0 },
  1602. { "accg48", 48, {0, {{{0, 0}}}}, 0, 0 },
  1603. { "accg49", 49, {0, {{{0, 0}}}}, 0, 0 },
  1604. { "accg50", 50, {0, {{{0, 0}}}}, 0, 0 },
  1605. { "accg51", 51, {0, {{{0, 0}}}}, 0, 0 },
  1606. { "accg52", 52, {0, {{{0, 0}}}}, 0, 0 },
  1607. { "accg53", 53, {0, {{{0, 0}}}}, 0, 0 },
  1608. { "accg54", 54, {0, {{{0, 0}}}}, 0, 0 },
  1609. { "accg55", 55, {0, {{{0, 0}}}}, 0, 0 },
  1610. { "accg56", 56, {0, {{{0, 0}}}}, 0, 0 },
  1611. { "accg57", 57, {0, {{{0, 0}}}}, 0, 0 },
  1612. { "accg58", 58, {0, {{{0, 0}}}}, 0, 0 },
  1613. { "accg59", 59, {0, {{{0, 0}}}}, 0, 0 },
  1614. { "accg60", 60, {0, {{{0, 0}}}}, 0, 0 },
  1615. { "accg61", 61, {0, {{{0, 0}}}}, 0, 0 },
  1616. { "accg62", 62, {0, {{{0, 0}}}}, 0, 0 },
  1617. { "accg63", 63, {0, {{{0, 0}}}}, 0, 0 }
  1618. };
  1619. CGEN_KEYWORD frv_cgen_opval_accg_names =
  1620. {
  1621. & frv_cgen_opval_accg_names_entries[0],
  1622. 64,
  1623. 0, 0, 0, 0, ""
  1624. };
  1625. static CGEN_KEYWORD_ENTRY frv_cgen_opval_acc_names_entries[] =
  1626. {
  1627. { "acc0", 0, {0, {{{0, 0}}}}, 0, 0 },
  1628. { "acc1", 1, {0, {{{0, 0}}}}, 0, 0 },
  1629. { "acc2", 2, {0, {{{0, 0}}}}, 0, 0 },
  1630. { "acc3", 3, {0, {{{0, 0}}}}, 0, 0 },
  1631. { "acc4", 4, {0, {{{0, 0}}}}, 0, 0 },
  1632. { "acc5", 5, {0, {{{0, 0}}}}, 0, 0 },
  1633. { "acc6", 6, {0, {{{0, 0}}}}, 0, 0 },
  1634. { "acc7", 7, {0, {{{0, 0}}}}, 0, 0 },
  1635. { "acc8", 8, {0, {{{0, 0}}}}, 0, 0 },
  1636. { "acc9", 9, {0, {{{0, 0}}}}, 0, 0 },
  1637. { "acc10", 10, {0, {{{0, 0}}}}, 0, 0 },
  1638. { "acc11", 11, {0, {{{0, 0}}}}, 0, 0 },
  1639. { "acc12", 12, {0, {{{0, 0}}}}, 0, 0 },
  1640. { "acc13", 13, {0, {{{0, 0}}}}, 0, 0 },
  1641. { "acc14", 14, {0, {{{0, 0}}}}, 0, 0 },
  1642. { "acc15", 15, {0, {{{0, 0}}}}, 0, 0 },
  1643. { "acc16", 16, {0, {{{0, 0}}}}, 0, 0 },
  1644. { "acc17", 17, {0, {{{0, 0}}}}, 0, 0 },
  1645. { "acc18", 18, {0, {{{0, 0}}}}, 0, 0 },
  1646. { "acc19", 19, {0, {{{0, 0}}}}, 0, 0 },
  1647. { "acc20", 20, {0, {{{0, 0}}}}, 0, 0 },
  1648. { "acc21", 21, {0, {{{0, 0}}}}, 0, 0 },
  1649. { "acc22", 22, {0, {{{0, 0}}}}, 0, 0 },
  1650. { "acc23", 23, {0, {{{0, 0}}}}, 0, 0 },
  1651. { "acc24", 24, {0, {{{0, 0}}}}, 0, 0 },
  1652. { "acc25", 25, {0, {{{0, 0}}}}, 0, 0 },
  1653. { "acc26", 26, {0, {{{0, 0}}}}, 0, 0 },
  1654. { "acc27", 27, {0, {{{0, 0}}}}, 0, 0 },
  1655. { "acc28", 28, {0, {{{0, 0}}}}, 0, 0 },
  1656. { "acc29", 29, {0, {{{0, 0}}}}, 0, 0 },
  1657. { "acc30", 30, {0, {{{0, 0}}}}, 0, 0 },
  1658. { "acc31", 31, {0, {{{0, 0}}}}, 0, 0 },
  1659. { "acc32", 32, {0, {{{0, 0}}}}, 0, 0 },
  1660. { "acc33", 33, {0, {{{0, 0}}}}, 0, 0 },
  1661. { "acc34", 34, {0, {{{0, 0}}}}, 0, 0 },
  1662. { "acc35", 35, {0, {{{0, 0}}}}, 0, 0 },
  1663. { "acc36", 36, {0, {{{0, 0}}}}, 0, 0 },
  1664. { "acc37", 37, {0, {{{0, 0}}}}, 0, 0 },
  1665. { "acc38", 38, {0, {{{0, 0}}}}, 0, 0 },
  1666. { "acc39", 39, {0, {{{0, 0}}}}, 0, 0 },
  1667. { "acc40", 40, {0, {{{0, 0}}}}, 0, 0 },
  1668. { "acc41", 41, {0, {{{0, 0}}}}, 0, 0 },
  1669. { "acc42", 42, {0, {{{0, 0}}}}, 0, 0 },
  1670. { "acc43", 43, {0, {{{0, 0}}}}, 0, 0 },
  1671. { "acc44", 44, {0, {{{0, 0}}}}, 0, 0 },
  1672. { "acc45", 45, {0, {{{0, 0}}}}, 0, 0 },
  1673. { "acc46", 46, {0, {{{0, 0}}}}, 0, 0 },
  1674. { "acc47", 47, {0, {{{0, 0}}}}, 0, 0 },
  1675. { "acc48", 48, {0, {{{0, 0}}}}, 0, 0 },
  1676. { "acc49", 49, {0, {{{0, 0}}}}, 0, 0 },
  1677. { "acc50", 50, {0, {{{0, 0}}}}, 0, 0 },
  1678. { "acc51", 51, {0, {{{0, 0}}}}, 0, 0 },
  1679. { "acc52", 52, {0, {{{0, 0}}}}, 0, 0 },
  1680. { "acc53", 53, {0, {{{0, 0}}}}, 0, 0 },
  1681. { "acc54", 54, {0, {{{0, 0}}}}, 0, 0 },
  1682. { "acc55", 55, {0, {{{0, 0}}}}, 0, 0 },
  1683. { "acc56", 56, {0, {{{0, 0}}}}, 0, 0 },
  1684. { "acc57", 57, {0, {{{0, 0}}}}, 0, 0 },
  1685. { "acc58", 58, {0, {{{0, 0}}}}, 0, 0 },
  1686. { "acc59", 59, {0, {{{0, 0}}}}, 0, 0 },
  1687. { "acc60", 60, {0, {{{0, 0}}}}, 0, 0 },
  1688. { "acc61", 61, {0, {{{0, 0}}}}, 0, 0 },
  1689. { "acc62", 62, {0, {{{0, 0}}}}, 0, 0 },
  1690. { "acc63", 63, {0, {{{0, 0}}}}, 0, 0 }
  1691. };
  1692. CGEN_KEYWORD frv_cgen_opval_acc_names =
  1693. {
  1694. & frv_cgen_opval_acc_names_entries[0],
  1695. 64,
  1696. 0, 0, 0, 0, ""
  1697. };
  1698. static CGEN_KEYWORD_ENTRY frv_cgen_opval_iacc0_names_entries[] =
  1699. {
  1700. { "iacc0", 0, {0, {{{0, 0}}}}, 0, 0 }
  1701. };
  1702. CGEN_KEYWORD frv_cgen_opval_iacc0_names =
  1703. {
  1704. & frv_cgen_opval_iacc0_names_entries[0],
  1705. 1,
  1706. 0, 0, 0, 0, ""
  1707. };
  1708. static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries[] =
  1709. {
  1710. { "icc0", 0, {0, {{{0, 0}}}}, 0, 0 },
  1711. { "icc1", 1, {0, {{{0, 0}}}}, 0, 0 },
  1712. { "icc2", 2, {0, {{{0, 0}}}}, 0, 0 },
  1713. { "icc3", 3, {0, {{{0, 0}}}}, 0, 0 }
  1714. };
  1715. CGEN_KEYWORD frv_cgen_opval_iccr_names =
  1716. {
  1717. & frv_cgen_opval_iccr_names_entries[0],
  1718. 4,
  1719. 0, 0, 0, 0, ""
  1720. };
  1721. static CGEN_KEYWORD_ENTRY frv_cgen_opval_fccr_names_entries[] =
  1722. {
  1723. { "fcc0", 0, {0, {{{0, 0}}}}, 0, 0 },
  1724. { "fcc1", 1, {0, {{{0, 0}}}}, 0, 0 },
  1725. { "fcc2", 2, {0, {{{0, 0}}}}, 0, 0 },
  1726. { "fcc3", 3, {0, {{{0, 0}}}}, 0, 0 }
  1727. };
  1728. CGEN_KEYWORD frv_cgen_opval_fccr_names =
  1729. {
  1730. & frv_cgen_opval_fccr_names_entries[0],
  1731. 4,
  1732. 0, 0, 0, 0, ""
  1733. };
  1734. static CGEN_KEYWORD_ENTRY frv_cgen_opval_cccr_names_entries[] =
  1735. {
  1736. { "cc0", 0, {0, {{{0, 0}}}}, 0, 0 },
  1737. { "cc1", 1, {0, {{{0, 0}}}}, 0, 0 },
  1738. { "cc2", 2, {0, {{{0, 0}}}}, 0, 0 },
  1739. { "cc3", 3, {0, {{{0, 0}}}}, 0, 0 },
  1740. { "cc4", 4, {0, {{{0, 0}}}}, 0, 0 },
  1741. { "cc5", 5, {0, {{{0, 0}}}}, 0, 0 },
  1742. { "cc6", 6, {0, {{{0, 0}}}}, 0, 0 },
  1743. { "cc7", 7, {0, {{{0, 0}}}}, 0, 0 }
  1744. };
  1745. CGEN_KEYWORD frv_cgen_opval_cccr_names =
  1746. {
  1747. & frv_cgen_opval_cccr_names_entries[0],
  1748. 8,
  1749. 0, 0, 0, 0, ""
  1750. };
  1751. static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_pack_entries[] =
  1752. {
  1753. { "", 1, {0, {{{0, 0}}}}, 0, 0 },
  1754. { ".p", 0, {0, {{{0, 0}}}}, 0, 0 },
  1755. { ".P", 0, {0, {{{0, 0}}}}, 0, 0 }
  1756. };
  1757. CGEN_KEYWORD frv_cgen_opval_h_pack =
  1758. {
  1759. & frv_cgen_opval_h_pack_entries[0],
  1760. 3,
  1761. 0, 0, 0, 0, ""
  1762. };
  1763. static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_taken_entries[] =
  1764. {
  1765. { "", 2, {0, {{{0, 0}}}}, 0, 0 },
  1766. { "", 0, {0, {{{0, 0}}}}, 0, 0 },
  1767. { "", 1, {0, {{{0, 0}}}}, 0, 0 },
  1768. { "", 3, {0, {{{0, 0}}}}, 0, 0 }
  1769. };
  1770. CGEN_KEYWORD frv_cgen_opval_h_hint_taken =
  1771. {
  1772. & frv_cgen_opval_h_hint_taken_entries[0],
  1773. 4,
  1774. 0, 0, 0, 0, ""
  1775. };
  1776. static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_not_taken_entries[] =
  1777. {
  1778. { "", 0, {0, {{{0, 0}}}}, 0, 0 },
  1779. { "", 1, {0, {{{0, 0}}}}, 0, 0 },
  1780. { "", 2, {0, {{{0, 0}}}}, 0, 0 },
  1781. { "", 3, {0, {{{0, 0}}}}, 0, 0 }
  1782. };
  1783. CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken =
  1784. {
  1785. & frv_cgen_opval_h_hint_not_taken_entries[0],
  1786. 4,
  1787. 0, 0, 0, 0, ""
  1788. };
  1789. /* The hardware table. */
  1790. #define A(a) (1 << CGEN_HW_##a)
  1791. const CGEN_HW_ENTRY frv_cgen_hw_table[] =
  1792. {
  1793. { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1794. { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1795. { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1796. { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1797. { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1798. { "h-reloc-ann", HW_H_RELOC_ANN, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1799. { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
  1800. { "h-psr_imple", HW_H_PSR_IMPLE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1801. { "h-psr_ver", HW_H_PSR_VER, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1802. { "h-psr_ice", HW_H_PSR_ICE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1803. { "h-psr_nem", HW_H_PSR_NEM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1804. { "h-psr_cm", HW_H_PSR_CM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1805. { "h-psr_be", HW_H_PSR_BE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1806. { "h-psr_esr", HW_H_PSR_ESR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1807. { "h-psr_ef", HW_H_PSR_EF, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1808. { "h-psr_em", HW_H_PSR_EM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1809. { "h-psr_pil", HW_H_PSR_PIL, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1810. { "h-psr_ps", HW_H_PSR_PS, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1811. { "h-psr_et", HW_H_PSR_ET, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1812. { "h-psr_s", HW_H_PSR_S, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1813. { "h-tbr_tba", HW_H_TBR_TBA, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1814. { "h-tbr_tt", HW_H_TBR_TT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1815. { "h-bpsr_bs", HW_H_BPSR_BS, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1816. { "h-bpsr_bet", HW_H_BPSR_BET, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1817. { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1818. { "h-gr_double", HW_H_GR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1819. { "h-gr_hi", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1820. { "h-gr_lo", HW_H_GR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1821. { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1822. { "h-fr_double", HW_H_FR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1823. { "h-fr_int", HW_H_FR_INT, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1824. { "h-fr_hi", HW_H_FR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1825. { "h-fr_lo", HW_H_FR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1826. { "h-fr_0", HW_H_FR_0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1827. { "h-fr_1", HW_H_FR_1, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1828. { "h-fr_2", HW_H_FR_2, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1829. { "h-fr_3", HW_H_FR_3, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1830. { "h-cpr", HW_H_CPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(PROFILE), { { { (1<<MACH_FRV), 0 } } } } },
  1831. { "h-cpr_double", HW_H_CPR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_FRV), 0 } } } } },
  1832. { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_spr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1833. { "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1834. { "h-acc40S", HW_H_ACC40S, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1835. { "h-acc40U", HW_H_ACC40U, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1836. { "h-iacc0", HW_H_IACC0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iacc0_names, { 0|A(VIRTUAL)|A(PROFILE), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } } } } },
  1837. { "h-iccr", HW_H_ICCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iccr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1838. { "h-fccr", HW_H_FCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fccr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1839. { "h-cccr", HW_H_CCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cccr_names, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } } } } },
  1840. { "h-pack", HW_H_PACK, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_pack, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1841. { "h-hint-taken", HW_H_HINT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_taken, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1842. { "h-hint-not-taken", HW_H_HINT_NOT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_not_taken, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1843. { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
  1844. };
  1845. #undef A
  1846. /* The instruction field table. */
  1847. #define A(a) (1 << CGEN_IFLD_##a)
  1848. const CGEN_IFLD frv_cgen_ifld_table[] =
  1849. {
  1850. { FRV_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1851. { FRV_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1852. { FRV_F_PACK, "f-pack", 0, 32, 31, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1853. { FRV_F_OP, "f-op", 0, 32, 24, 7, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1854. { FRV_F_OPE1, "f-ope1", 0, 32, 11, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1855. { FRV_F_OPE2, "f-ope2", 0, 32, 9, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1856. { FRV_F_OPE3, "f-ope3", 0, 32, 15, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1857. { FRV_F_OPE4, "f-ope4", 0, 32, 7, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1858. { FRV_F_GRI, "f-GRi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1859. { FRV_F_GRJ, "f-GRj", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1860. { FRV_F_GRK, "f-GRk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1861. { FRV_F_FRI, "f-FRi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1862. { FRV_F_FRJ, "f-FRj", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1863. { FRV_F_FRK, "f-FRk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1864. { FRV_F_CPRI, "f-CPRi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1865. { FRV_F_CPRJ, "f-CPRj", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1866. { FRV_F_CPRK, "f-CPRk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1867. { FRV_F_ACCGI, "f-ACCGi", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1868. { FRV_F_ACCGK, "f-ACCGk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1869. { FRV_F_ACC40SI, "f-ACC40Si", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1870. { FRV_F_ACC40UI, "f-ACC40Ui", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1871. { FRV_F_ACC40SK, "f-ACC40Sk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1872. { FRV_F_ACC40UK, "f-ACC40Uk", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1873. { FRV_F_CRI, "f-CRi", 0, 32, 14, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1874. { FRV_F_CRJ, "f-CRj", 0, 32, 2, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1875. { FRV_F_CRK, "f-CRk", 0, 32, 27, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1876. { FRV_F_CCI, "f-CCi", 0, 32, 11, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1877. { FRV_F_CRJ_INT, "f-CRj_int", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1878. { FRV_F_CRJ_FLOAT, "f-CRj_float", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1879. { FRV_F_ICCI_1, "f-ICCi_1", 0, 32, 11, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1880. { FRV_F_ICCI_2, "f-ICCi_2", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1881. { FRV_F_ICCI_3, "f-ICCi_3", 0, 32, 1, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1882. { FRV_F_FCCI_1, "f-FCCi_1", 0, 32, 11, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1883. { FRV_F_FCCI_2, "f-FCCi_2", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1884. { FRV_F_FCCI_3, "f-FCCi_3", 0, 32, 1, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1885. { FRV_F_FCCK, "f-FCCk", 0, 32, 26, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1886. { FRV_F_EIR, "f-eir", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1887. { FRV_F_S10, "f-s10", 0, 32, 9, 10, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1888. { FRV_F_S12, "f-s12", 0, 32, 11, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1889. { FRV_F_D12, "f-d12", 0, 32, 11, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1890. { FRV_F_U16, "f-u16", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1891. { FRV_F_S16, "f-s16", 0, 32, 15, 16, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1892. { FRV_F_S6, "f-s6", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1893. { FRV_F_S6_1, "f-s6_1", 0, 32, 11, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1894. { FRV_F_U6, "f-u6", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1895. { FRV_F_S5, "f-s5", 0, 32, 4, 5, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1896. { FRV_F_U12_H, "f-u12-h", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1897. { FRV_F_U12_L, "f-u12-l", 0, 32, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1898. { FRV_F_U12, "f-u12", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
  1899. { FRV_F_INT_CC, "f-int-cc", 0, 32, 30, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1900. { FRV_F_FLT_CC, "f-flt-cc", 0, 32, 30, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1901. { FRV_F_COND, "f-cond", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1902. { FRV_F_CCOND, "f-ccond", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1903. { FRV_F_HINT, "f-hint", 0, 32, 17, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1904. { FRV_F_LI, "f-LI", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1905. { FRV_F_LOCK, "f-lock", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1906. { FRV_F_DEBUG, "f-debug", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1907. { FRV_F_A, "f-A", 0, 32, 17, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1908. { FRV_F_AE, "f-ae", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1909. { FRV_F_SPR_H, "f-spr-h", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1910. { FRV_F_SPR_L, "f-spr-l", 0, 32, 17, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1911. { FRV_F_SPR, "f-spr", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
  1912. { FRV_F_LABEL16, "f-label16", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
  1913. { FRV_F_LABELH6, "f-labelH6", 0, 32, 30, 6, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1914. { FRV_F_LABELL18, "f-labelL18", 0, 32, 17, 18, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1915. { FRV_F_LABEL24, "f-label24", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
  1916. { FRV_F_LRAE, "f-LRAE", 0, 32, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1917. { FRV_F_LRAD, "f-LRAD", 0, 32, 4, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1918. { FRV_F_LRAS, "f-LRAS", 0, 32, 3, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1919. { FRV_F_TLBPROPX, "f-TLBPRopx", 0, 32, 28, 3, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1920. { FRV_F_TLBPRL, "f-TLBPRL", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1921. { FRV_F_ICCI_1_NULL, "f-ICCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1922. { FRV_F_ICCI_2_NULL, "f-ICCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1923. { FRV_F_ICCI_3_NULL, "f-ICCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1924. { FRV_F_FCCI_1_NULL, "f-FCCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1925. { FRV_F_FCCI_2_NULL, "f-FCCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1926. { FRV_F_FCCI_3_NULL, "f-FCCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1927. { FRV_F_RS_NULL, "f-rs-null", 0, 32, 17, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1928. { FRV_F_GRI_NULL, "f-GRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1929. { FRV_F_GRJ_NULL, "f-GRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1930. { FRV_F_GRK_NULL, "f-GRk-null", 0, 32, 30, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1931. { FRV_F_FRI_NULL, "f-FRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1932. { FRV_F_FRJ_NULL, "f-FRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1933. { FRV_F_ACCJ_NULL, "f-ACCj-null", 0, 32, 5, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1934. { FRV_F_RD_NULL, "f-rd-null", 0, 32, 30, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1935. { FRV_F_COND_NULL, "f-cond-null", 0, 32, 30, 4, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1936. { FRV_F_CCOND_NULL, "f-ccond-null", 0, 32, 12, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1937. { FRV_F_S12_NULL, "f-s12-null", 0, 32, 11, 12, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1938. { FRV_F_LABEL16_NULL, "f-label16-null", 0, 32, 15, 16, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1939. { FRV_F_MISC_NULL_1, "f-misc-null-1", 0, 32, 30, 5, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1940. { FRV_F_MISC_NULL_2, "f-misc-null-2", 0, 32, 11, 6, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1941. { FRV_F_MISC_NULL_3, "f-misc-null-3", 0, 32, 11, 4, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1942. { FRV_F_MISC_NULL_4, "f-misc-null-4", 0, 32, 17, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1943. { FRV_F_MISC_NULL_5, "f-misc-null-5", 0, 32, 17, 16, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1944. { FRV_F_MISC_NULL_6, "f-misc-null-6", 0, 32, 30, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1945. { FRV_F_MISC_NULL_7, "f-misc-null-7", 0, 32, 17, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1946. { FRV_F_MISC_NULL_8, "f-misc-null-8", 0, 32, 5, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1947. { FRV_F_MISC_NULL_9, "f-misc-null-9", 0, 32, 5, 4, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1948. { FRV_F_MISC_NULL_10, "f-misc-null-10", 0, 32, 16, 5, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1949. { FRV_F_MISC_NULL_11, "f-misc-null-11", 0, 32, 5, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1950. { FRV_F_LRA_NULL, "f-LRA-null", 0, 32, 2, 3, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1951. { FRV_F_TLBPR_NULL, "f-TLBPR-null", 0, 32, 30, 2, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1952. { FRV_F_LI_OFF, "f-LI-off", 0, 32, 25, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1953. { FRV_F_LI_ON, "f-LI-on", 0, 32, 25, 1, { 0|A(RESERVED), { { { (1<<MACH_BASE), 0 } } } } },
  1954. { FRV_F_RELOC_ANN, "f-reloc-ann", 0, 32, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1955. { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
  1956. };
  1957. #undef A
  1958. /* multi ifield declarations */
  1959. const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD [];
  1960. const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD [];
  1961. const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [];
  1962. /* multi ifield definitions */
  1963. const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD [] =
  1964. {
  1965. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U12_H] } },
  1966. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U12_L] } },
  1967. { 0, { (const PTR) 0 } }
  1968. };
  1969. const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD [] =
  1970. {
  1971. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_SPR_H] } },
  1972. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_SPR_L] } },
  1973. { 0, { (const PTR) 0 } }
  1974. };
  1975. const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [] =
  1976. {
  1977. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABELH6] } },
  1978. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABELL18] } },
  1979. { 0, { (const PTR) 0 } }
  1980. };
  1981. /* The operand table. */
  1982. #define A(a) (1 << CGEN_OPERAND_##a)
  1983. #define OPERAND(op) FRV_OPERAND_##op
  1984. const CGEN_OPERAND frv_cgen_operand_table[] =
  1985. {
  1986. /* pc: program counter */
  1987. { "pc", FRV_OPERAND_PC, HW_H_PC, 0, 0,
  1988. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_NIL] } },
  1989. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  1990. /* pack: packing bit */
  1991. { "pack", FRV_OPERAND_PACK, HW_H_PACK, 31, 1,
  1992. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_PACK] } },
  1993. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1994. /* GRi: source register 1 */
  1995. { "GRi", FRV_OPERAND_GRI, HW_H_GR, 17, 6,
  1996. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRI] } },
  1997. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  1998. /* GRj: source register 2 */
  1999. { "GRj", FRV_OPERAND_GRJ, HW_H_GR, 5, 6,
  2000. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRJ] } },
  2001. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2002. /* GRk: destination register */
  2003. { "GRk", FRV_OPERAND_GRK, HW_H_GR, 30, 6,
  2004. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
  2005. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2006. /* GRkhi: destination register */
  2007. { "GRkhi", FRV_OPERAND_GRKHI, HW_H_GR_HI, 30, 6,
  2008. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
  2009. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2010. /* GRklo: destination register */
  2011. { "GRklo", FRV_OPERAND_GRKLO, HW_H_GR_LO, 30, 6,
  2012. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
  2013. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2014. /* GRdoublek: destination register */
  2015. { "GRdoublek", FRV_OPERAND_GRDOUBLEK, HW_H_GR_DOUBLE, 30, 6,
  2016. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
  2017. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2018. /* ACC40Si: signed accumulator */
  2019. { "ACC40Si", FRV_OPERAND_ACC40SI, HW_H_ACC40S, 17, 6,
  2020. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SI] } },
  2021. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2022. /* ACC40Ui: unsigned accumulator */
  2023. { "ACC40Ui", FRV_OPERAND_ACC40UI, HW_H_ACC40U, 17, 6,
  2024. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UI] } },
  2025. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2026. /* ACC40Sk: target accumulator */
  2027. { "ACC40Sk", FRV_OPERAND_ACC40SK, HW_H_ACC40S, 30, 6,
  2028. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SK] } },
  2029. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2030. /* ACC40Uk: target accumulator */
  2031. { "ACC40Uk", FRV_OPERAND_ACC40UK, HW_H_ACC40U, 30, 6,
  2032. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UK] } },
  2033. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2034. /* ACCGi: source register */
  2035. { "ACCGi", FRV_OPERAND_ACCGI, HW_H_ACCG, 17, 6,
  2036. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGI] } },
  2037. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2038. /* ACCGk: target register */
  2039. { "ACCGk", FRV_OPERAND_ACCGK, HW_H_ACCG, 30, 6,
  2040. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGK] } },
  2041. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2042. /* CPRi: source register */
  2043. { "CPRi", FRV_OPERAND_CPRI, HW_H_CPR, 17, 6,
  2044. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRI] } },
  2045. { 0, { { { (1<<MACH_FRV), 0 } } } } },
  2046. /* CPRj: source register */
  2047. { "CPRj", FRV_OPERAND_CPRJ, HW_H_CPR, 5, 6,
  2048. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRJ] } },
  2049. { 0, { { { (1<<MACH_FRV), 0 } } } } },
  2050. /* CPRk: destination register */
  2051. { "CPRk", FRV_OPERAND_CPRK, HW_H_CPR, 30, 6,
  2052. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
  2053. { 0, { { { (1<<MACH_FRV), 0 } } } } },
  2054. /* CPRdoublek: destination register */
  2055. { "CPRdoublek", FRV_OPERAND_CPRDOUBLEK, HW_H_CPR_DOUBLE, 30, 6,
  2056. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
  2057. { 0, { { { (1<<MACH_FRV), 0 } } } } },
  2058. /* FRinti: source register 1 */
  2059. { "FRinti", FRV_OPERAND_FRINTI, HW_H_FR_INT, 17, 6,
  2060. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
  2061. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2062. /* FRintj: source register 2 */
  2063. { "FRintj", FRV_OPERAND_FRINTJ, HW_H_FR_INT, 5, 6,
  2064. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
  2065. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2066. /* FRintk: target register */
  2067. { "FRintk", FRV_OPERAND_FRINTK, HW_H_FR_INT, 30, 6,
  2068. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
  2069. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2070. /* FRi: source register 1 */
  2071. { "FRi", FRV_OPERAND_FRI, HW_H_FR, 17, 6,
  2072. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
  2073. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2074. /* FRj: source register 2 */
  2075. { "FRj", FRV_OPERAND_FRJ, HW_H_FR, 5, 6,
  2076. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
  2077. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2078. /* FRk: destination register */
  2079. { "FRk", FRV_OPERAND_FRK, HW_H_FR, 30, 6,
  2080. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
  2081. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2082. /* FRkhi: destination register */
  2083. { "FRkhi", FRV_OPERAND_FRKHI, HW_H_FR_HI, 30, 6,
  2084. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
  2085. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2086. /* FRklo: destination register */
  2087. { "FRklo", FRV_OPERAND_FRKLO, HW_H_FR_LO, 30, 6,
  2088. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
  2089. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2090. /* FRdoublei: source register 1 */
  2091. { "FRdoublei", FRV_OPERAND_FRDOUBLEI, HW_H_FR_DOUBLE, 17, 6,
  2092. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
  2093. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2094. /* FRdoublej: source register 2 */
  2095. { "FRdoublej", FRV_OPERAND_FRDOUBLEJ, HW_H_FR_DOUBLE, 5, 6,
  2096. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
  2097. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2098. /* FRdoublek: target register */
  2099. { "FRdoublek", FRV_OPERAND_FRDOUBLEK, HW_H_FR_DOUBLE, 30, 6,
  2100. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
  2101. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2102. /* CRi: source register 1 */
  2103. { "CRi", FRV_OPERAND_CRI, HW_H_CCCR, 14, 3,
  2104. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRI] } },
  2105. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2106. /* CRj: source register 2 */
  2107. { "CRj", FRV_OPERAND_CRJ, HW_H_CCCR, 2, 3,
  2108. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ] } },
  2109. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2110. /* CRj_int: destination register */
  2111. { "CRj_int", FRV_OPERAND_CRJ_INT, HW_H_CCCR, 26, 2,
  2112. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_INT] } },
  2113. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2114. /* CRj_float: destination register */
  2115. { "CRj_float", FRV_OPERAND_CRJ_FLOAT, HW_H_CCCR, 26, 2,
  2116. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_FLOAT] } },
  2117. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2118. /* CRk: destination register */
  2119. { "CRk", FRV_OPERAND_CRK, HW_H_CCCR, 27, 3,
  2120. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRK] } },
  2121. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2122. /* CCi: condition register */
  2123. { "CCi", FRV_OPERAND_CCI, HW_H_CCCR, 11, 3,
  2124. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCI] } },
  2125. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2126. /* ICCi_1: condition register */
  2127. { "ICCi_1", FRV_OPERAND_ICCI_1, HW_H_ICCR, 11, 2,
  2128. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_1] } },
  2129. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2130. /* ICCi_2: condition register */
  2131. { "ICCi_2", FRV_OPERAND_ICCI_2, HW_H_ICCR, 26, 2,
  2132. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_2] } },
  2133. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2134. /* ICCi_3: condition register */
  2135. { "ICCi_3", FRV_OPERAND_ICCI_3, HW_H_ICCR, 1, 2,
  2136. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_3] } },
  2137. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2138. /* FCCi_1: condition register */
  2139. { "FCCi_1", FRV_OPERAND_FCCI_1, HW_H_FCCR, 11, 2,
  2140. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_1] } },
  2141. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2142. /* FCCi_2: condition register */
  2143. { "FCCi_2", FRV_OPERAND_FCCI_2, HW_H_FCCR, 26, 2,
  2144. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_2] } },
  2145. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2146. /* FCCi_3: condition register */
  2147. { "FCCi_3", FRV_OPERAND_FCCI_3, HW_H_FCCR, 1, 2,
  2148. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_3] } },
  2149. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2150. /* FCCk: condition register */
  2151. { "FCCk", FRV_OPERAND_FCCK, HW_H_FCCR, 26, 2,
  2152. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCK] } },
  2153. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2154. /* eir: exception insn reg */
  2155. { "eir", FRV_OPERAND_EIR, HW_H_UINT, 17, 6,
  2156. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_EIR] } },
  2157. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2158. /* s10: 10 bit signed immediate */
  2159. { "s10", FRV_OPERAND_S10, HW_H_SINT, 9, 10,
  2160. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S10] } },
  2161. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2162. /* u16: 16 bit unsigned immediate */
  2163. { "u16", FRV_OPERAND_U16, HW_H_UINT, 15, 16,
  2164. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
  2165. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2166. /* s16: 16 bit signed immediate */
  2167. { "s16", FRV_OPERAND_S16, HW_H_SINT, 15, 16,
  2168. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
  2169. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2170. /* s6: 6 bit signed immediate */
  2171. { "s6", FRV_OPERAND_S6, HW_H_SINT, 5, 6,
  2172. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6] } },
  2173. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2174. /* s6_1: 6 bit signed immediate */
  2175. { "s6_1", FRV_OPERAND_S6_1, HW_H_SINT, 11, 6,
  2176. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6_1] } },
  2177. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2178. /* u6: 6 bit unsigned immediate */
  2179. { "u6", FRV_OPERAND_U6, HW_H_UINT, 5, 6,
  2180. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U6] } },
  2181. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2182. /* s5: 5 bit signed immediate */
  2183. { "s5", FRV_OPERAND_S5, HW_H_SINT, 4, 5,
  2184. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S5] } },
  2185. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2186. /* cond: conditional arithmetic */
  2187. { "cond", FRV_OPERAND_COND, HW_H_UINT, 8, 1,
  2188. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_COND] } },
  2189. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2190. /* ccond: lr branch condition */
  2191. { "ccond", FRV_OPERAND_CCOND, HW_H_UINT, 12, 1,
  2192. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCOND] } },
  2193. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2194. /* hint: 2 bit branch predictor */
  2195. { "hint", FRV_OPERAND_HINT, HW_H_UINT, 17, 2,
  2196. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
  2197. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2198. /* hint_taken: 2 bit branch predictor */
  2199. { "hint_taken", FRV_OPERAND_HINT_TAKEN, HW_H_HINT_TAKEN, 17, 2,
  2200. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
  2201. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2202. /* hint_not_taken: 2 bit branch predictor */
  2203. { "hint_not_taken", FRV_OPERAND_HINT_NOT_TAKEN, HW_H_HINT_NOT_TAKEN, 17, 2,
  2204. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
  2205. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2206. /* LI: link indicator */
  2207. { "LI", FRV_OPERAND_LI, HW_H_UINT, 25, 1,
  2208. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LI] } },
  2209. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2210. /* lock: cache lock indicator */
  2211. { "lock", FRV_OPERAND_LOCK, HW_H_UINT, 25, 1,
  2212. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LOCK] } },
  2213. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2214. /* debug: debug mode indicator */
  2215. { "debug", FRV_OPERAND_DEBUG, HW_H_UINT, 25, 1,
  2216. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_DEBUG] } },
  2217. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2218. /* ae: all entries indicator */
  2219. { "ae", FRV_OPERAND_AE, HW_H_UINT, 25, 1,
  2220. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_AE] } },
  2221. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2222. /* label16: 18 bit pc relative address */
  2223. { "label16", FRV_OPERAND_LABEL16, HW_H_IADDR, 15, 16,
  2224. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABEL16] } },
  2225. { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } } },
  2226. /* LRAE: Load Real Address E flag */
  2227. { "LRAE", FRV_OPERAND_LRAE, HW_H_UINT, 5, 1,
  2228. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAE] } },
  2229. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2230. /* LRAD: Load Real Address D flag */
  2231. { "LRAD", FRV_OPERAND_LRAD, HW_H_UINT, 4, 1,
  2232. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAD] } },
  2233. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2234. /* LRAS: Load Real Address S flag */
  2235. { "LRAS", FRV_OPERAND_LRAS, HW_H_UINT, 3, 1,
  2236. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAS] } },
  2237. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2238. /* TLBPRopx: TLB Probe operation number */
  2239. { "TLBPRopx", FRV_OPERAND_TLBPROPX, HW_H_UINT, 28, 3,
  2240. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPROPX] } },
  2241. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2242. /* TLBPRL: TLB Probe L flag */
  2243. { "TLBPRL", FRV_OPERAND_TLBPRL, HW_H_UINT, 25, 1,
  2244. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPRL] } },
  2245. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2246. /* A0: A==0 operand of mclracc */
  2247. { "A0", FRV_OPERAND_A0, HW_H_UINT, 17, 1,
  2248. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
  2249. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2250. /* A1: A==1 operand of mclracc */
  2251. { "A1", FRV_OPERAND_A1, HW_H_UINT, 17, 1,
  2252. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
  2253. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2254. /* FRintieven: (even) source register 1 */
  2255. { "FRintieven", FRV_OPERAND_FRINTIEVEN, HW_H_FR_INT, 17, 6,
  2256. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
  2257. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2258. /* FRintjeven: (even) source register 2 */
  2259. { "FRintjeven", FRV_OPERAND_FRINTJEVEN, HW_H_FR_INT, 5, 6,
  2260. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
  2261. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2262. /* FRintkeven: (even) target register */
  2263. { "FRintkeven", FRV_OPERAND_FRINTKEVEN, HW_H_FR_INT, 30, 6,
  2264. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
  2265. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2266. /* d12: 12 bit signed immediate */
  2267. { "d12", FRV_OPERAND_D12, HW_H_SINT, 11, 12,
  2268. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
  2269. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2270. /* s12: 12 bit signed immediate */
  2271. { "s12", FRV_OPERAND_S12, HW_H_SINT, 11, 12,
  2272. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
  2273. { 0|A(HASH_PREFIX), { { { (1<<MACH_BASE), 0 } } } } },
  2274. /* u12: 12 bit signed immediate */
  2275. { "u12", FRV_OPERAND_U12, HW_H_SINT, 5, 12,
  2276. { 2, { (const PTR) &FRV_F_U12_MULTI_IFIELD[0] } },
  2277. { 0|A(HASH_PREFIX)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
  2278. /* spr: special purpose register */
  2279. { "spr", FRV_OPERAND_SPR, HW_H_SPR, 17, 12,
  2280. { 2, { (const PTR) &FRV_F_SPR_MULTI_IFIELD[0] } },
  2281. { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
  2282. /* ulo16: 16 bit unsigned immediate, for #lo() */
  2283. { "ulo16", FRV_OPERAND_ULO16, HW_H_UINT, 15, 16,
  2284. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
  2285. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2286. /* slo16: 16 bit unsigned immediate, for #lo() */
  2287. { "slo16", FRV_OPERAND_SLO16, HW_H_SINT, 15, 16,
  2288. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
  2289. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2290. /* uhi16: 16 bit unsigned immediate, for #hi() */
  2291. { "uhi16", FRV_OPERAND_UHI16, HW_H_UINT, 15, 16,
  2292. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
  2293. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2294. /* label24: 26 bit pc relative address */
  2295. { "label24", FRV_OPERAND_LABEL24, HW_H_IADDR, 17, 24,
  2296. { 2, { (const PTR) &FRV_F_LABEL24_MULTI_IFIELD[0] } },
  2297. { 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
  2298. /* psr_esr: PSR.ESR bit */
  2299. { "psr_esr", FRV_OPERAND_PSR_ESR, HW_H_PSR_ESR, 0, 0,
  2300. { 0, { (const PTR) 0 } },
  2301. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2302. /* psr_s: PSR.S bit */
  2303. { "psr_s", FRV_OPERAND_PSR_S, HW_H_PSR_S, 0, 0,
  2304. { 0, { (const PTR) 0 } },
  2305. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2306. /* psr_ps: PSR.PS bit */
  2307. { "psr_ps", FRV_OPERAND_PSR_PS, HW_H_PSR_PS, 0, 0,
  2308. { 0, { (const PTR) 0 } },
  2309. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2310. /* psr_et: PSR.ET bit */
  2311. { "psr_et", FRV_OPERAND_PSR_ET, HW_H_PSR_ET, 0, 0,
  2312. { 0, { (const PTR) 0 } },
  2313. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2314. /* bpsr_bs: BPSR.BS bit */
  2315. { "bpsr_bs", FRV_OPERAND_BPSR_BS, HW_H_BPSR_BS, 0, 0,
  2316. { 0, { (const PTR) 0 } },
  2317. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2318. /* bpsr_bet: BPSR.BET bit */
  2319. { "bpsr_bet", FRV_OPERAND_BPSR_BET, HW_H_BPSR_BET, 0, 0,
  2320. { 0, { (const PTR) 0 } },
  2321. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2322. /* tbr_tba: TBR.TBA */
  2323. { "tbr_tba", FRV_OPERAND_TBR_TBA, HW_H_TBR_TBA, 0, 0,
  2324. { 0, { (const PTR) 0 } },
  2325. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2326. /* tbr_tt: TBR.TT */
  2327. { "tbr_tt", FRV_OPERAND_TBR_TT, HW_H_TBR_TT, 0, 0,
  2328. { 0, { (const PTR) 0 } },
  2329. { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } } },
  2330. /* ldann: ld annotation */
  2331. { "ldann", FRV_OPERAND_LDANN, HW_H_RELOC_ANN, 0, 0,
  2332. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
  2333. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2334. /* lddann: ldd annotation */
  2335. { "lddann", FRV_OPERAND_LDDANN, HW_H_RELOC_ANN, 0, 0,
  2336. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
  2337. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2338. /* callann: call annotation */
  2339. { "callann", FRV_OPERAND_CALLANN, HW_H_RELOC_ANN, 0, 0,
  2340. { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
  2341. { 0, { { { (1<<MACH_BASE), 0 } } } } },
  2342. /* sentinel */
  2343. { 0, 0, 0, 0, 0,
  2344. { 0, { (const PTR) 0 } },
  2345. { 0, { { { (1<<MACH_BASE), 0 } } } } }
  2346. };
  2347. #undef A
  2348. /* The instruction table. */
  2349. #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
  2350. #define A(a) (1 << CGEN_INSN_##a)
  2351. static const CGEN_IBASE frv_cgen_insn_table[MAX_INSNS] =
  2352. {
  2353. /* Special null first entry.
  2354. A `num' value of zero is thus invalid.
  2355. Also, the special `invalid' insn resides here. */
  2356. { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_NIL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } } },
  2357. /* add$pack $GRi,$GRj,$GRk */
  2358. {
  2359. FRV_INSN_ADD, "add", "add", 32,
  2360. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2361. },
  2362. /* sub$pack $GRi,$GRj,$GRk */
  2363. {
  2364. FRV_INSN_SUB, "sub", "sub", 32,
  2365. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2366. },
  2367. /* and$pack $GRi,$GRj,$GRk */
  2368. {
  2369. FRV_INSN_AND, "and", "and", 32,
  2370. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2371. },
  2372. /* or$pack $GRi,$GRj,$GRk */
  2373. {
  2374. FRV_INSN_OR, "or", "or", 32,
  2375. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2376. },
  2377. /* xor$pack $GRi,$GRj,$GRk */
  2378. {
  2379. FRV_INSN_XOR, "xor", "xor", 32,
  2380. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2381. },
  2382. /* not$pack $GRj,$GRk */
  2383. {
  2384. FRV_INSN_NOT, "not", "not", 32,
  2385. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2386. },
  2387. /* sdiv$pack $GRi,$GRj,$GRk */
  2388. {
  2389. FRV_INSN_SDIV, "sdiv", "sdiv", 32,
  2390. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2391. },
  2392. /* nsdiv$pack $GRi,$GRj,$GRk */
  2393. {
  2394. FRV_INSN_NSDIV, "nsdiv", "nsdiv", 32,
  2395. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2396. },
  2397. /* udiv$pack $GRi,$GRj,$GRk */
  2398. {
  2399. FRV_INSN_UDIV, "udiv", "udiv", 32,
  2400. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2401. },
  2402. /* nudiv$pack $GRi,$GRj,$GRk */
  2403. {
  2404. FRV_INSN_NUDIV, "nudiv", "nudiv", 32,
  2405. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2406. },
  2407. /* smul$pack $GRi,$GRj,$GRdoublek */
  2408. {
  2409. FRV_INSN_SMUL, "smul", "smul", 32,
  2410. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2411. },
  2412. /* umul$pack $GRi,$GRj,$GRdoublek */
  2413. {
  2414. FRV_INSN_UMUL, "umul", "umul", 32,
  2415. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2416. },
  2417. /* smu$pack $GRi,$GRj */
  2418. {
  2419. FRV_INSN_SMU, "smu", "smu", 32,
  2420. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IACC, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2421. },
  2422. /* smass$pack $GRi,$GRj */
  2423. {
  2424. FRV_INSN_SMASS, "smass", "smass", 32,
  2425. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IACC, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2426. },
  2427. /* smsss$pack $GRi,$GRj */
  2428. {
  2429. FRV_INSN_SMSSS, "smsss", "smsss", 32,
  2430. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IACC, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2431. },
  2432. /* sll$pack $GRi,$GRj,$GRk */
  2433. {
  2434. FRV_INSN_SLL, "sll", "sll", 32,
  2435. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2436. },
  2437. /* srl$pack $GRi,$GRj,$GRk */
  2438. {
  2439. FRV_INSN_SRL, "srl", "srl", 32,
  2440. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2441. },
  2442. /* sra$pack $GRi,$GRj,$GRk */
  2443. {
  2444. FRV_INSN_SRA, "sra", "sra", 32,
  2445. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2446. },
  2447. /* slass$pack $GRi,$GRj,$GRk */
  2448. {
  2449. FRV_INSN_SLASS, "slass", "slass", 32,
  2450. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2451. },
  2452. /* scutss$pack $GRj,$GRk */
  2453. {
  2454. FRV_INSN_SCUTSS, "scutss", "scutss", 32,
  2455. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2456. },
  2457. /* scan$pack $GRi,$GRj,$GRk */
  2458. {
  2459. FRV_INSN_SCAN, "scan", "scan", 32,
  2460. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_SCAN, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2461. },
  2462. /* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2463. {
  2464. FRV_INSN_CADD, "cadd", "cadd", 32,
  2465. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2466. },
  2467. /* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2468. {
  2469. FRV_INSN_CSUB, "csub", "csub", 32,
  2470. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2471. },
  2472. /* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2473. {
  2474. FRV_INSN_CAND, "cand", "cand", 32,
  2475. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2476. },
  2477. /* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2478. {
  2479. FRV_INSN_COR, "cor", "cor", 32,
  2480. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2481. },
  2482. /* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2483. {
  2484. FRV_INSN_CXOR, "cxor", "cxor", 32,
  2485. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2486. },
  2487. /* cnot$pack $GRj,$GRk,$CCi,$cond */
  2488. {
  2489. FRV_INSN_CNOT, "cnot", "cnot", 32,
  2490. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2491. },
  2492. /* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
  2493. {
  2494. FRV_INSN_CSMUL, "csmul", "csmul", 32,
  2495. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2496. },
  2497. /* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2498. {
  2499. FRV_INSN_CSDIV, "csdiv", "csdiv", 32,
  2500. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2501. },
  2502. /* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2503. {
  2504. FRV_INSN_CUDIV, "cudiv", "cudiv", 32,
  2505. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2506. },
  2507. /* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2508. {
  2509. FRV_INSN_CSLL, "csll", "csll", 32,
  2510. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2511. },
  2512. /* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2513. {
  2514. FRV_INSN_CSRL, "csrl", "csrl", 32,
  2515. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2516. },
  2517. /* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2518. {
  2519. FRV_INSN_CSRA, "csra", "csra", 32,
  2520. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2521. },
  2522. /* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2523. {
  2524. FRV_INSN_CSCAN, "cscan", "cscan", 32,
  2525. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_SCAN, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2526. },
  2527. /* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2528. {
  2529. FRV_INSN_ADDCC, "addcc", "addcc", 32,
  2530. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2531. },
  2532. /* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2533. {
  2534. FRV_INSN_SUBCC, "subcc", "subcc", 32,
  2535. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2536. },
  2537. /* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2538. {
  2539. FRV_INSN_ANDCC, "andcc", "andcc", 32,
  2540. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2541. },
  2542. /* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2543. {
  2544. FRV_INSN_ORCC, "orcc", "orcc", 32,
  2545. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2546. },
  2547. /* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2548. {
  2549. FRV_INSN_XORCC, "xorcc", "xorcc", 32,
  2550. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2551. },
  2552. /* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2553. {
  2554. FRV_INSN_SLLCC, "sllcc", "sllcc", 32,
  2555. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2556. },
  2557. /* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2558. {
  2559. FRV_INSN_SRLCC, "srlcc", "srlcc", 32,
  2560. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2561. },
  2562. /* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2563. {
  2564. FRV_INSN_SRACC, "sracc", "sracc", 32,
  2565. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2566. },
  2567. /* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
  2568. {
  2569. FRV_INSN_SMULCC, "smulcc", "smulcc", 32,
  2570. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2571. },
  2572. /* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
  2573. {
  2574. FRV_INSN_UMULCC, "umulcc", "umulcc", 32,
  2575. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2576. },
  2577. /* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2578. {
  2579. FRV_INSN_CADDCC, "caddcc", "caddcc", 32,
  2580. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2581. },
  2582. /* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2583. {
  2584. FRV_INSN_CSUBCC, "csubcc", "csubcc", 32,
  2585. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2586. },
  2587. /* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
  2588. {
  2589. FRV_INSN_CSMULCC, "csmulcc", "csmulcc", 32,
  2590. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2591. },
  2592. /* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2593. {
  2594. FRV_INSN_CANDCC, "candcc", "candcc", 32,
  2595. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2596. },
  2597. /* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2598. {
  2599. FRV_INSN_CORCC, "corcc", "corcc", 32,
  2600. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2601. },
  2602. /* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2603. {
  2604. FRV_INSN_CXORCC, "cxorcc", "cxorcc", 32,
  2605. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2606. },
  2607. /* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2608. {
  2609. FRV_INSN_CSLLCC, "csllcc", "csllcc", 32,
  2610. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2611. },
  2612. /* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2613. {
  2614. FRV_INSN_CSRLCC, "csrlcc", "csrlcc", 32,
  2615. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2616. },
  2617. /* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
  2618. {
  2619. FRV_INSN_CSRACC, "csracc", "csracc", 32,
  2620. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2621. },
  2622. /* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2623. {
  2624. FRV_INSN_ADDX, "addx", "addx", 32,
  2625. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2626. },
  2627. /* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2628. {
  2629. FRV_INSN_SUBX, "subx", "subx", 32,
  2630. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2631. },
  2632. /* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2633. {
  2634. FRV_INSN_ADDXCC, "addxcc", "addxcc", 32,
  2635. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2636. },
  2637. /* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
  2638. {
  2639. FRV_INSN_SUBXCC, "subxcc", "subxcc", 32,
  2640. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2641. },
  2642. /* addss$pack $GRi,$GRj,$GRk */
  2643. {
  2644. FRV_INSN_ADDSS, "addss", "addss", 32,
  2645. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2646. },
  2647. /* subss$pack $GRi,$GRj,$GRk */
  2648. {
  2649. FRV_INSN_SUBSS, "subss", "subss", 32,
  2650. { 0|A(AUDIO), { { { (1<<MACH_FR400)|(1<<MACH_FR450), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2651. },
  2652. /* addi$pack $GRi,$s12,$GRk */
  2653. {
  2654. FRV_INSN_ADDI, "addi", "addi", 32,
  2655. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2656. },
  2657. /* subi$pack $GRi,$s12,$GRk */
  2658. {
  2659. FRV_INSN_SUBI, "subi", "subi", 32,
  2660. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2661. },
  2662. /* andi$pack $GRi,$s12,$GRk */
  2663. {
  2664. FRV_INSN_ANDI, "andi", "andi", 32,
  2665. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2666. },
  2667. /* ori$pack $GRi,$s12,$GRk */
  2668. {
  2669. FRV_INSN_ORI, "ori", "ori", 32,
  2670. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2671. },
  2672. /* xori$pack $GRi,$s12,$GRk */
  2673. {
  2674. FRV_INSN_XORI, "xori", "xori", 32,
  2675. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2676. },
  2677. /* sdivi$pack $GRi,$s12,$GRk */
  2678. {
  2679. FRV_INSN_SDIVI, "sdivi", "sdivi", 32,
  2680. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2681. },
  2682. /* nsdivi$pack $GRi,$s12,$GRk */
  2683. {
  2684. FRV_INSN_NSDIVI, "nsdivi", "nsdivi", 32,
  2685. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2686. },
  2687. /* udivi$pack $GRi,$s12,$GRk */
  2688. {
  2689. FRV_INSN_UDIVI, "udivi", "udivi", 32,
  2690. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2691. },
  2692. /* nudivi$pack $GRi,$s12,$GRk */
  2693. {
  2694. FRV_INSN_NUDIVI, "nudivi", "nudivi", 32,
  2695. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2696. },
  2697. /* smuli$pack $GRi,$s12,$GRdoublek */
  2698. {
  2699. FRV_INSN_SMULI, "smuli", "smuli", 32,
  2700. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2701. },
  2702. /* umuli$pack $GRi,$s12,$GRdoublek */
  2703. {
  2704. FRV_INSN_UMULI, "umuli", "umuli", 32,
  2705. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2706. },
  2707. /* slli$pack $GRi,$s12,$GRk */
  2708. {
  2709. FRV_INSN_SLLI, "slli", "slli", 32,
  2710. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2711. },
  2712. /* srli$pack $GRi,$s12,$GRk */
  2713. {
  2714. FRV_INSN_SRLI, "srli", "srli", 32,
  2715. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2716. },
  2717. /* srai$pack $GRi,$s12,$GRk */
  2718. {
  2719. FRV_INSN_SRAI, "srai", "srai", 32,
  2720. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2721. },
  2722. /* scani$pack $GRi,$s12,$GRk */
  2723. {
  2724. FRV_INSN_SCANI, "scani", "scani", 32,
  2725. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_SCAN, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2726. },
  2727. /* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2728. {
  2729. FRV_INSN_ADDICC, "addicc", "addicc", 32,
  2730. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2731. },
  2732. /* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2733. {
  2734. FRV_INSN_SUBICC, "subicc", "subicc", 32,
  2735. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2736. },
  2737. /* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2738. {
  2739. FRV_INSN_ANDICC, "andicc", "andicc", 32,
  2740. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2741. },
  2742. /* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2743. {
  2744. FRV_INSN_ORICC, "oricc", "oricc", 32,
  2745. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2746. },
  2747. /* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2748. {
  2749. FRV_INSN_XORICC, "xoricc", "xoricc", 32,
  2750. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2751. },
  2752. /* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
  2753. {
  2754. FRV_INSN_SMULICC, "smulicc", "smulicc", 32,
  2755. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2756. },
  2757. /* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
  2758. {
  2759. FRV_INSN_UMULICC, "umulicc", "umulicc", 32,
  2760. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MULT_DIV, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_2, 0 } } } }
  2761. },
  2762. /* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2763. {
  2764. FRV_INSN_SLLICC, "sllicc", "sllicc", 32,
  2765. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2766. },
  2767. /* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2768. {
  2769. FRV_INSN_SRLICC, "srlicc", "srlicc", 32,
  2770. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2771. },
  2772. /* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2773. {
  2774. FRV_INSN_SRAICC, "sraicc", "sraicc", 32,
  2775. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2776. },
  2777. /* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
  2778. {
  2779. FRV_INSN_ADDXI, "addxi", "addxi", 32,
  2780. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2781. },
  2782. /* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
  2783. {
  2784. FRV_INSN_SUBXI, "subxi", "subxi", 32,
  2785. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2786. },
  2787. /* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2788. {
  2789. FRV_INSN_ADDXICC, "addxicc", "addxicc", 32,
  2790. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2791. },
  2792. /* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
  2793. {
  2794. FRV_INSN_SUBXICC, "subxicc", "subxicc", 32,
  2795. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2796. },
  2797. /* cmpb$pack $GRi,$GRj,$ICCi_1 */
  2798. {
  2799. FRV_INSN_CMPB, "cmpb", "cmpb", 32,
  2800. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2801. },
  2802. /* cmpba$pack $GRi,$GRj,$ICCi_1 */
  2803. {
  2804. FRV_INSN_CMPBA, "cmpba", "cmpba", 32,
  2805. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2806. },
  2807. /* setlo$pack $ulo16,$GRklo */
  2808. {
  2809. FRV_INSN_SETLO, "setlo", "setlo", 32,
  2810. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2811. },
  2812. /* sethi$pack $uhi16,$GRkhi */
  2813. {
  2814. FRV_INSN_SETHI, "sethi", "sethi", 32,
  2815. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2816. },
  2817. /* setlos$pack $slo16,$GRk */
  2818. {
  2819. FRV_INSN_SETLOS, "setlos", "setlos", 32,
  2820. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_IALL, 0 } }, { { FR400_MAJOR_I_1, 0 } }, { { FR450_MAJOR_I_1, 0 } }, { { FR500_MAJOR_I_1, 0 } }, { { FR550_MAJOR_I_1, 0 } } } }
  2821. },
  2822. /* ldsb$pack @($GRi,$GRj),$GRk */
  2823. {
  2824. FRV_INSN_LDSB, "ldsb", "ldsb", 32,
  2825. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2826. },
  2827. /* ldub$pack @($GRi,$GRj),$GRk */
  2828. {
  2829. FRV_INSN_LDUB, "ldub", "ldub", 32,
  2830. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2831. },
  2832. /* ldsh$pack @($GRi,$GRj),$GRk */
  2833. {
  2834. FRV_INSN_LDSH, "ldsh", "ldsh", 32,
  2835. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2836. },
  2837. /* lduh$pack @($GRi,$GRj),$GRk */
  2838. {
  2839. FRV_INSN_LDUH, "lduh", "lduh", 32,
  2840. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2841. },
  2842. /* ld$pack $ldann($GRi,$GRj),$GRk */
  2843. {
  2844. FRV_INSN_LD, "ld", "ld", 32,
  2845. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2846. },
  2847. /* ldbf$pack @($GRi,$GRj),$FRintk */
  2848. {
  2849. FRV_INSN_LDBF, "ldbf", "ldbf", 32,
  2850. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2851. },
  2852. /* ldhf$pack @($GRi,$GRj),$FRintk */
  2853. {
  2854. FRV_INSN_LDHF, "ldhf", "ldhf", 32,
  2855. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2856. },
  2857. /* ldf$pack @($GRi,$GRj),$FRintk */
  2858. {
  2859. FRV_INSN_LDF, "ldf", "ldf", 32,
  2860. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2861. },
  2862. /* ldc$pack @($GRi,$GRj),$CPRk */
  2863. {
  2864. FRV_INSN_LDC, "ldc", "ldc", 32,
  2865. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2866. },
  2867. /* nldsb$pack @($GRi,$GRj),$GRk */
  2868. {
  2869. FRV_INSN_NLDSB, "nldsb", "nldsb", 32,
  2870. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2871. },
  2872. /* nldub$pack @($GRi,$GRj),$GRk */
  2873. {
  2874. FRV_INSN_NLDUB, "nldub", "nldub", 32,
  2875. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2876. },
  2877. /* nldsh$pack @($GRi,$GRj),$GRk */
  2878. {
  2879. FRV_INSN_NLDSH, "nldsh", "nldsh", 32,
  2880. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2881. },
  2882. /* nlduh$pack @($GRi,$GRj),$GRk */
  2883. {
  2884. FRV_INSN_NLDUH, "nlduh", "nlduh", 32,
  2885. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2886. },
  2887. /* nld$pack @($GRi,$GRj),$GRk */
  2888. {
  2889. FRV_INSN_NLD, "nld", "nld", 32,
  2890. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2891. },
  2892. /* nldbf$pack @($GRi,$GRj),$FRintk */
  2893. {
  2894. FRV_INSN_NLDBF, "nldbf", "nldbf", 32,
  2895. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2896. },
  2897. /* nldhf$pack @($GRi,$GRj),$FRintk */
  2898. {
  2899. FRV_INSN_NLDHF, "nldhf", "nldhf", 32,
  2900. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2901. },
  2902. /* nldf$pack @($GRi,$GRj),$FRintk */
  2903. {
  2904. FRV_INSN_NLDF, "nldf", "nldf", 32,
  2905. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2906. },
  2907. /* ldd$pack $lddann($GRi,$GRj),$GRdoublek */
  2908. {
  2909. FRV_INSN_LDD, "ldd", "ldd", 32,
  2910. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2911. },
  2912. /* lddf$pack @($GRi,$GRj),$FRdoublek */
  2913. {
  2914. FRV_INSN_LDDF, "lddf", "lddf", 32,
  2915. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2916. },
  2917. /* lddc$pack @($GRi,$GRj),$CPRdoublek */
  2918. {
  2919. FRV_INSN_LDDC, "lddc", "lddc", 32,
  2920. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2921. },
  2922. /* nldd$pack @($GRi,$GRj),$GRdoublek */
  2923. {
  2924. FRV_INSN_NLDD, "nldd", "nldd", 32,
  2925. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2926. },
  2927. /* nlddf$pack @($GRi,$GRj),$FRdoublek */
  2928. {
  2929. FRV_INSN_NLDDF, "nlddf", "nlddf", 32,
  2930. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2931. },
  2932. /* ldq$pack @($GRi,$GRj),$GRk */
  2933. {
  2934. FRV_INSN_LDQ, "ldq", "ldq", 32,
  2935. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2936. },
  2937. /* ldqf$pack @($GRi,$GRj),$FRintk */
  2938. {
  2939. FRV_INSN_LDQF, "ldqf", "ldqf", 32,
  2940. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2941. },
  2942. /* ldqc$pack @($GRi,$GRj),$CPRk */
  2943. {
  2944. FRV_INSN_LDQC, "ldqc", "ldqc", 32,
  2945. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2946. },
  2947. /* nldq$pack @($GRi,$GRj),$GRk */
  2948. {
  2949. FRV_INSN_NLDQ, "nldq", "nldq", 32,
  2950. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2951. },
  2952. /* nldqf$pack @($GRi,$GRj),$FRintk */
  2953. {
  2954. FRV_INSN_NLDQF, "nldqf", "nldqf", 32,
  2955. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  2956. },
  2957. /* ldsbu$pack @($GRi,$GRj),$GRk */
  2958. {
  2959. FRV_INSN_LDSBU, "ldsbu", "ldsbu", 32,
  2960. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2961. },
  2962. /* ldubu$pack @($GRi,$GRj),$GRk */
  2963. {
  2964. FRV_INSN_LDUBU, "ldubu", "ldubu", 32,
  2965. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2966. },
  2967. /* ldshu$pack @($GRi,$GRj),$GRk */
  2968. {
  2969. FRV_INSN_LDSHU, "ldshu", "ldshu", 32,
  2970. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2971. },
  2972. /* lduhu$pack @($GRi,$GRj),$GRk */
  2973. {
  2974. FRV_INSN_LDUHU, "lduhu", "lduhu", 32,
  2975. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2976. },
  2977. /* ldu$pack @($GRi,$GRj),$GRk */
  2978. {
  2979. FRV_INSN_LDU, "ldu", "ldu", 32,
  2980. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2981. },
  2982. /* nldsbu$pack @($GRi,$GRj),$GRk */
  2983. {
  2984. FRV_INSN_NLDSBU, "nldsbu", "nldsbu", 32,
  2985. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2986. },
  2987. /* nldubu$pack @($GRi,$GRj),$GRk */
  2988. {
  2989. FRV_INSN_NLDUBU, "nldubu", "nldubu", 32,
  2990. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2991. },
  2992. /* nldshu$pack @($GRi,$GRj),$GRk */
  2993. {
  2994. FRV_INSN_NLDSHU, "nldshu", "nldshu", 32,
  2995. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  2996. },
  2997. /* nlduhu$pack @($GRi,$GRj),$GRk */
  2998. {
  2999. FRV_INSN_NLDUHU, "nlduhu", "nlduhu", 32,
  3000. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3001. },
  3002. /* nldu$pack @($GRi,$GRj),$GRk */
  3003. {
  3004. FRV_INSN_NLDU, "nldu", "nldu", 32,
  3005. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3006. },
  3007. /* ldbfu$pack @($GRi,$GRj),$FRintk */
  3008. {
  3009. FRV_INSN_LDBFU, "ldbfu", "ldbfu", 32,
  3010. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3011. },
  3012. /* ldhfu$pack @($GRi,$GRj),$FRintk */
  3013. {
  3014. FRV_INSN_LDHFU, "ldhfu", "ldhfu", 32,
  3015. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3016. },
  3017. /* ldfu$pack @($GRi,$GRj),$FRintk */
  3018. {
  3019. FRV_INSN_LDFU, "ldfu", "ldfu", 32,
  3020. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3021. },
  3022. /* ldcu$pack @($GRi,$GRj),$CPRk */
  3023. {
  3024. FRV_INSN_LDCU, "ldcu", "ldcu", 32,
  3025. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3026. },
  3027. /* nldbfu$pack @($GRi,$GRj),$FRintk */
  3028. {
  3029. FRV_INSN_NLDBFU, "nldbfu", "nldbfu", 32,
  3030. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3031. },
  3032. /* nldhfu$pack @($GRi,$GRj),$FRintk */
  3033. {
  3034. FRV_INSN_NLDHFU, "nldhfu", "nldhfu", 32,
  3035. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3036. },
  3037. /* nldfu$pack @($GRi,$GRj),$FRintk */
  3038. {
  3039. FRV_INSN_NLDFU, "nldfu", "nldfu", 32,
  3040. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3041. },
  3042. /* lddu$pack @($GRi,$GRj),$GRdoublek */
  3043. {
  3044. FRV_INSN_LDDU, "lddu", "lddu", 32,
  3045. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3046. },
  3047. /* nlddu$pack @($GRi,$GRj),$GRdoublek */
  3048. {
  3049. FRV_INSN_NLDDU, "nlddu", "nlddu", 32,
  3050. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3051. },
  3052. /* lddfu$pack @($GRi,$GRj),$FRdoublek */
  3053. {
  3054. FRV_INSN_LDDFU, "lddfu", "lddfu", 32,
  3055. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3056. },
  3057. /* lddcu$pack @($GRi,$GRj),$CPRdoublek */
  3058. {
  3059. FRV_INSN_LDDCU, "lddcu", "lddcu", 32,
  3060. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3061. },
  3062. /* nlddfu$pack @($GRi,$GRj),$FRdoublek */
  3063. {
  3064. FRV_INSN_NLDDFU, "nlddfu", "nlddfu", 32,
  3065. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3066. },
  3067. /* ldqu$pack @($GRi,$GRj),$GRk */
  3068. {
  3069. FRV_INSN_LDQU, "ldqu", "ldqu", 32,
  3070. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3071. },
  3072. /* nldqu$pack @($GRi,$GRj),$GRk */
  3073. {
  3074. FRV_INSN_NLDQU, "nldqu", "nldqu", 32,
  3075. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3076. },
  3077. /* ldqfu$pack @($GRi,$GRj),$FRintk */
  3078. {
  3079. FRV_INSN_LDQFU, "ldqfu", "ldqfu", 32,
  3080. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3081. },
  3082. /* ldqcu$pack @($GRi,$GRj),$CPRk */
  3083. {
  3084. FRV_INSN_LDQCU, "ldqcu", "ldqcu", 32,
  3085. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3086. },
  3087. /* nldqfu$pack @($GRi,$GRj),$FRintk */
  3088. {
  3089. FRV_INSN_NLDQFU, "nldqfu", "nldqfu", 32,
  3090. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3091. },
  3092. /* ldsbi$pack @($GRi,$d12),$GRk */
  3093. {
  3094. FRV_INSN_LDSBI, "ldsbi", "ldsbi", 32,
  3095. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3096. },
  3097. /* ldshi$pack @($GRi,$d12),$GRk */
  3098. {
  3099. FRV_INSN_LDSHI, "ldshi", "ldshi", 32,
  3100. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3101. },
  3102. /* ldi$pack @($GRi,$d12),$GRk */
  3103. {
  3104. FRV_INSN_LDI, "ldi", "ldi", 32,
  3105. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3106. },
  3107. /* ldubi$pack @($GRi,$d12),$GRk */
  3108. {
  3109. FRV_INSN_LDUBI, "ldubi", "ldubi", 32,
  3110. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3111. },
  3112. /* lduhi$pack @($GRi,$d12),$GRk */
  3113. {
  3114. FRV_INSN_LDUHI, "lduhi", "lduhi", 32,
  3115. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3116. },
  3117. /* ldbfi$pack @($GRi,$d12),$FRintk */
  3118. {
  3119. FRV_INSN_LDBFI, "ldbfi", "ldbfi", 32,
  3120. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3121. },
  3122. /* ldhfi$pack @($GRi,$d12),$FRintk */
  3123. {
  3124. FRV_INSN_LDHFI, "ldhfi", "ldhfi", 32,
  3125. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3126. },
  3127. /* ldfi$pack @($GRi,$d12),$FRintk */
  3128. {
  3129. FRV_INSN_LDFI, "ldfi", "ldfi", 32,
  3130. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3131. },
  3132. /* nldsbi$pack @($GRi,$d12),$GRk */
  3133. {
  3134. FRV_INSN_NLDSBI, "nldsbi", "nldsbi", 32,
  3135. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3136. },
  3137. /* nldubi$pack @($GRi,$d12),$GRk */
  3138. {
  3139. FRV_INSN_NLDUBI, "nldubi", "nldubi", 32,
  3140. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3141. },
  3142. /* nldshi$pack @($GRi,$d12),$GRk */
  3143. {
  3144. FRV_INSN_NLDSHI, "nldshi", "nldshi", 32,
  3145. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3146. },
  3147. /* nlduhi$pack @($GRi,$d12),$GRk */
  3148. {
  3149. FRV_INSN_NLDUHI, "nlduhi", "nlduhi", 32,
  3150. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3151. },
  3152. /* nldi$pack @($GRi,$d12),$GRk */
  3153. {
  3154. FRV_INSN_NLDI, "nldi", "nldi", 32,
  3155. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3156. },
  3157. /* nldbfi$pack @($GRi,$d12),$FRintk */
  3158. {
  3159. FRV_INSN_NLDBFI, "nldbfi", "nldbfi", 32,
  3160. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3161. },
  3162. /* nldhfi$pack @($GRi,$d12),$FRintk */
  3163. {
  3164. FRV_INSN_NLDHFI, "nldhfi", "nldhfi", 32,
  3165. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3166. },
  3167. /* nldfi$pack @($GRi,$d12),$FRintk */
  3168. {
  3169. FRV_INSN_NLDFI, "nldfi", "nldfi", 32,
  3170. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3171. },
  3172. /* lddi$pack @($GRi,$d12),$GRdoublek */
  3173. {
  3174. FRV_INSN_LDDI, "lddi", "lddi", 32,
  3175. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3176. },
  3177. /* lddfi$pack @($GRi,$d12),$FRdoublek */
  3178. {
  3179. FRV_INSN_LDDFI, "lddfi", "lddfi", 32,
  3180. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3181. },
  3182. /* nlddi$pack @($GRi,$d12),$GRdoublek */
  3183. {
  3184. FRV_INSN_NLDDI, "nlddi", "nlddi", 32,
  3185. { 0|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3186. },
  3187. /* nlddfi$pack @($GRi,$d12),$FRdoublek */
  3188. {
  3189. FRV_INSN_NLDDFI, "nlddfi", "nlddfi", 32,
  3190. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3191. },
  3192. /* ldqi$pack @($GRi,$d12),$GRk */
  3193. {
  3194. FRV_INSN_LDQI, "ldqi", "ldqi", 32,
  3195. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3196. },
  3197. /* ldqfi$pack @($GRi,$d12),$FRintk */
  3198. {
  3199. FRV_INSN_LDQFI, "ldqfi", "ldqfi", 32,
  3200. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3201. },
  3202. /* nldqfi$pack @($GRi,$d12),$FRintk */
  3203. {
  3204. FRV_INSN_NLDQFI, "nldqfi", "nldqfi", 32,
  3205. { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3206. },
  3207. /* stb$pack $GRk,@($GRi,$GRj) */
  3208. {
  3209. FRV_INSN_STB, "stb", "stb", 32,
  3210. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3211. },
  3212. /* sth$pack $GRk,@($GRi,$GRj) */
  3213. {
  3214. FRV_INSN_STH, "sth", "sth", 32,
  3215. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3216. },
  3217. /* st$pack $GRk,@($GRi,$GRj) */
  3218. {
  3219. FRV_INSN_ST, "st", "st", 32,
  3220. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3221. },
  3222. /* stbf$pack $FRintk,@($GRi,$GRj) */
  3223. {
  3224. FRV_INSN_STBF, "stbf", "stbf", 32,
  3225. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3226. },
  3227. /* sthf$pack $FRintk,@($GRi,$GRj) */
  3228. {
  3229. FRV_INSN_STHF, "sthf", "sthf", 32,
  3230. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3231. },
  3232. /* stf$pack $FRintk,@($GRi,$GRj) */
  3233. {
  3234. FRV_INSN_STF, "stf", "stf", 32,
  3235. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3236. },
  3237. /* stc$pack $CPRk,@($GRi,$GRj) */
  3238. {
  3239. FRV_INSN_STC, "stc", "stc", 32,
  3240. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3241. },
  3242. /* std$pack $GRdoublek,@($GRi,$GRj) */
  3243. {
  3244. FRV_INSN_STD, "std", "std", 32,
  3245. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3246. },
  3247. /* stdf$pack $FRdoublek,@($GRi,$GRj) */
  3248. {
  3249. FRV_INSN_STDF, "stdf", "stdf", 32,
  3250. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3251. },
  3252. /* stdc$pack $CPRdoublek,@($GRi,$GRj) */
  3253. {
  3254. FRV_INSN_STDC, "stdc", "stdc", 32,
  3255. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3256. },
  3257. /* stq$pack $GRk,@($GRi,$GRj) */
  3258. {
  3259. FRV_INSN_STQ, "stq", "stq", 32,
  3260. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3261. },
  3262. /* stqf$pack $FRintk,@($GRi,$GRj) */
  3263. {
  3264. FRV_INSN_STQF, "stqf", "stqf", 32,
  3265. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3266. },
  3267. /* stqc$pack $CPRk,@($GRi,$GRj) */
  3268. {
  3269. FRV_INSN_STQC, "stqc", "stqc", 32,
  3270. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3271. },
  3272. /* stbu$pack $GRk,@($GRi,$GRj) */
  3273. {
  3274. FRV_INSN_STBU, "stbu", "stbu", 32,
  3275. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3276. },
  3277. /* sthu$pack $GRk,@($GRi,$GRj) */
  3278. {
  3279. FRV_INSN_STHU, "sthu", "sthu", 32,
  3280. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3281. },
  3282. /* stu$pack $GRk,@($GRi,$GRj) */
  3283. {
  3284. FRV_INSN_STU, "stu", "stu", 32,
  3285. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3286. },
  3287. /* stbfu$pack $FRintk,@($GRi,$GRj) */
  3288. {
  3289. FRV_INSN_STBFU, "stbfu", "stbfu", 32,
  3290. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3291. },
  3292. /* sthfu$pack $FRintk,@($GRi,$GRj) */
  3293. {
  3294. FRV_INSN_STHFU, "sthfu", "sthfu", 32,
  3295. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3296. },
  3297. /* stfu$pack $FRintk,@($GRi,$GRj) */
  3298. {
  3299. FRV_INSN_STFU, "stfu", "stfu", 32,
  3300. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3301. },
  3302. /* stcu$pack $CPRk,@($GRi,$GRj) */
  3303. {
  3304. FRV_INSN_STCU, "stcu", "stcu", 32,
  3305. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3306. },
  3307. /* stdu$pack $GRdoublek,@($GRi,$GRj) */
  3308. {
  3309. FRV_INSN_STDU, "stdu", "stdu", 32,
  3310. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3311. },
  3312. /* stdfu$pack $FRdoublek,@($GRi,$GRj) */
  3313. {
  3314. FRV_INSN_STDFU, "stdfu", "stdfu", 32,
  3315. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3316. },
  3317. /* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
  3318. {
  3319. FRV_INSN_STDCU, "stdcu", "stdcu", 32,
  3320. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3321. },
  3322. /* stqu$pack $GRk,@($GRi,$GRj) */
  3323. {
  3324. FRV_INSN_STQU, "stqu", "stqu", 32,
  3325. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3326. },
  3327. /* stqfu$pack $FRintk,@($GRi,$GRj) */
  3328. {
  3329. FRV_INSN_STQFU, "stqfu", "stqfu", 32,
  3330. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3331. },
  3332. /* stqcu$pack $CPRk,@($GRi,$GRj) */
  3333. {
  3334. FRV_INSN_STQCU, "stqcu", "stqcu", 32,
  3335. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3336. },
  3337. /* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3338. {
  3339. FRV_INSN_CLDSB, "cldsb", "cldsb", 32,
  3340. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3341. },
  3342. /* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3343. {
  3344. FRV_INSN_CLDUB, "cldub", "cldub", 32,
  3345. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3346. },
  3347. /* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3348. {
  3349. FRV_INSN_CLDSH, "cldsh", "cldsh", 32,
  3350. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3351. },
  3352. /* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3353. {
  3354. FRV_INSN_CLDUH, "clduh", "clduh", 32,
  3355. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3356. },
  3357. /* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3358. {
  3359. FRV_INSN_CLD, "cld", "cld", 32,
  3360. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3361. },
  3362. /* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
  3363. {
  3364. FRV_INSN_CLDBF, "cldbf", "cldbf", 32,
  3365. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3366. },
  3367. /* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
  3368. {
  3369. FRV_INSN_CLDHF, "cldhf", "cldhf", 32,
  3370. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3371. },
  3372. /* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
  3373. {
  3374. FRV_INSN_CLDF, "cldf", "cldf", 32,
  3375. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3376. },
  3377. /* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
  3378. {
  3379. FRV_INSN_CLDD, "cldd", "cldd", 32,
  3380. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3381. },
  3382. /* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
  3383. {
  3384. FRV_INSN_CLDDF, "clddf", "clddf", 32,
  3385. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3386. },
  3387. /* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3388. {
  3389. FRV_INSN_CLDQ, "cldq", "cldq", 32,
  3390. { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3391. },
  3392. /* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3393. {
  3394. FRV_INSN_CLDSBU, "cldsbu", "cldsbu", 32,
  3395. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3396. },
  3397. /* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3398. {
  3399. FRV_INSN_CLDUBU, "cldubu", "cldubu", 32,
  3400. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3401. },
  3402. /* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3403. {
  3404. FRV_INSN_CLDSHU, "cldshu", "cldshu", 32,
  3405. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3406. },
  3407. /* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3408. {
  3409. FRV_INSN_CLDUHU, "clduhu", "clduhu", 32,
  3410. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3411. },
  3412. /* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3413. {
  3414. FRV_INSN_CLDU, "cldu", "cldu", 32,
  3415. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3416. },
  3417. /* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
  3418. {
  3419. FRV_INSN_CLDBFU, "cldbfu", "cldbfu", 32,
  3420. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3421. },
  3422. /* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
  3423. {
  3424. FRV_INSN_CLDHFU, "cldhfu", "cldhfu", 32,
  3425. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3426. },
  3427. /* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
  3428. {
  3429. FRV_INSN_CLDFU, "cldfu", "cldfu", 32,
  3430. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3431. },
  3432. /* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
  3433. {
  3434. FRV_INSN_CLDDU, "clddu", "clddu", 32,
  3435. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3436. },
  3437. /* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
  3438. {
  3439. FRV_INSN_CLDDFU, "clddfu", "clddfu", 32,
  3440. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_I_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_I_3, 0 } } } }
  3441. },
  3442. /* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3443. {
  3444. FRV_INSN_CLDQU, "cldqu", "cldqu", 32,
  3445. { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_LOAD, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3446. },
  3447. /* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3448. {
  3449. FRV_INSN_CSTB, "cstb", "cstb", 32,
  3450. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3451. },
  3452. /* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3453. {
  3454. FRV_INSN_CSTH, "csth", "csth", 32,
  3455. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3456. },
  3457. /* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3458. {
  3459. FRV_INSN_CST, "cst", "cst", 32,
  3460. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3461. },
  3462. /* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
  3463. {
  3464. FRV_INSN_CSTBF, "cstbf", "cstbf", 32,
  3465. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3466. },
  3467. /* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
  3468. {
  3469. FRV_INSN_CSTHF, "csthf", "csthf", 32,
  3470. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3471. },
  3472. /* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
  3473. {
  3474. FRV_INSN_CSTF, "cstf", "cstf", 32,
  3475. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3476. },
  3477. /* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
  3478. {
  3479. FRV_INSN_CSTD, "cstd", "cstd", 32,
  3480. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3481. },
  3482. /* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
  3483. {
  3484. FRV_INSN_CSTDF, "cstdf", "cstdf", 32,
  3485. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3486. },
  3487. /* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3488. {
  3489. FRV_INSN_CSTQ, "cstq", "cstq", 32,
  3490. { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3491. },
  3492. /* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3493. {
  3494. FRV_INSN_CSTBU, "cstbu", "cstbu", 32,
  3495. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3496. },
  3497. /* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3498. {
  3499. FRV_INSN_CSTHU, "csthu", "csthu", 32,
  3500. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3501. },
  3502. /* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
  3503. {
  3504. FRV_INSN_CSTU, "cstu", "cstu", 32,
  3505. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3506. },
  3507. /* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
  3508. {
  3509. FRV_INSN_CSTBFU, "cstbfu", "cstbfu", 32,
  3510. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3511. },
  3512. /* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
  3513. {
  3514. FRV_INSN_CSTHFU, "csthfu", "csthfu", 32,
  3515. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3516. },
  3517. /* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
  3518. {
  3519. FRV_INSN_CSTFU, "cstfu", "cstfu", 32,
  3520. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3521. },
  3522. /* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
  3523. {
  3524. FRV_INSN_CSTDU, "cstdu", "cstdu", 32,
  3525. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3526. },
  3527. /* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
  3528. {
  3529. FRV_INSN_CSTDFU, "cstdfu", "cstdfu", 32,
  3530. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3531. },
  3532. /* stbi$pack $GRk,@($GRi,$d12) */
  3533. {
  3534. FRV_INSN_STBI, "stbi", "stbi", 32,
  3535. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3536. },
  3537. /* sthi$pack $GRk,@($GRi,$d12) */
  3538. {
  3539. FRV_INSN_STHI, "sthi", "sthi", 32,
  3540. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3541. },
  3542. /* sti$pack $GRk,@($GRi,$d12) */
  3543. {
  3544. FRV_INSN_STI, "sti", "sti", 32,
  3545. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3546. },
  3547. /* stbfi$pack $FRintk,@($GRi,$d12) */
  3548. {
  3549. FRV_INSN_STBFI, "stbfi", "stbfi", 32,
  3550. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3551. },
  3552. /* sthfi$pack $FRintk,@($GRi,$d12) */
  3553. {
  3554. FRV_INSN_STHFI, "sthfi", "sthfi", 32,
  3555. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3556. },
  3557. /* stfi$pack $FRintk,@($GRi,$d12) */
  3558. {
  3559. FRV_INSN_STFI, "stfi", "stfi", 32,
  3560. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3561. },
  3562. /* stdi$pack $GRdoublek,@($GRi,$d12) */
  3563. {
  3564. FRV_INSN_STDI, "stdi", "stdi", 32,
  3565. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3566. },
  3567. /* stdfi$pack $FRdoublek,@($GRi,$d12) */
  3568. {
  3569. FRV_INSN_STDFI, "stdfi", "stdfi", 32,
  3570. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_I_3, 0 } }, { { FR450_MAJOR_I_3, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_I_4, 0 } } } }
  3571. },
  3572. /* stqi$pack $GRk,@($GRi,$d12) */
  3573. {
  3574. FRV_INSN_STQI, "stqi", "stqi", 32,
  3575. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3576. },
  3577. /* stqfi$pack $FRintk,@($GRi,$d12) */
  3578. {
  3579. FRV_INSN_STQFI, "stqfi", "stqfi", 32,
  3580. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_STORE, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3581. },
  3582. /* swap$pack @($GRi,$GRj),$GRk */
  3583. {
  3584. FRV_INSN_SWAP, "swap", "swap", 32,
  3585. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  3586. },
  3587. /* swapi$pack @($GRi,$d12),$GRk */
  3588. {
  3589. FRV_INSN_SWAPI, "swapi", "swapi", 32,
  3590. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  3591. },
  3592. /* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
  3593. {
  3594. FRV_INSN_CSWAP, "cswap", "cswap", 32,
  3595. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  3596. },
  3597. /* movgf$pack $GRj,$FRintk */
  3598. {
  3599. FRV_INSN_MOVGF, "movgf", "movgf", 32,
  3600. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3601. },
  3602. /* movfg$pack $FRintk,$GRj */
  3603. {
  3604. FRV_INSN_MOVFG, "movfg", "movfg", 32,
  3605. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3606. },
  3607. /* movgfd$pack $GRj,$FRintk */
  3608. {
  3609. FRV_INSN_MOVGFD, "movgfd", "movgfd", 32,
  3610. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3611. },
  3612. /* movfgd$pack $FRintk,$GRj */
  3613. {
  3614. FRV_INSN_MOVFGD, "movfgd", "movfgd", 32,
  3615. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3616. },
  3617. /* movgfq$pack $GRj,$FRintk */
  3618. {
  3619. FRV_INSN_MOVGFQ, "movgfq", "movgfq", 32,
  3620. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3621. },
  3622. /* movfgq$pack $FRintk,$GRj */
  3623. {
  3624. FRV_INSN_MOVFGQ, "movfgq", "movfgq", 32,
  3625. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  3626. },
  3627. /* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
  3628. {
  3629. FRV_INSN_CMOVGF, "cmovgf", "cmovgf", 32,
  3630. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3631. },
  3632. /* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
  3633. {
  3634. FRV_INSN_CMOVFG, "cmovfg", "cmovfg", 32,
  3635. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3636. },
  3637. /* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
  3638. {
  3639. FRV_INSN_CMOVGFD, "cmovgfd", "cmovgfd", 32,
  3640. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3641. },
  3642. /* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
  3643. {
  3644. FRV_INSN_CMOVFGD, "cmovfgd", "cmovfgd", 32,
  3645. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_4, 0 } }, { { FR450_MAJOR_I_4, 0 } }, { { FR500_MAJOR_I_4, 0 } }, { { FR550_MAJOR_I_5, 0 } } } }
  3646. },
  3647. /* movgs$pack $GRj,$spr */
  3648. {
  3649. FRV_INSN_MOVGS, "movgs", "movgs", 32,
  3650. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  3651. },
  3652. /* movsg$pack $spr,$GRj */
  3653. {
  3654. FRV_INSN_MOVSG, "movsg", "movsg", 32,
  3655. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  3656. },
  3657. /* bra$pack $hint_taken$label16 */
  3658. {
  3659. FRV_INSN_BRA, "bra", "bra", 32,
  3660. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3661. },
  3662. /* bno$pack$hint_not_taken */
  3663. {
  3664. FRV_INSN_BNO, "bno", "bno", 32,
  3665. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3666. },
  3667. /* beq$pack $ICCi_2,$hint,$label16 */
  3668. {
  3669. FRV_INSN_BEQ, "beq", "beq", 32,
  3670. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3671. },
  3672. /* bne$pack $ICCi_2,$hint,$label16 */
  3673. {
  3674. FRV_INSN_BNE, "bne", "bne", 32,
  3675. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3676. },
  3677. /* ble$pack $ICCi_2,$hint,$label16 */
  3678. {
  3679. FRV_INSN_BLE, "ble", "ble", 32,
  3680. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3681. },
  3682. /* bgt$pack $ICCi_2,$hint,$label16 */
  3683. {
  3684. FRV_INSN_BGT, "bgt", "bgt", 32,
  3685. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3686. },
  3687. /* blt$pack $ICCi_2,$hint,$label16 */
  3688. {
  3689. FRV_INSN_BLT, "blt", "blt", 32,
  3690. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3691. },
  3692. /* bge$pack $ICCi_2,$hint,$label16 */
  3693. {
  3694. FRV_INSN_BGE, "bge", "bge", 32,
  3695. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3696. },
  3697. /* bls$pack $ICCi_2,$hint,$label16 */
  3698. {
  3699. FRV_INSN_BLS, "bls", "bls", 32,
  3700. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3701. },
  3702. /* bhi$pack $ICCi_2,$hint,$label16 */
  3703. {
  3704. FRV_INSN_BHI, "bhi", "bhi", 32,
  3705. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3706. },
  3707. /* bc$pack $ICCi_2,$hint,$label16 */
  3708. {
  3709. FRV_INSN_BC, "bc", "bc", 32,
  3710. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3711. },
  3712. /* bnc$pack $ICCi_2,$hint,$label16 */
  3713. {
  3714. FRV_INSN_BNC, "bnc", "bnc", 32,
  3715. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3716. },
  3717. /* bn$pack $ICCi_2,$hint,$label16 */
  3718. {
  3719. FRV_INSN_BN, "bn", "bn", 32,
  3720. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3721. },
  3722. /* bp$pack $ICCi_2,$hint,$label16 */
  3723. {
  3724. FRV_INSN_BP, "bp", "bp", 32,
  3725. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3726. },
  3727. /* bv$pack $ICCi_2,$hint,$label16 */
  3728. {
  3729. FRV_INSN_BV, "bv", "bv", 32,
  3730. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3731. },
  3732. /* bnv$pack $ICCi_2,$hint,$label16 */
  3733. {
  3734. FRV_INSN_BNV, "bnv", "bnv", 32,
  3735. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3736. },
  3737. /* fbra$pack $hint_taken$label16 */
  3738. {
  3739. FRV_INSN_FBRA, "fbra", "fbra", 32,
  3740. { 0|A(FR_ACCESS)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3741. },
  3742. /* fbno$pack$hint_not_taken */
  3743. {
  3744. FRV_INSN_FBNO, "fbno", "fbno", 32,
  3745. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3746. },
  3747. /* fbne$pack $FCCi_2,$hint,$label16 */
  3748. {
  3749. FRV_INSN_FBNE, "fbne", "fbne", 32,
  3750. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3751. },
  3752. /* fbeq$pack $FCCi_2,$hint,$label16 */
  3753. {
  3754. FRV_INSN_FBEQ, "fbeq", "fbeq", 32,
  3755. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3756. },
  3757. /* fblg$pack $FCCi_2,$hint,$label16 */
  3758. {
  3759. FRV_INSN_FBLG, "fblg", "fblg", 32,
  3760. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3761. },
  3762. /* fbue$pack $FCCi_2,$hint,$label16 */
  3763. {
  3764. FRV_INSN_FBUE, "fbue", "fbue", 32,
  3765. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3766. },
  3767. /* fbul$pack $FCCi_2,$hint,$label16 */
  3768. {
  3769. FRV_INSN_FBUL, "fbul", "fbul", 32,
  3770. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3771. },
  3772. /* fbge$pack $FCCi_2,$hint,$label16 */
  3773. {
  3774. FRV_INSN_FBGE, "fbge", "fbge", 32,
  3775. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3776. },
  3777. /* fblt$pack $FCCi_2,$hint,$label16 */
  3778. {
  3779. FRV_INSN_FBLT, "fblt", "fblt", 32,
  3780. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3781. },
  3782. /* fbuge$pack $FCCi_2,$hint,$label16 */
  3783. {
  3784. FRV_INSN_FBUGE, "fbuge", "fbuge", 32,
  3785. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3786. },
  3787. /* fbug$pack $FCCi_2,$hint,$label16 */
  3788. {
  3789. FRV_INSN_FBUG, "fbug", "fbug", 32,
  3790. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3791. },
  3792. /* fble$pack $FCCi_2,$hint,$label16 */
  3793. {
  3794. FRV_INSN_FBLE, "fble", "fble", 32,
  3795. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3796. },
  3797. /* fbgt$pack $FCCi_2,$hint,$label16 */
  3798. {
  3799. FRV_INSN_FBGT, "fbgt", "fbgt", 32,
  3800. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3801. },
  3802. /* fbule$pack $FCCi_2,$hint,$label16 */
  3803. {
  3804. FRV_INSN_FBULE, "fbule", "fbule", 32,
  3805. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3806. },
  3807. /* fbu$pack $FCCi_2,$hint,$label16 */
  3808. {
  3809. FRV_INSN_FBU, "fbu", "fbu", 32,
  3810. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3811. },
  3812. /* fbo$pack $FCCi_2,$hint,$label16 */
  3813. {
  3814. FRV_INSN_FBO, "fbo", "fbo", 32,
  3815. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_1, 0 } }, { { FR450_MAJOR_B_1, 0 } }, { { FR500_MAJOR_B_1, 0 } }, { { FR550_MAJOR_B_1, 0 } } } }
  3816. },
  3817. /* bctrlr$pack $ccond,$hint */
  3818. {
  3819. FRV_INSN_BCTRLR, "bctrlr", "bctrlr", 32,
  3820. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  3821. },
  3822. /* bralr$pack$hint_taken */
  3823. {
  3824. FRV_INSN_BRALR, "bralr", "bralr", 32,
  3825. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3826. },
  3827. /* bnolr$pack$hint_not_taken */
  3828. {
  3829. FRV_INSN_BNOLR, "bnolr", "bnolr", 32,
  3830. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3831. },
  3832. /* beqlr$pack $ICCi_2,$hint */
  3833. {
  3834. FRV_INSN_BEQLR, "beqlr", "beqlr", 32,
  3835. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3836. },
  3837. /* bnelr$pack $ICCi_2,$hint */
  3838. {
  3839. FRV_INSN_BNELR, "bnelr", "bnelr", 32,
  3840. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3841. },
  3842. /* blelr$pack $ICCi_2,$hint */
  3843. {
  3844. FRV_INSN_BLELR, "blelr", "blelr", 32,
  3845. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3846. },
  3847. /* bgtlr$pack $ICCi_2,$hint */
  3848. {
  3849. FRV_INSN_BGTLR, "bgtlr", "bgtlr", 32,
  3850. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3851. },
  3852. /* bltlr$pack $ICCi_2,$hint */
  3853. {
  3854. FRV_INSN_BLTLR, "bltlr", "bltlr", 32,
  3855. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3856. },
  3857. /* bgelr$pack $ICCi_2,$hint */
  3858. {
  3859. FRV_INSN_BGELR, "bgelr", "bgelr", 32,
  3860. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3861. },
  3862. /* blslr$pack $ICCi_2,$hint */
  3863. {
  3864. FRV_INSN_BLSLR, "blslr", "blslr", 32,
  3865. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3866. },
  3867. /* bhilr$pack $ICCi_2,$hint */
  3868. {
  3869. FRV_INSN_BHILR, "bhilr", "bhilr", 32,
  3870. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3871. },
  3872. /* bclr$pack $ICCi_2,$hint */
  3873. {
  3874. FRV_INSN_BCLR, "bclr", "bclr", 32,
  3875. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3876. },
  3877. /* bnclr$pack $ICCi_2,$hint */
  3878. {
  3879. FRV_INSN_BNCLR, "bnclr", "bnclr", 32,
  3880. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3881. },
  3882. /* bnlr$pack $ICCi_2,$hint */
  3883. {
  3884. FRV_INSN_BNLR, "bnlr", "bnlr", 32,
  3885. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3886. },
  3887. /* bplr$pack $ICCi_2,$hint */
  3888. {
  3889. FRV_INSN_BPLR, "bplr", "bplr", 32,
  3890. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3891. },
  3892. /* bvlr$pack $ICCi_2,$hint */
  3893. {
  3894. FRV_INSN_BVLR, "bvlr", "bvlr", 32,
  3895. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3896. },
  3897. /* bnvlr$pack $ICCi_2,$hint */
  3898. {
  3899. FRV_INSN_BNVLR, "bnvlr", "bnvlr", 32,
  3900. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3901. },
  3902. /* fbralr$pack$hint_taken */
  3903. {
  3904. FRV_INSN_FBRALR, "fbralr", "fbralr", 32,
  3905. { 0|A(FR_ACCESS)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3906. },
  3907. /* fbnolr$pack$hint_not_taken */
  3908. {
  3909. FRV_INSN_FBNOLR, "fbnolr", "fbnolr", 32,
  3910. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3911. },
  3912. /* fbeqlr$pack $FCCi_2,$hint */
  3913. {
  3914. FRV_INSN_FBEQLR, "fbeqlr", "fbeqlr", 32,
  3915. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3916. },
  3917. /* fbnelr$pack $FCCi_2,$hint */
  3918. {
  3919. FRV_INSN_FBNELR, "fbnelr", "fbnelr", 32,
  3920. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3921. },
  3922. /* fblglr$pack $FCCi_2,$hint */
  3923. {
  3924. FRV_INSN_FBLGLR, "fblglr", "fblglr", 32,
  3925. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3926. },
  3927. /* fbuelr$pack $FCCi_2,$hint */
  3928. {
  3929. FRV_INSN_FBUELR, "fbuelr", "fbuelr", 32,
  3930. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3931. },
  3932. /* fbullr$pack $FCCi_2,$hint */
  3933. {
  3934. FRV_INSN_FBULLR, "fbullr", "fbullr", 32,
  3935. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3936. },
  3937. /* fbgelr$pack $FCCi_2,$hint */
  3938. {
  3939. FRV_INSN_FBGELR, "fbgelr", "fbgelr", 32,
  3940. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3941. },
  3942. /* fbltlr$pack $FCCi_2,$hint */
  3943. {
  3944. FRV_INSN_FBLTLR, "fbltlr", "fbltlr", 32,
  3945. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3946. },
  3947. /* fbugelr$pack $FCCi_2,$hint */
  3948. {
  3949. FRV_INSN_FBUGELR, "fbugelr", "fbugelr", 32,
  3950. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3951. },
  3952. /* fbuglr$pack $FCCi_2,$hint */
  3953. {
  3954. FRV_INSN_FBUGLR, "fbuglr", "fbuglr", 32,
  3955. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3956. },
  3957. /* fblelr$pack $FCCi_2,$hint */
  3958. {
  3959. FRV_INSN_FBLELR, "fblelr", "fblelr", 32,
  3960. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3961. },
  3962. /* fbgtlr$pack $FCCi_2,$hint */
  3963. {
  3964. FRV_INSN_FBGTLR, "fbgtlr", "fbgtlr", 32,
  3965. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3966. },
  3967. /* fbulelr$pack $FCCi_2,$hint */
  3968. {
  3969. FRV_INSN_FBULELR, "fbulelr", "fbulelr", 32,
  3970. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3971. },
  3972. /* fbulr$pack $FCCi_2,$hint */
  3973. {
  3974. FRV_INSN_FBULR, "fbulr", "fbulr", 32,
  3975. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3976. },
  3977. /* fbolr$pack $FCCi_2,$hint */
  3978. {
  3979. FRV_INSN_FBOLR, "fbolr", "fbolr", 32,
  3980. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_3, 0 } }, { { FR450_MAJOR_B_3, 0 } }, { { FR500_MAJOR_B_3, 0 } }, { { FR550_MAJOR_B_3, 0 } } } }
  3981. },
  3982. /* bcralr$pack $ccond$hint_taken */
  3983. {
  3984. FRV_INSN_BCRALR, "bcralr", "bcralr", 32,
  3985. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  3986. },
  3987. /* bcnolr$pack$hint_not_taken */
  3988. {
  3989. FRV_INSN_BCNOLR, "bcnolr", "bcnolr", 32,
  3990. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  3991. },
  3992. /* bceqlr$pack $ICCi_2,$ccond,$hint */
  3993. {
  3994. FRV_INSN_BCEQLR, "bceqlr", "bceqlr", 32,
  3995. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  3996. },
  3997. /* bcnelr$pack $ICCi_2,$ccond,$hint */
  3998. {
  3999. FRV_INSN_BCNELR, "bcnelr", "bcnelr", 32,
  4000. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4001. },
  4002. /* bclelr$pack $ICCi_2,$ccond,$hint */
  4003. {
  4004. FRV_INSN_BCLELR, "bclelr", "bclelr", 32,
  4005. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4006. },
  4007. /* bcgtlr$pack $ICCi_2,$ccond,$hint */
  4008. {
  4009. FRV_INSN_BCGTLR, "bcgtlr", "bcgtlr", 32,
  4010. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4011. },
  4012. /* bcltlr$pack $ICCi_2,$ccond,$hint */
  4013. {
  4014. FRV_INSN_BCLTLR, "bcltlr", "bcltlr", 32,
  4015. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4016. },
  4017. /* bcgelr$pack $ICCi_2,$ccond,$hint */
  4018. {
  4019. FRV_INSN_BCGELR, "bcgelr", "bcgelr", 32,
  4020. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4021. },
  4022. /* bclslr$pack $ICCi_2,$ccond,$hint */
  4023. {
  4024. FRV_INSN_BCLSLR, "bclslr", "bclslr", 32,
  4025. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4026. },
  4027. /* bchilr$pack $ICCi_2,$ccond,$hint */
  4028. {
  4029. FRV_INSN_BCHILR, "bchilr", "bchilr", 32,
  4030. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4031. },
  4032. /* bcclr$pack $ICCi_2,$ccond,$hint */
  4033. {
  4034. FRV_INSN_BCCLR, "bcclr", "bcclr", 32,
  4035. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4036. },
  4037. /* bcnclr$pack $ICCi_2,$ccond,$hint */
  4038. {
  4039. FRV_INSN_BCNCLR, "bcnclr", "bcnclr", 32,
  4040. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4041. },
  4042. /* bcnlr$pack $ICCi_2,$ccond,$hint */
  4043. {
  4044. FRV_INSN_BCNLR, "bcnlr", "bcnlr", 32,
  4045. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4046. },
  4047. /* bcplr$pack $ICCi_2,$ccond,$hint */
  4048. {
  4049. FRV_INSN_BCPLR, "bcplr", "bcplr", 32,
  4050. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4051. },
  4052. /* bcvlr$pack $ICCi_2,$ccond,$hint */
  4053. {
  4054. FRV_INSN_BCVLR, "bcvlr", "bcvlr", 32,
  4055. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4056. },
  4057. /* bcnvlr$pack $ICCi_2,$ccond,$hint */
  4058. {
  4059. FRV_INSN_BCNVLR, "bcnvlr", "bcnvlr", 32,
  4060. { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4061. },
  4062. /* fcbralr$pack $ccond$hint_taken */
  4063. {
  4064. FRV_INSN_FCBRALR, "fcbralr", "fcbralr", 32,
  4065. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4066. },
  4067. /* fcbnolr$pack$hint_not_taken */
  4068. {
  4069. FRV_INSN_FCBNOLR, "fcbnolr", "fcbnolr", 32,
  4070. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4071. },
  4072. /* fcbeqlr$pack $FCCi_2,$ccond,$hint */
  4073. {
  4074. FRV_INSN_FCBEQLR, "fcbeqlr", "fcbeqlr", 32,
  4075. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4076. },
  4077. /* fcbnelr$pack $FCCi_2,$ccond,$hint */
  4078. {
  4079. FRV_INSN_FCBNELR, "fcbnelr", "fcbnelr", 32,
  4080. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4081. },
  4082. /* fcblglr$pack $FCCi_2,$ccond,$hint */
  4083. {
  4084. FRV_INSN_FCBLGLR, "fcblglr", "fcblglr", 32,
  4085. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4086. },
  4087. /* fcbuelr$pack $FCCi_2,$ccond,$hint */
  4088. {
  4089. FRV_INSN_FCBUELR, "fcbuelr", "fcbuelr", 32,
  4090. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4091. },
  4092. /* fcbullr$pack $FCCi_2,$ccond,$hint */
  4093. {
  4094. FRV_INSN_FCBULLR, "fcbullr", "fcbullr", 32,
  4095. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4096. },
  4097. /* fcbgelr$pack $FCCi_2,$ccond,$hint */
  4098. {
  4099. FRV_INSN_FCBGELR, "fcbgelr", "fcbgelr", 32,
  4100. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4101. },
  4102. /* fcbltlr$pack $FCCi_2,$ccond,$hint */
  4103. {
  4104. FRV_INSN_FCBLTLR, "fcbltlr", "fcbltlr", 32,
  4105. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4106. },
  4107. /* fcbugelr$pack $FCCi_2,$ccond,$hint */
  4108. {
  4109. FRV_INSN_FCBUGELR, "fcbugelr", "fcbugelr", 32,
  4110. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4111. },
  4112. /* fcbuglr$pack $FCCi_2,$ccond,$hint */
  4113. {
  4114. FRV_INSN_FCBUGLR, "fcbuglr", "fcbuglr", 32,
  4115. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4116. },
  4117. /* fcblelr$pack $FCCi_2,$ccond,$hint */
  4118. {
  4119. FRV_INSN_FCBLELR, "fcblelr", "fcblelr", 32,
  4120. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4121. },
  4122. /* fcbgtlr$pack $FCCi_2,$ccond,$hint */
  4123. {
  4124. FRV_INSN_FCBGTLR, "fcbgtlr", "fcbgtlr", 32,
  4125. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4126. },
  4127. /* fcbulelr$pack $FCCi_2,$ccond,$hint */
  4128. {
  4129. FRV_INSN_FCBULELR, "fcbulelr", "fcbulelr", 32,
  4130. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4131. },
  4132. /* fcbulr$pack $FCCi_2,$ccond,$hint */
  4133. {
  4134. FRV_INSN_FCBULR, "fcbulr", "fcbulr", 32,
  4135. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4136. },
  4137. /* fcbolr$pack $FCCi_2,$ccond,$hint */
  4138. {
  4139. FRV_INSN_FCBOLR, "fcbolr", "fcbolr", 32,
  4140. { 0|A(FR_ACCESS)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_2, 0 } }, { { FR450_MAJOR_B_2, 0 } }, { { FR500_MAJOR_B_2, 0 } }, { { FR550_MAJOR_B_2, 0 } } } }
  4141. },
  4142. /* jmpl$pack @($GRi,$GRj) */
  4143. {
  4144. FRV_INSN_JMPL, "jmpl", "jmpl", 32,
  4145. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
  4146. },
  4147. /* calll$pack $callann($GRi,$GRj) */
  4148. {
  4149. FRV_INSN_CALLL, "calll", "calll", 32,
  4150. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
  4151. },
  4152. /* jmpil$pack @($GRi,$s12) */
  4153. {
  4154. FRV_INSN_JMPIL, "jmpil", "jmpil", 32,
  4155. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
  4156. },
  4157. /* callil$pack @($GRi,$s12) */
  4158. {
  4159. FRV_INSN_CALLIL, "callil", "callil", 32,
  4160. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
  4161. },
  4162. /* call$pack $label24 */
  4163. {
  4164. FRV_INSN_CALL, "call", "call", 32,
  4165. { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B0, 0 } }, { { FR400_MAJOR_B_4, 0 } }, { { FR450_MAJOR_B_4, 0 } }, { { FR500_MAJOR_B_4, 0 } }, { { FR550_MAJOR_B_4, 0 } } } }
  4166. },
  4167. /* rett$pack $debug */
  4168. {
  4169. FRV_INSN_RETT, "rett", "rett", 32,
  4170. { 0|A(PRIVILEGED)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4171. },
  4172. /* rei$pack $eir */
  4173. {
  4174. FRV_INSN_REI, "rei", "rei", 32,
  4175. { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4176. },
  4177. /* tra$pack $GRi,$GRj */
  4178. {
  4179. FRV_INSN_TRA, "tra", "tra", 32,
  4180. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4181. },
  4182. /* tno$pack */
  4183. {
  4184. FRV_INSN_TNO, "tno", "tno", 32,
  4185. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4186. },
  4187. /* teq$pack $ICCi_2,$GRi,$GRj */
  4188. {
  4189. FRV_INSN_TEQ, "teq", "teq", 32,
  4190. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4191. },
  4192. /* tne$pack $ICCi_2,$GRi,$GRj */
  4193. {
  4194. FRV_INSN_TNE, "tne", "tne", 32,
  4195. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4196. },
  4197. /* tle$pack $ICCi_2,$GRi,$GRj */
  4198. {
  4199. FRV_INSN_TLE, "tle", "tle", 32,
  4200. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4201. },
  4202. /* tgt$pack $ICCi_2,$GRi,$GRj */
  4203. {
  4204. FRV_INSN_TGT, "tgt", "tgt", 32,
  4205. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4206. },
  4207. /* tlt$pack $ICCi_2,$GRi,$GRj */
  4208. {
  4209. FRV_INSN_TLT, "tlt", "tlt", 32,
  4210. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4211. },
  4212. /* tge$pack $ICCi_2,$GRi,$GRj */
  4213. {
  4214. FRV_INSN_TGE, "tge", "tge", 32,
  4215. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4216. },
  4217. /* tls$pack $ICCi_2,$GRi,$GRj */
  4218. {
  4219. FRV_INSN_TLS, "tls", "tls", 32,
  4220. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4221. },
  4222. /* thi$pack $ICCi_2,$GRi,$GRj */
  4223. {
  4224. FRV_INSN_THI, "thi", "thi", 32,
  4225. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4226. },
  4227. /* tc$pack $ICCi_2,$GRi,$GRj */
  4228. {
  4229. FRV_INSN_TC, "tc", "tc", 32,
  4230. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4231. },
  4232. /* tnc$pack $ICCi_2,$GRi,$GRj */
  4233. {
  4234. FRV_INSN_TNC, "tnc", "tnc", 32,
  4235. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4236. },
  4237. /* tn$pack $ICCi_2,$GRi,$GRj */
  4238. {
  4239. FRV_INSN_TN, "tn", "tn", 32,
  4240. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4241. },
  4242. /* tp$pack $ICCi_2,$GRi,$GRj */
  4243. {
  4244. FRV_INSN_TP, "tp", "tp", 32,
  4245. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4246. },
  4247. /* tv$pack $ICCi_2,$GRi,$GRj */
  4248. {
  4249. FRV_INSN_TV, "tv", "tv", 32,
  4250. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4251. },
  4252. /* tnv$pack $ICCi_2,$GRi,$GRj */
  4253. {
  4254. FRV_INSN_TNV, "tnv", "tnv", 32,
  4255. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4256. },
  4257. /* ftra$pack $GRi,$GRj */
  4258. {
  4259. FRV_INSN_FTRA, "ftra", "ftra", 32,
  4260. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4261. },
  4262. /* ftno$pack */
  4263. {
  4264. FRV_INSN_FTNO, "ftno", "ftno", 32,
  4265. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4266. },
  4267. /* ftne$pack $FCCi_2,$GRi,$GRj */
  4268. {
  4269. FRV_INSN_FTNE, "ftne", "ftne", 32,
  4270. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4271. },
  4272. /* fteq$pack $FCCi_2,$GRi,$GRj */
  4273. {
  4274. FRV_INSN_FTEQ, "fteq", "fteq", 32,
  4275. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4276. },
  4277. /* ftlg$pack $FCCi_2,$GRi,$GRj */
  4278. {
  4279. FRV_INSN_FTLG, "ftlg", "ftlg", 32,
  4280. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4281. },
  4282. /* ftue$pack $FCCi_2,$GRi,$GRj */
  4283. {
  4284. FRV_INSN_FTUE, "ftue", "ftue", 32,
  4285. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4286. },
  4287. /* ftul$pack $FCCi_2,$GRi,$GRj */
  4288. {
  4289. FRV_INSN_FTUL, "ftul", "ftul", 32,
  4290. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4291. },
  4292. /* ftge$pack $FCCi_2,$GRi,$GRj */
  4293. {
  4294. FRV_INSN_FTGE, "ftge", "ftge", 32,
  4295. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4296. },
  4297. /* ftlt$pack $FCCi_2,$GRi,$GRj */
  4298. {
  4299. FRV_INSN_FTLT, "ftlt", "ftlt", 32,
  4300. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4301. },
  4302. /* ftuge$pack $FCCi_2,$GRi,$GRj */
  4303. {
  4304. FRV_INSN_FTUGE, "ftuge", "ftuge", 32,
  4305. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4306. },
  4307. /* ftug$pack $FCCi_2,$GRi,$GRj */
  4308. {
  4309. FRV_INSN_FTUG, "ftug", "ftug", 32,
  4310. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4311. },
  4312. /* ftle$pack $FCCi_2,$GRi,$GRj */
  4313. {
  4314. FRV_INSN_FTLE, "ftle", "ftle", 32,
  4315. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4316. },
  4317. /* ftgt$pack $FCCi_2,$GRi,$GRj */
  4318. {
  4319. FRV_INSN_FTGT, "ftgt", "ftgt", 32,
  4320. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4321. },
  4322. /* ftule$pack $FCCi_2,$GRi,$GRj */
  4323. {
  4324. FRV_INSN_FTULE, "ftule", "ftule", 32,
  4325. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4326. },
  4327. /* ftu$pack $FCCi_2,$GRi,$GRj */
  4328. {
  4329. FRV_INSN_FTU, "ftu", "ftu", 32,
  4330. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4331. },
  4332. /* fto$pack $FCCi_2,$GRi,$GRj */
  4333. {
  4334. FRV_INSN_FTO, "fto", "fto", 32,
  4335. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4336. },
  4337. /* tira$pack $GRi,$s12 */
  4338. {
  4339. FRV_INSN_TIRA, "tira", "tira", 32,
  4340. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4341. },
  4342. /* tino$pack */
  4343. {
  4344. FRV_INSN_TINO, "tino", "tino", 32,
  4345. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4346. },
  4347. /* tieq$pack $ICCi_2,$GRi,$s12 */
  4348. {
  4349. FRV_INSN_TIEQ, "tieq", "tieq", 32,
  4350. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4351. },
  4352. /* tine$pack $ICCi_2,$GRi,$s12 */
  4353. {
  4354. FRV_INSN_TINE, "tine", "tine", 32,
  4355. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4356. },
  4357. /* tile$pack $ICCi_2,$GRi,$s12 */
  4358. {
  4359. FRV_INSN_TILE, "tile", "tile", 32,
  4360. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4361. },
  4362. /* tigt$pack $ICCi_2,$GRi,$s12 */
  4363. {
  4364. FRV_INSN_TIGT, "tigt", "tigt", 32,
  4365. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4366. },
  4367. /* tilt$pack $ICCi_2,$GRi,$s12 */
  4368. {
  4369. FRV_INSN_TILT, "tilt", "tilt", 32,
  4370. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4371. },
  4372. /* tige$pack $ICCi_2,$GRi,$s12 */
  4373. {
  4374. FRV_INSN_TIGE, "tige", "tige", 32,
  4375. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4376. },
  4377. /* tils$pack $ICCi_2,$GRi,$s12 */
  4378. {
  4379. FRV_INSN_TILS, "tils", "tils", 32,
  4380. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4381. },
  4382. /* tihi$pack $ICCi_2,$GRi,$s12 */
  4383. {
  4384. FRV_INSN_TIHI, "tihi", "tihi", 32,
  4385. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4386. },
  4387. /* tic$pack $ICCi_2,$GRi,$s12 */
  4388. {
  4389. FRV_INSN_TIC, "tic", "tic", 32,
  4390. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4391. },
  4392. /* tinc$pack $ICCi_2,$GRi,$s12 */
  4393. {
  4394. FRV_INSN_TINC, "tinc", "tinc", 32,
  4395. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4396. },
  4397. /* tin$pack $ICCi_2,$GRi,$s12 */
  4398. {
  4399. FRV_INSN_TIN, "tin", "tin", 32,
  4400. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4401. },
  4402. /* tip$pack $ICCi_2,$GRi,$s12 */
  4403. {
  4404. FRV_INSN_TIP, "tip", "tip", 32,
  4405. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4406. },
  4407. /* tiv$pack $ICCi_2,$GRi,$s12 */
  4408. {
  4409. FRV_INSN_TIV, "tiv", "tiv", 32,
  4410. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4411. },
  4412. /* tinv$pack $ICCi_2,$GRi,$s12 */
  4413. {
  4414. FRV_INSN_TINV, "tinv", "tinv", 32,
  4415. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4416. },
  4417. /* ftira$pack $GRi,$s12 */
  4418. {
  4419. FRV_INSN_FTIRA, "ftira", "ftira", 32,
  4420. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4421. },
  4422. /* ftino$pack */
  4423. {
  4424. FRV_INSN_FTINO, "ftino", "ftino", 32,
  4425. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4426. },
  4427. /* ftine$pack $FCCi_2,$GRi,$s12 */
  4428. {
  4429. FRV_INSN_FTINE, "ftine", "ftine", 32,
  4430. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4431. },
  4432. /* ftieq$pack $FCCi_2,$GRi,$s12 */
  4433. {
  4434. FRV_INSN_FTIEQ, "ftieq", "ftieq", 32,
  4435. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4436. },
  4437. /* ftilg$pack $FCCi_2,$GRi,$s12 */
  4438. {
  4439. FRV_INSN_FTILG, "ftilg", "ftilg", 32,
  4440. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4441. },
  4442. /* ftiue$pack $FCCi_2,$GRi,$s12 */
  4443. {
  4444. FRV_INSN_FTIUE, "ftiue", "ftiue", 32,
  4445. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4446. },
  4447. /* ftiul$pack $FCCi_2,$GRi,$s12 */
  4448. {
  4449. FRV_INSN_FTIUL, "ftiul", "ftiul", 32,
  4450. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4451. },
  4452. /* ftige$pack $FCCi_2,$GRi,$s12 */
  4453. {
  4454. FRV_INSN_FTIGE, "ftige", "ftige", 32,
  4455. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4456. },
  4457. /* ftilt$pack $FCCi_2,$GRi,$s12 */
  4458. {
  4459. FRV_INSN_FTILT, "ftilt", "ftilt", 32,
  4460. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4461. },
  4462. /* ftiuge$pack $FCCi_2,$GRi,$s12 */
  4463. {
  4464. FRV_INSN_FTIUGE, "ftiuge", "ftiuge", 32,
  4465. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4466. },
  4467. /* ftiug$pack $FCCi_2,$GRi,$s12 */
  4468. {
  4469. FRV_INSN_FTIUG, "ftiug", "ftiug", 32,
  4470. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4471. },
  4472. /* ftile$pack $FCCi_2,$GRi,$s12 */
  4473. {
  4474. FRV_INSN_FTILE, "ftile", "ftile", 32,
  4475. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4476. },
  4477. /* ftigt$pack $FCCi_2,$GRi,$s12 */
  4478. {
  4479. FRV_INSN_FTIGT, "ftigt", "ftigt", 32,
  4480. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4481. },
  4482. /* ftiule$pack $FCCi_2,$GRi,$s12 */
  4483. {
  4484. FRV_INSN_FTIULE, "ftiule", "ftiule", 32,
  4485. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4486. },
  4487. /* ftiu$pack $FCCi_2,$GRi,$s12 */
  4488. {
  4489. FRV_INSN_FTIU, "ftiu", "ftiu", 32,
  4490. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4491. },
  4492. /* ftio$pack $FCCi_2,$GRi,$s12 */
  4493. {
  4494. FRV_INSN_FTIO, "ftio", "ftio", 32,
  4495. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4496. },
  4497. /* break$pack */
  4498. {
  4499. FRV_INSN_BREAK, "break", "break", 32,
  4500. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4501. },
  4502. /* mtrap$pack */
  4503. {
  4504. FRV_INSN_MTRAP, "mtrap", "mtrap", 32,
  4505. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_1, 0 } }, { { FR450_MAJOR_C_1, 0 } }, { { FR500_MAJOR_C_1, 0 } }, { { FR550_MAJOR_C_1, 0 } } } }
  4506. },
  4507. /* andcr$pack $CRi,$CRj,$CRk */
  4508. {
  4509. FRV_INSN_ANDCR, "andcr", "andcr", 32,
  4510. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4511. },
  4512. /* orcr$pack $CRi,$CRj,$CRk */
  4513. {
  4514. FRV_INSN_ORCR, "orcr", "orcr", 32,
  4515. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4516. },
  4517. /* xorcr$pack $CRi,$CRj,$CRk */
  4518. {
  4519. FRV_INSN_XORCR, "xorcr", "xorcr", 32,
  4520. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4521. },
  4522. /* nandcr$pack $CRi,$CRj,$CRk */
  4523. {
  4524. FRV_INSN_NANDCR, "nandcr", "nandcr", 32,
  4525. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4526. },
  4527. /* norcr$pack $CRi,$CRj,$CRk */
  4528. {
  4529. FRV_INSN_NORCR, "norcr", "norcr", 32,
  4530. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4531. },
  4532. /* andncr$pack $CRi,$CRj,$CRk */
  4533. {
  4534. FRV_INSN_ANDNCR, "andncr", "andncr", 32,
  4535. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4536. },
  4537. /* orncr$pack $CRi,$CRj,$CRk */
  4538. {
  4539. FRV_INSN_ORNCR, "orncr", "orncr", 32,
  4540. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4541. },
  4542. /* nandncr$pack $CRi,$CRj,$CRk */
  4543. {
  4544. FRV_INSN_NANDNCR, "nandncr", "nandncr", 32,
  4545. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4546. },
  4547. /* norncr$pack $CRi,$CRj,$CRk */
  4548. {
  4549. FRV_INSN_NORNCR, "norncr", "norncr", 32,
  4550. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4551. },
  4552. /* notcr$pack $CRj,$CRk */
  4553. {
  4554. FRV_INSN_NOTCR, "notcr", "notcr", 32,
  4555. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_6, 0 } }, { { FR450_MAJOR_B_6, 0 } }, { { FR500_MAJOR_B_6, 0 } }, { { FR550_MAJOR_B_6, 0 } } } }
  4556. },
  4557. /* ckra$pack $CRj_int */
  4558. {
  4559. FRV_INSN_CKRA, "ckra", "ckra", 32,
  4560. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4561. },
  4562. /* ckno$pack $CRj_int */
  4563. {
  4564. FRV_INSN_CKNO, "ckno", "ckno", 32,
  4565. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4566. },
  4567. /* ckeq$pack $ICCi_3,$CRj_int */
  4568. {
  4569. FRV_INSN_CKEQ, "ckeq", "ckeq", 32,
  4570. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4571. },
  4572. /* ckne$pack $ICCi_3,$CRj_int */
  4573. {
  4574. FRV_INSN_CKNE, "ckne", "ckne", 32,
  4575. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4576. },
  4577. /* ckle$pack $ICCi_3,$CRj_int */
  4578. {
  4579. FRV_INSN_CKLE, "ckle", "ckle", 32,
  4580. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4581. },
  4582. /* ckgt$pack $ICCi_3,$CRj_int */
  4583. {
  4584. FRV_INSN_CKGT, "ckgt", "ckgt", 32,
  4585. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4586. },
  4587. /* cklt$pack $ICCi_3,$CRj_int */
  4588. {
  4589. FRV_INSN_CKLT, "cklt", "cklt", 32,
  4590. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4591. },
  4592. /* ckge$pack $ICCi_3,$CRj_int */
  4593. {
  4594. FRV_INSN_CKGE, "ckge", "ckge", 32,
  4595. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4596. },
  4597. /* ckls$pack $ICCi_3,$CRj_int */
  4598. {
  4599. FRV_INSN_CKLS, "ckls", "ckls", 32,
  4600. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4601. },
  4602. /* ckhi$pack $ICCi_3,$CRj_int */
  4603. {
  4604. FRV_INSN_CKHI, "ckhi", "ckhi", 32,
  4605. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4606. },
  4607. /* ckc$pack $ICCi_3,$CRj_int */
  4608. {
  4609. FRV_INSN_CKC, "ckc", "ckc", 32,
  4610. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4611. },
  4612. /* cknc$pack $ICCi_3,$CRj_int */
  4613. {
  4614. FRV_INSN_CKNC, "cknc", "cknc", 32,
  4615. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4616. },
  4617. /* ckn$pack $ICCi_3,$CRj_int */
  4618. {
  4619. FRV_INSN_CKN, "ckn", "ckn", 32,
  4620. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4621. },
  4622. /* ckp$pack $ICCi_3,$CRj_int */
  4623. {
  4624. FRV_INSN_CKP, "ckp", "ckp", 32,
  4625. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4626. },
  4627. /* ckv$pack $ICCi_3,$CRj_int */
  4628. {
  4629. FRV_INSN_CKV, "ckv", "ckv", 32,
  4630. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4631. },
  4632. /* cknv$pack $ICCi_3,$CRj_int */
  4633. {
  4634. FRV_INSN_CKNV, "cknv", "cknv", 32,
  4635. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4636. },
  4637. /* fckra$pack $CRj_float */
  4638. {
  4639. FRV_INSN_FCKRA, "fckra", "fckra", 32,
  4640. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4641. },
  4642. /* fckno$pack $CRj_float */
  4643. {
  4644. FRV_INSN_FCKNO, "fckno", "fckno", 32,
  4645. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4646. },
  4647. /* fckne$pack $FCCi_3,$CRj_float */
  4648. {
  4649. FRV_INSN_FCKNE, "fckne", "fckne", 32,
  4650. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4651. },
  4652. /* fckeq$pack $FCCi_3,$CRj_float */
  4653. {
  4654. FRV_INSN_FCKEQ, "fckeq", "fckeq", 32,
  4655. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4656. },
  4657. /* fcklg$pack $FCCi_3,$CRj_float */
  4658. {
  4659. FRV_INSN_FCKLG, "fcklg", "fcklg", 32,
  4660. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4661. },
  4662. /* fckue$pack $FCCi_3,$CRj_float */
  4663. {
  4664. FRV_INSN_FCKUE, "fckue", "fckue", 32,
  4665. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4666. },
  4667. /* fckul$pack $FCCi_3,$CRj_float */
  4668. {
  4669. FRV_INSN_FCKUL, "fckul", "fckul", 32,
  4670. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4671. },
  4672. /* fckge$pack $FCCi_3,$CRj_float */
  4673. {
  4674. FRV_INSN_FCKGE, "fckge", "fckge", 32,
  4675. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4676. },
  4677. /* fcklt$pack $FCCi_3,$CRj_float */
  4678. {
  4679. FRV_INSN_FCKLT, "fcklt", "fcklt", 32,
  4680. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4681. },
  4682. /* fckuge$pack $FCCi_3,$CRj_float */
  4683. {
  4684. FRV_INSN_FCKUGE, "fckuge", "fckuge", 32,
  4685. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4686. },
  4687. /* fckug$pack $FCCi_3,$CRj_float */
  4688. {
  4689. FRV_INSN_FCKUG, "fckug", "fckug", 32,
  4690. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4691. },
  4692. /* fckle$pack $FCCi_3,$CRj_float */
  4693. {
  4694. FRV_INSN_FCKLE, "fckle", "fckle", 32,
  4695. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4696. },
  4697. /* fckgt$pack $FCCi_3,$CRj_float */
  4698. {
  4699. FRV_INSN_FCKGT, "fckgt", "fckgt", 32,
  4700. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4701. },
  4702. /* fckule$pack $FCCi_3,$CRj_float */
  4703. {
  4704. FRV_INSN_FCKULE, "fckule", "fckule", 32,
  4705. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4706. },
  4707. /* fcku$pack $FCCi_3,$CRj_float */
  4708. {
  4709. FRV_INSN_FCKU, "fcku", "fcku", 32,
  4710. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4711. },
  4712. /* fcko$pack $FCCi_3,$CRj_float */
  4713. {
  4714. FRV_INSN_FCKO, "fcko", "fcko", 32,
  4715. { 0|A(FR_ACCESS), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4716. },
  4717. /* cckra$pack $CRj_int,$CCi,$cond */
  4718. {
  4719. FRV_INSN_CCKRA, "cckra", "cckra", 32,
  4720. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4721. },
  4722. /* cckno$pack $CRj_int,$CCi,$cond */
  4723. {
  4724. FRV_INSN_CCKNO, "cckno", "cckno", 32,
  4725. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4726. },
  4727. /* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4728. {
  4729. FRV_INSN_CCKEQ, "cckeq", "cckeq", 32,
  4730. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4731. },
  4732. /* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4733. {
  4734. FRV_INSN_CCKNE, "cckne", "cckne", 32,
  4735. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4736. },
  4737. /* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4738. {
  4739. FRV_INSN_CCKLE, "cckle", "cckle", 32,
  4740. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4741. },
  4742. /* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4743. {
  4744. FRV_INSN_CCKGT, "cckgt", "cckgt", 32,
  4745. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4746. },
  4747. /* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4748. {
  4749. FRV_INSN_CCKLT, "ccklt", "ccklt", 32,
  4750. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4751. },
  4752. /* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4753. {
  4754. FRV_INSN_CCKGE, "cckge", "cckge", 32,
  4755. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4756. },
  4757. /* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4758. {
  4759. FRV_INSN_CCKLS, "cckls", "cckls", 32,
  4760. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4761. },
  4762. /* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4763. {
  4764. FRV_INSN_CCKHI, "cckhi", "cckhi", 32,
  4765. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4766. },
  4767. /* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4768. {
  4769. FRV_INSN_CCKC, "cckc", "cckc", 32,
  4770. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4771. },
  4772. /* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4773. {
  4774. FRV_INSN_CCKNC, "ccknc", "ccknc", 32,
  4775. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4776. },
  4777. /* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4778. {
  4779. FRV_INSN_CCKN, "cckn", "cckn", 32,
  4780. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4781. },
  4782. /* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4783. {
  4784. FRV_INSN_CCKP, "cckp", "cckp", 32,
  4785. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4786. },
  4787. /* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4788. {
  4789. FRV_INSN_CCKV, "cckv", "cckv", 32,
  4790. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4791. },
  4792. /* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
  4793. {
  4794. FRV_INSN_CCKNV, "ccknv", "ccknv", 32,
  4795. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4796. },
  4797. /* cfckra$pack $CRj_float,$CCi,$cond */
  4798. {
  4799. FRV_INSN_CFCKRA, "cfckra", "cfckra", 32,
  4800. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4801. },
  4802. /* cfckno$pack $CRj_float,$CCi,$cond */
  4803. {
  4804. FRV_INSN_CFCKNO, "cfckno", "cfckno", 32,
  4805. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4806. },
  4807. /* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4808. {
  4809. FRV_INSN_CFCKNE, "cfckne", "cfckne", 32,
  4810. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4811. },
  4812. /* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4813. {
  4814. FRV_INSN_CFCKEQ, "cfckeq", "cfckeq", 32,
  4815. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4816. },
  4817. /* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4818. {
  4819. FRV_INSN_CFCKLG, "cfcklg", "cfcklg", 32,
  4820. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4821. },
  4822. /* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4823. {
  4824. FRV_INSN_CFCKUE, "cfckue", "cfckue", 32,
  4825. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4826. },
  4827. /* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4828. {
  4829. FRV_INSN_CFCKUL, "cfckul", "cfckul", 32,
  4830. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4831. },
  4832. /* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4833. {
  4834. FRV_INSN_CFCKGE, "cfckge", "cfckge", 32,
  4835. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4836. },
  4837. /* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4838. {
  4839. FRV_INSN_CFCKLT, "cfcklt", "cfcklt", 32,
  4840. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4841. },
  4842. /* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4843. {
  4844. FRV_INSN_CFCKUGE, "cfckuge", "cfckuge", 32,
  4845. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4846. },
  4847. /* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4848. {
  4849. FRV_INSN_CFCKUG, "cfckug", "cfckug", 32,
  4850. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4851. },
  4852. /* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4853. {
  4854. FRV_INSN_CFCKLE, "cfckle", "cfckle", 32,
  4855. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4856. },
  4857. /* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4858. {
  4859. FRV_INSN_CFCKGT, "cfckgt", "cfckgt", 32,
  4860. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4861. },
  4862. /* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4863. {
  4864. FRV_INSN_CFCKULE, "cfckule", "cfckule", 32,
  4865. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4866. },
  4867. /* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4868. {
  4869. FRV_INSN_CFCKU, "cfcku", "cfcku", 32,
  4870. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4871. },
  4872. /* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
  4873. {
  4874. FRV_INSN_CFCKO, "cfcko", "cfcko", 32,
  4875. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_B01, 0 } }, { { FR400_MAJOR_B_5, 0 } }, { { FR450_MAJOR_B_5, 0 } }, { { FR500_MAJOR_B_5, 0 } }, { { FR550_MAJOR_B_5, 0 } } } }
  4876. },
  4877. /* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
  4878. {
  4879. FRV_INSN_CJMPL, "cjmpl", "cjmpl", 32,
  4880. { 0|A(CONDITIONAL)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
  4881. },
  4882. /* ccalll$pack @($GRi,$GRj),$CCi,$cond */
  4883. {
  4884. FRV_INSN_CCALLL, "ccalll", "ccalll", 32,
  4885. { 0|A(CONDITIONAL)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { UNIT_I0, 0 } }, { { FR400_MAJOR_I_5, 0 } }, { { FR450_MAJOR_I_5, 0 } }, { { FR500_MAJOR_I_5, 0 } }, { { FR550_MAJOR_I_6, 0 } } } }
  4886. },
  4887. /* ici$pack @($GRi,$GRj) */
  4888. {
  4889. FRV_INSN_ICI, "ici", "ici", 32,
  4890. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4891. },
  4892. /* dci$pack @($GRi,$GRj) */
  4893. {
  4894. FRV_INSN_DCI, "dci", "dci", 32,
  4895. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4896. },
  4897. /* icei$pack @($GRi,$GRj),$ae */
  4898. {
  4899. FRV_INSN_ICEI, "icei", "icei", 32,
  4900. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4901. },
  4902. /* dcei$pack @($GRi,$GRj),$ae */
  4903. {
  4904. FRV_INSN_DCEI, "dcei", "dcei", 32,
  4905. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4906. },
  4907. /* dcf$pack @($GRi,$GRj) */
  4908. {
  4909. FRV_INSN_DCF, "dcf", "dcf", 32,
  4910. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4911. },
  4912. /* dcef$pack @($GRi,$GRj),$ae */
  4913. {
  4914. FRV_INSN_DCEF, "dcef", "dcef", 32,
  4915. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4916. },
  4917. /* witlb$pack $GRk,@($GRi,$GRj) */
  4918. {
  4919. FRV_INSN_WITLB, "witlb", "witlb", 32,
  4920. { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4921. },
  4922. /* wdtlb$pack $GRk,@($GRi,$GRj) */
  4923. {
  4924. FRV_INSN_WDTLB, "wdtlb", "wdtlb", 32,
  4925. { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4926. },
  4927. /* itlbi$pack @($GRi,$GRj) */
  4928. {
  4929. FRV_INSN_ITLBI, "itlbi", "itlbi", 32,
  4930. { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4931. },
  4932. /* dtlbi$pack @($GRi,$GRj) */
  4933. {
  4934. FRV_INSN_DTLBI, "dtlbi", "dtlbi", 32,
  4935. { 0|A(PRIVILEGED), { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4936. },
  4937. /* icpl$pack $GRi,$GRj,$lock */
  4938. {
  4939. FRV_INSN_ICPL, "icpl", "icpl", 32,
  4940. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4941. },
  4942. /* dcpl$pack $GRi,$GRj,$lock */
  4943. {
  4944. FRV_INSN_DCPL, "dcpl", "dcpl", 32,
  4945. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_DCPL, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_I_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_I_8, 0 } } } }
  4946. },
  4947. /* icul$pack $GRi */
  4948. {
  4949. FRV_INSN_ICUL, "icul", "icul", 32,
  4950. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4951. },
  4952. /* dcul$pack $GRi */
  4953. {
  4954. FRV_INSN_DCUL, "dcul", "dcul", 32,
  4955. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4956. },
  4957. /* bar$pack */
  4958. {
  4959. FRV_INSN_BAR, "bar", "bar", 32,
  4960. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4961. },
  4962. /* membar$pack */
  4963. {
  4964. FRV_INSN_MEMBAR, "membar", "membar", 32,
  4965. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_C_2, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_C_2, 0 } } } }
  4966. },
  4967. /* lrai$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
  4968. {
  4969. FRV_INSN_LRAI, "lrai", "lrai", 32,
  4970. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4971. },
  4972. /* lrad$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
  4973. {
  4974. FRV_INSN_LRAD, "lrad", "lrad", 32,
  4975. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4976. },
  4977. /* tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL */
  4978. {
  4979. FRV_INSN_TLBPR, "tlbpr", "tlbpr", 32,
  4980. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_C_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4981. },
  4982. /* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
  4983. {
  4984. FRV_INSN_COP1, "cop1", "cop1", 32,
  4985. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4986. },
  4987. /* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
  4988. {
  4989. FRV_INSN_COP2, "cop2", "cop2", 32,
  4990. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_C, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_C_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  4991. },
  4992. /* clrgr$pack $GRk */
  4993. {
  4994. FRV_INSN_CLRGR, "clrgr", "clrgr", 32,
  4995. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  4996. },
  4997. /* clrfr$pack $FRk */
  4998. {
  4999. FRV_INSN_CLRFR, "clrfr", "clrfr", 32,
  5000. { 0|A(FR_ACCESS), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5001. },
  5002. /* clrga$pack */
  5003. {
  5004. FRV_INSN_CLRGA, "clrga", "clrga", 32,
  5005. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5006. },
  5007. /* clrfa$pack */
  5008. {
  5009. FRV_INSN_CLRFA, "clrfa", "clrfa", 32,
  5010. { 0|A(FR_ACCESS), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5011. },
  5012. /* commitgr$pack $GRk */
  5013. {
  5014. FRV_INSN_COMMITGR, "commitgr", "commitgr", 32,
  5015. { 0, { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5016. },
  5017. /* commitfr$pack $FRk */
  5018. {
  5019. FRV_INSN_COMMITFR, "commitfr", "commitfr", 32,
  5020. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5021. },
  5022. /* commitga$pack */
  5023. {
  5024. FRV_INSN_COMMITGA, "commitga", "commitga", 32,
  5025. { 0, { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5026. },
  5027. /* commitfa$pack */
  5028. {
  5029. FRV_INSN_COMMITFA, "commitfa", "commitfa", 32,
  5030. { 0|A(FR_ACCESS), { { { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), 0 } }, { { UNIT_I01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_I_6, 0 } }, { { FR550_MAJOR_I_7, 0 } } } }
  5031. },
  5032. /* fitos$pack $FRintj,$FRk */
  5033. {
  5034. FRV_INSN_FITOS, "fitos", "fitos", 32,
  5035. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5036. },
  5037. /* fstoi$pack $FRj,$FRintk */
  5038. {
  5039. FRV_INSN_FSTOI, "fstoi", "fstoi", 32,
  5040. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5041. },
  5042. /* fitod$pack $FRintj,$FRdoublek */
  5043. {
  5044. FRV_INSN_FITOD, "fitod", "fitod", 32,
  5045. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5046. },
  5047. /* fdtoi$pack $FRdoublej,$FRintk */
  5048. {
  5049. FRV_INSN_FDTOI, "fdtoi", "fdtoi", 32,
  5050. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5051. },
  5052. /* fditos$pack $FRintj,$FRk */
  5053. {
  5054. FRV_INSN_FDITOS, "fditos", "fditos", 32,
  5055. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5056. },
  5057. /* fdstoi$pack $FRj,$FRintk */
  5058. {
  5059. FRV_INSN_FDSTOI, "fdstoi", "fdstoi", 32,
  5060. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5061. },
  5062. /* nfditos$pack $FRintj,$FRk */
  5063. {
  5064. FRV_INSN_NFDITOS, "nfditos", "nfditos", 32,
  5065. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5066. },
  5067. /* nfdstoi$pack $FRj,$FRintk */
  5068. {
  5069. FRV_INSN_NFDSTOI, "nfdstoi", "nfdstoi", 32,
  5070. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5071. },
  5072. /* cfitos$pack $FRintj,$FRk,$CCi,$cond */
  5073. {
  5074. FRV_INSN_CFITOS, "cfitos", "cfitos", 32,
  5075. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5076. },
  5077. /* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
  5078. {
  5079. FRV_INSN_CFSTOI, "cfstoi", "cfstoi", 32,
  5080. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5081. },
  5082. /* nfitos$pack $FRintj,$FRk */
  5083. {
  5084. FRV_INSN_NFITOS, "nfitos", "nfitos", 32,
  5085. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5086. },
  5087. /* nfstoi$pack $FRj,$FRintk */
  5088. {
  5089. FRV_INSN_NFSTOI, "nfstoi", "nfstoi", 32,
  5090. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5091. },
  5092. /* fmovs$pack $FRj,$FRk */
  5093. {
  5094. FRV_INSN_FMOVS, "fmovs", "fmovs", 32,
  5095. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5096. },
  5097. /* fmovd$pack $FRdoublej,$FRdoublek */
  5098. {
  5099. FRV_INSN_FMOVD, "fmovd", "fmovd", 32,
  5100. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5101. },
  5102. /* fdmovs$pack $FRj,$FRk */
  5103. {
  5104. FRV_INSN_FDMOVS, "fdmovs", "fdmovs", 32,
  5105. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5106. },
  5107. /* cfmovs$pack $FRj,$FRk,$CCi,$cond */
  5108. {
  5109. FRV_INSN_CFMOVS, "cfmovs", "cfmovs", 32,
  5110. { 0|A(FR_ACCESS)|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5111. },
  5112. /* fnegs$pack $FRj,$FRk */
  5113. {
  5114. FRV_INSN_FNEGS, "fnegs", "fnegs", 32,
  5115. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5116. },
  5117. /* fnegd$pack $FRdoublej,$FRdoublek */
  5118. {
  5119. FRV_INSN_FNEGD, "fnegd", "fnegd", 32,
  5120. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5121. },
  5122. /* fdnegs$pack $FRj,$FRk */
  5123. {
  5124. FRV_INSN_FDNEGS, "fdnegs", "fdnegs", 32,
  5125. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5126. },
  5127. /* cfnegs$pack $FRj,$FRk,$CCi,$cond */
  5128. {
  5129. FRV_INSN_CFNEGS, "cfnegs", "cfnegs", 32,
  5130. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5131. },
  5132. /* fabss$pack $FRj,$FRk */
  5133. {
  5134. FRV_INSN_FABSS, "fabss", "fabss", 32,
  5135. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5136. },
  5137. /* fabsd$pack $FRdoublej,$FRdoublek */
  5138. {
  5139. FRV_INSN_FABSD, "fabsd", "fabsd", 32,
  5140. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5141. },
  5142. /* fdabss$pack $FRj,$FRk */
  5143. {
  5144. FRV_INSN_FDABSS, "fdabss", "fdabss", 32,
  5145. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5146. },
  5147. /* cfabss$pack $FRj,$FRk,$CCi,$cond */
  5148. {
  5149. FRV_INSN_CFABSS, "cfabss", "cfabss", 32,
  5150. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_1, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5151. },
  5152. /* fsqrts$pack $FRj,$FRk */
  5153. {
  5154. FRV_INSN_FSQRTS, "fsqrts", "fsqrts", 32,
  5155. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5156. },
  5157. /* fdsqrts$pack $FRj,$FRk */
  5158. {
  5159. FRV_INSN_FDSQRTS, "fdsqrts", "fdsqrts", 32,
  5160. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5161. },
  5162. /* nfdsqrts$pack $FRj,$FRk */
  5163. {
  5164. FRV_INSN_NFDSQRTS, "nfdsqrts", "nfdsqrts", 32,
  5165. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5166. },
  5167. /* fsqrtd$pack $FRdoublej,$FRdoublek */
  5168. {
  5169. FRV_INSN_FSQRTD, "fsqrtd", "fsqrtd", 32,
  5170. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5171. },
  5172. /* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
  5173. {
  5174. FRV_INSN_CFSQRTS, "cfsqrts", "cfsqrts", 32,
  5175. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5176. },
  5177. /* nfsqrts$pack $FRj,$FRk */
  5178. {
  5179. FRV_INSN_NFSQRTS, "nfsqrts", "nfsqrts", 32,
  5180. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5181. },
  5182. /* fadds$pack $FRi,$FRj,$FRk */
  5183. {
  5184. FRV_INSN_FADDS, "fadds", "fadds", 32,
  5185. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5186. },
  5187. /* fsubs$pack $FRi,$FRj,$FRk */
  5188. {
  5189. FRV_INSN_FSUBS, "fsubs", "fsubs", 32,
  5190. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5191. },
  5192. /* fmuls$pack $FRi,$FRj,$FRk */
  5193. {
  5194. FRV_INSN_FMULS, "fmuls", "fmuls", 32,
  5195. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5196. },
  5197. /* fdivs$pack $FRi,$FRj,$FRk */
  5198. {
  5199. FRV_INSN_FDIVS, "fdivs", "fdivs", 32,
  5200. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5201. },
  5202. /* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
  5203. {
  5204. FRV_INSN_FADDD, "faddd", "faddd", 32,
  5205. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5206. },
  5207. /* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
  5208. {
  5209. FRV_INSN_FSUBD, "fsubd", "fsubd", 32,
  5210. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5211. },
  5212. /* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
  5213. {
  5214. FRV_INSN_FMULD, "fmuld", "fmuld", 32,
  5215. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5216. },
  5217. /* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
  5218. {
  5219. FRV_INSN_FDIVD, "fdivd", "fdivd", 32,
  5220. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5221. },
  5222. /* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5223. {
  5224. FRV_INSN_CFADDS, "cfadds", "cfadds", 32,
  5225. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5226. },
  5227. /* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5228. {
  5229. FRV_INSN_CFSUBS, "cfsubs", "cfsubs", 32,
  5230. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5231. },
  5232. /* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5233. {
  5234. FRV_INSN_CFMULS, "cfmuls", "cfmuls", 32,
  5235. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5236. },
  5237. /* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5238. {
  5239. FRV_INSN_CFDIVS, "cfdivs", "cfdivs", 32,
  5240. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5241. },
  5242. /* nfadds$pack $FRi,$FRj,$FRk */
  5243. {
  5244. FRV_INSN_NFADDS, "nfadds", "nfadds", 32,
  5245. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5246. },
  5247. /* nfsubs$pack $FRi,$FRj,$FRk */
  5248. {
  5249. FRV_INSN_NFSUBS, "nfsubs", "nfsubs", 32,
  5250. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5251. },
  5252. /* nfmuls$pack $FRi,$FRj,$FRk */
  5253. {
  5254. FRV_INSN_NFMULS, "nfmuls", "nfmuls", 32,
  5255. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_3, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5256. },
  5257. /* nfdivs$pack $FRi,$FRj,$FRk */
  5258. {
  5259. FRV_INSN_NFDIVS, "nfdivs", "nfdivs", 32,
  5260. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_4, 0 } }, { { FR550_MAJOR_F_3, 0 } } } }
  5261. },
  5262. /* fcmps$pack $FRi,$FRj,$FCCi_2 */
  5263. {
  5264. FRV_INSN_FCMPS, "fcmps", "fcmps", 32,
  5265. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5266. },
  5267. /* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
  5268. {
  5269. FRV_INSN_FCMPD, "fcmpd", "fcmpd", 32,
  5270. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5271. },
  5272. /* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
  5273. {
  5274. FRV_INSN_CFCMPS, "cfcmps", "cfcmps", 32,
  5275. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_2, 0 } }, { { FR550_MAJOR_F_2, 0 } } } }
  5276. },
  5277. /* fdcmps$pack $FRi,$FRj,$FCCi_2 */
  5278. {
  5279. FRV_INSN_FDCMPS, "fdcmps", "fdcmps", 32,
  5280. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5281. },
  5282. /* fmadds$pack $FRi,$FRj,$FRk */
  5283. {
  5284. FRV_INSN_FMADDS, "fmadds", "fmadds", 32,
  5285. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5286. },
  5287. /* fmsubs$pack $FRi,$FRj,$FRk */
  5288. {
  5289. FRV_INSN_FMSUBS, "fmsubs", "fmsubs", 32,
  5290. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5291. },
  5292. /* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
  5293. {
  5294. FRV_INSN_FMADDD, "fmaddd", "fmaddd", 32,
  5295. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5296. },
  5297. /* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
  5298. {
  5299. FRV_INSN_FMSUBD, "fmsubd", "fmsubd", 32,
  5300. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5301. },
  5302. /* fdmadds$pack $FRi,$FRj,$FRk */
  5303. {
  5304. FRV_INSN_FDMADDS, "fdmadds", "fdmadds", 32,
  5305. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5306. },
  5307. /* nfdmadds$pack $FRi,$FRj,$FRk */
  5308. {
  5309. FRV_INSN_NFDMADDS, "nfdmadds", "nfdmadds", 32,
  5310. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5311. },
  5312. /* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5313. {
  5314. FRV_INSN_CFMADDS, "cfmadds", "cfmadds", 32,
  5315. { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5316. },
  5317. /* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5318. {
  5319. FRV_INSN_CFMSUBS, "cfmsubs", "cfmsubs", 32,
  5320. { 0|A(CONDITIONAL), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5321. },
  5322. /* nfmadds$pack $FRi,$FRj,$FRk */
  5323. {
  5324. FRV_INSN_NFMADDS, "nfmadds", "nfmadds", 32,
  5325. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5326. },
  5327. /* nfmsubs$pack $FRi,$FRj,$FRk */
  5328. {
  5329. FRV_INSN_NFMSUBS, "nfmsubs", "nfmsubs", 32,
  5330. { 0|A(NON_EXCEPTING), { { { (1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5331. },
  5332. /* fmas$pack $FRi,$FRj,$FRk */
  5333. {
  5334. FRV_INSN_FMAS, "fmas", "fmas", 32,
  5335. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5336. },
  5337. /* fmss$pack $FRi,$FRj,$FRk */
  5338. {
  5339. FRV_INSN_FMSS, "fmss", "fmss", 32,
  5340. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5341. },
  5342. /* fdmas$pack $FRi,$FRj,$FRk */
  5343. {
  5344. FRV_INSN_FDMAS, "fdmas", "fdmas", 32,
  5345. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5346. },
  5347. /* fdmss$pack $FRi,$FRj,$FRk */
  5348. {
  5349. FRV_INSN_FDMSS, "fdmss", "fdmss", 32,
  5350. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5351. },
  5352. /* nfdmas$pack $FRi,$FRj,$FRk */
  5353. {
  5354. FRV_INSN_NFDMAS, "nfdmas", "nfdmas", 32,
  5355. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5356. },
  5357. /* nfdmss$pack $FRi,$FRj,$FRk */
  5358. {
  5359. FRV_INSN_NFDMSS, "nfdmss", "nfdmss", 32,
  5360. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5361. },
  5362. /* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5363. {
  5364. FRV_INSN_CFMAS, "cfmas", "cfmas", 32,
  5365. { 0|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5366. },
  5367. /* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
  5368. {
  5369. FRV_INSN_CFMSS, "cfmss", "cfmss", 32,
  5370. { 0|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5371. },
  5372. /* fmad$pack $FRi,$FRj,$FRk */
  5373. {
  5374. FRV_INSN_FMAD, "fmad", "fmad", 32,
  5375. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5376. },
  5377. /* fmsd$pack $FRi,$FRj,$FRk */
  5378. {
  5379. FRV_INSN_FMSD, "fmsd", "fmsd", 32,
  5380. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5381. },
  5382. /* nfmas$pack $FRi,$FRj,$FRk */
  5383. {
  5384. FRV_INSN_NFMAS, "nfmas", "nfmas", 32,
  5385. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5386. },
  5387. /* nfmss$pack $FRi,$FRj,$FRk */
  5388. {
  5389. FRV_INSN_NFMSS, "nfmss", "nfmss", 32,
  5390. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_5, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5391. },
  5392. /* fdadds$pack $FRi,$FRj,$FRk */
  5393. {
  5394. FRV_INSN_FDADDS, "fdadds", "fdadds", 32,
  5395. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5396. },
  5397. /* fdsubs$pack $FRi,$FRj,$FRk */
  5398. {
  5399. FRV_INSN_FDSUBS, "fdsubs", "fdsubs", 32,
  5400. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5401. },
  5402. /* fdmuls$pack $FRi,$FRj,$FRk */
  5403. {
  5404. FRV_INSN_FDMULS, "fdmuls", "fdmuls", 32,
  5405. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5406. },
  5407. /* fddivs$pack $FRi,$FRj,$FRk */
  5408. {
  5409. FRV_INSN_FDDIVS, "fddivs", "fddivs", 32,
  5410. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5411. },
  5412. /* fdsads$pack $FRi,$FRj,$FRk */
  5413. {
  5414. FRV_INSN_FDSADS, "fdsads", "fdsads", 32,
  5415. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5416. },
  5417. /* fdmulcs$pack $FRi,$FRj,$FRk */
  5418. {
  5419. FRV_INSN_FDMULCS, "fdmulcs", "fdmulcs", 32,
  5420. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5421. },
  5422. /* nfdmulcs$pack $FRi,$FRj,$FRk */
  5423. {
  5424. FRV_INSN_NFDMULCS, "nfdmulcs", "nfdmulcs", 32,
  5425. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5426. },
  5427. /* nfdadds$pack $FRi,$FRj,$FRk */
  5428. {
  5429. FRV_INSN_NFDADDS, "nfdadds", "nfdadds", 32,
  5430. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5431. },
  5432. /* nfdsubs$pack $FRi,$FRj,$FRk */
  5433. {
  5434. FRV_INSN_NFDSUBS, "nfdsubs", "nfdsubs", 32,
  5435. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5436. },
  5437. /* nfdmuls$pack $FRi,$FRj,$FRk */
  5438. {
  5439. FRV_INSN_NFDMULS, "nfdmuls", "nfdmuls", 32,
  5440. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5441. },
  5442. /* nfddivs$pack $FRi,$FRj,$FRk */
  5443. {
  5444. FRV_INSN_NFDDIVS, "nfddivs", "nfddivs", 32,
  5445. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5446. },
  5447. /* nfdsads$pack $FRi,$FRj,$FRk */
  5448. {
  5449. FRV_INSN_NFDSADS, "nfdsads", "nfdsads", 32,
  5450. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_F_4, 0 } } } }
  5451. },
  5452. /* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
  5453. {
  5454. FRV_INSN_NFDCMPS, "nfdcmps", "nfdcmps", 32,
  5455. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_6, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5456. },
  5457. /* mhsetlos$pack $u12,$FRklo */
  5458. {
  5459. FRV_INSN_MHSETLOS, "mhsetlos", "mhsetlos", 32,
  5460. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
  5461. },
  5462. /* mhsethis$pack $u12,$FRkhi */
  5463. {
  5464. FRV_INSN_MHSETHIS, "mhsethis", "mhsethis", 32,
  5465. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
  5466. },
  5467. /* mhdsets$pack $u12,$FRintk */
  5468. {
  5469. FRV_INSN_MHDSETS, "mhdsets", "mhdsets", 32,
  5470. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
  5471. },
  5472. /* mhsetloh$pack $s5,$FRklo */
  5473. {
  5474. FRV_INSN_MHSETLOH, "mhsetloh", "mhsetloh", 32,
  5475. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
  5476. },
  5477. /* mhsethih$pack $s5,$FRkhi */
  5478. {
  5479. FRV_INSN_MHSETHIH, "mhsethih", "mhsethih", 32,
  5480. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
  5481. },
  5482. /* mhdseth$pack $s5,$FRintk */
  5483. {
  5484. FRV_INSN_MHDSETH, "mhdseth", "mhdseth", 32,
  5485. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_5, 0 } } } }
  5486. },
  5487. /* mand$pack $FRinti,$FRintj,$FRintk */
  5488. {
  5489. FRV_INSN_MAND, "mand", "mand", 32,
  5490. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5491. },
  5492. /* mor$pack $FRinti,$FRintj,$FRintk */
  5493. {
  5494. FRV_INSN_MOR, "mor", "mor", 32,
  5495. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5496. },
  5497. /* mxor$pack $FRinti,$FRintj,$FRintk */
  5498. {
  5499. FRV_INSN_MXOR, "mxor", "mxor", 32,
  5500. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5501. },
  5502. /* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5503. {
  5504. FRV_INSN_CMAND, "cmand", "cmand", 32,
  5505. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5506. },
  5507. /* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5508. {
  5509. FRV_INSN_CMOR, "cmor", "cmor", 32,
  5510. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5511. },
  5512. /* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5513. {
  5514. FRV_INSN_CMXOR, "cmxor", "cmxor", 32,
  5515. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5516. },
  5517. /* mnot$pack $FRintj,$FRintk */
  5518. {
  5519. FRV_INSN_MNOT, "mnot", "mnot", 32,
  5520. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5521. },
  5522. /* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
  5523. {
  5524. FRV_INSN_CMNOT, "cmnot", "cmnot", 32,
  5525. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5526. },
  5527. /* mrotli$pack $FRinti,$u6,$FRintk */
  5528. {
  5529. FRV_INSN_MROTLI, "mrotli", "mrotli", 32,
  5530. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5531. },
  5532. /* mrotri$pack $FRinti,$u6,$FRintk */
  5533. {
  5534. FRV_INSN_MROTRI, "mrotri", "mrotri", 32,
  5535. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5536. },
  5537. /* mwcut$pack $FRinti,$FRintj,$FRintk */
  5538. {
  5539. FRV_INSN_MWCUT, "mwcut", "mwcut", 32,
  5540. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5541. },
  5542. /* mwcuti$pack $FRinti,$u6,$FRintk */
  5543. {
  5544. FRV_INSN_MWCUTI, "mwcuti", "mwcuti", 32,
  5545. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5546. },
  5547. /* mcut$pack $ACC40Si,$FRintj,$FRintk */
  5548. {
  5549. FRV_INSN_MCUT, "mcut", "mcut", 32,
  5550. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5551. },
  5552. /* mcuti$pack $ACC40Si,$s6,$FRintk */
  5553. {
  5554. FRV_INSN_MCUTI, "mcuti", "mcuti", 32,
  5555. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5556. },
  5557. /* mcutss$pack $ACC40Si,$FRintj,$FRintk */
  5558. {
  5559. FRV_INSN_MCUTSS, "mcutss", "mcutss", 32,
  5560. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5561. },
  5562. /* mcutssi$pack $ACC40Si,$s6,$FRintk */
  5563. {
  5564. FRV_INSN_MCUTSSI, "mcutssi", "mcutssi", 32,
  5565. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5566. },
  5567. /* mdcutssi$pack $ACC40Si,$s6,$FRintkeven */
  5568. {
  5569. FRV_INSN_MDCUTSSI, "mdcutssi", "mdcutssi", 32,
  5570. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDCUTSSI, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_6, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5571. },
  5572. /* maveh$pack $FRinti,$FRintj,$FRintk */
  5573. {
  5574. FRV_INSN_MAVEH, "maveh", "maveh", 32,
  5575. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5576. },
  5577. /* msllhi$pack $FRinti,$u6,$FRintk */
  5578. {
  5579. FRV_INSN_MSLLHI, "msllhi", "msllhi", 32,
  5580. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5581. },
  5582. /* msrlhi$pack $FRinti,$u6,$FRintk */
  5583. {
  5584. FRV_INSN_MSRLHI, "msrlhi", "msrlhi", 32,
  5585. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5586. },
  5587. /* msrahi$pack $FRinti,$u6,$FRintk */
  5588. {
  5589. FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
  5590. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5591. },
  5592. /* mdrotli$pack $FRintieven,$s6,$FRintkeven */
  5593. {
  5594. FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
  5595. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMLOW, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5596. },
  5597. /* mcplhi$pack $FRinti,$u6,$FRintk */
  5598. {
  5599. FRV_INSN_MCPLHI, "mcplhi", "mcplhi", 32,
  5600. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMLOW, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5601. },
  5602. /* mcpli$pack $FRinti,$u6,$FRintk */
  5603. {
  5604. FRV_INSN_MCPLI, "mcpli", "mcpli", 32,
  5605. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMLOW, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5606. },
  5607. /* msaths$pack $FRinti,$FRintj,$FRintk */
  5608. {
  5609. FRV_INSN_MSATHS, "msaths", "msaths", 32,
  5610. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5611. },
  5612. /* mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven */
  5613. {
  5614. FRV_INSN_MQSATHS, "mqsaths", "mqsaths", 32,
  5615. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5616. },
  5617. /* msathu$pack $FRinti,$FRintj,$FRintk */
  5618. {
  5619. FRV_INSN_MSATHU, "msathu", "msathu", 32,
  5620. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5621. },
  5622. /* mcmpsh$pack $FRinti,$FRintj,$FCCk */
  5623. {
  5624. FRV_INSN_MCMPSH, "mcmpsh", "mcmpsh", 32,
  5625. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5626. },
  5627. /* mcmpuh$pack $FRinti,$FRintj,$FCCk */
  5628. {
  5629. FRV_INSN_MCMPUH, "mcmpuh", "mcmpuh", 32,
  5630. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5631. },
  5632. /* mabshs$pack $FRintj,$FRintk */
  5633. {
  5634. FRV_INSN_MABSHS, "mabshs", "mabshs", 32,
  5635. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5636. },
  5637. /* maddhss$pack $FRinti,$FRintj,$FRintk */
  5638. {
  5639. FRV_INSN_MADDHSS, "maddhss", "maddhss", 32,
  5640. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5641. },
  5642. /* maddhus$pack $FRinti,$FRintj,$FRintk */
  5643. {
  5644. FRV_INSN_MADDHUS, "maddhus", "maddhus", 32,
  5645. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5646. },
  5647. /* msubhss$pack $FRinti,$FRintj,$FRintk */
  5648. {
  5649. FRV_INSN_MSUBHSS, "msubhss", "msubhss", 32,
  5650. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5651. },
  5652. /* msubhus$pack $FRinti,$FRintj,$FRintk */
  5653. {
  5654. FRV_INSN_MSUBHUS, "msubhus", "msubhus", 32,
  5655. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5656. },
  5657. /* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5658. {
  5659. FRV_INSN_CMADDHSS, "cmaddhss", "cmaddhss", 32,
  5660. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5661. },
  5662. /* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5663. {
  5664. FRV_INSN_CMADDHUS, "cmaddhus", "cmaddhus", 32,
  5665. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5666. },
  5667. /* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5668. {
  5669. FRV_INSN_CMSUBHSS, "cmsubhss", "cmsubhss", 32,
  5670. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5671. },
  5672. /* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
  5673. {
  5674. FRV_INSN_CMSUBHUS, "cmsubhus", "cmsubhus", 32,
  5675. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5676. },
  5677. /* mqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven */
  5678. {
  5679. FRV_INSN_MQADDHSS, "mqaddhss", "mqaddhss", 32,
  5680. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5681. },
  5682. /* mqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven */
  5683. {
  5684. FRV_INSN_MQADDHUS, "mqaddhus", "mqaddhus", 32,
  5685. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5686. },
  5687. /* mqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven */
  5688. {
  5689. FRV_INSN_MQSUBHSS, "mqsubhss", "mqsubhss", 32,
  5690. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5691. },
  5692. /* mqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven */
  5693. {
  5694. FRV_INSN_MQSUBHUS, "mqsubhus", "mqsubhus", 32,
  5695. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5696. },
  5697. /* cmqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
  5698. {
  5699. FRV_INSN_CMQADDHSS, "cmqaddhss", "cmqaddhss", 32,
  5700. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5701. },
  5702. /* cmqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
  5703. {
  5704. FRV_INSN_CMQADDHUS, "cmqaddhus", "cmqaddhus", 32,
  5705. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5706. },
  5707. /* cmqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
  5708. {
  5709. FRV_INSN_CMQSUBHSS, "cmqsubhss", "cmqsubhss", 32,
  5710. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5711. },
  5712. /* cmqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
  5713. {
  5714. FRV_INSN_CMQSUBHUS, "cmqsubhus", "cmqsubhus", 32,
  5715. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_2, 0 } } } }
  5716. },
  5717. /* mqlclrhs$pack $FRintieven,$FRintjeven,$FRintkeven */
  5718. {
  5719. FRV_INSN_MQLCLRHS, "mqlclrhs", "mqlclrhs", 32,
  5720. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5721. },
  5722. /* mqlmths$pack $FRintieven,$FRintjeven,$FRintkeven */
  5723. {
  5724. FRV_INSN_MQLMTHS, "mqlmths", "mqlmths", 32,
  5725. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5726. },
  5727. /* mqsllhi$pack $FRintieven,$u6,$FRintkeven */
  5728. {
  5729. FRV_INSN_MQSLLHI, "mqsllhi", "mqsllhi", 32,
  5730. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5731. },
  5732. /* mqsrahi$pack $FRintieven,$u6,$FRintkeven */
  5733. {
  5734. FRV_INSN_MQSRAHI, "mqsrahi", "mqsrahi", 32,
  5735. { 0, { { { (1<<MACH_FR450), 0 } }, { { UNIT_FM0, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5736. },
  5737. /* maddaccs$pack $ACC40Si,$ACC40Sk */
  5738. {
  5739. FRV_INSN_MADDACCS, "maddaccs", "maddaccs", 32,
  5740. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5741. },
  5742. /* msubaccs$pack $ACC40Si,$ACC40Sk */
  5743. {
  5744. FRV_INSN_MSUBACCS, "msubaccs", "msubaccs", 32,
  5745. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5746. },
  5747. /* mdaddaccs$pack $ACC40Si,$ACC40Sk */
  5748. {
  5749. FRV_INSN_MDADDACCS, "mdaddaccs", "mdaddaccs", 32,
  5750. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDUALACC, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5751. },
  5752. /* mdsubaccs$pack $ACC40Si,$ACC40Sk */
  5753. {
  5754. FRV_INSN_MDSUBACCS, "mdsubaccs", "mdsubaccs", 32,
  5755. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDUALACC, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5756. },
  5757. /* masaccs$pack $ACC40Si,$ACC40Sk */
  5758. {
  5759. FRV_INSN_MASACCS, "masaccs", "masaccs", 32,
  5760. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5761. },
  5762. /* mdasaccs$pack $ACC40Si,$ACC40Sk */
  5763. {
  5764. FRV_INSN_MDASACCS, "mdasaccs", "mdasaccs", 32,
  5765. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_MDUALACC, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5766. },
  5767. /* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
  5768. {
  5769. FRV_INSN_MMULHS, "mmulhs", "mmulhs", 32,
  5770. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5771. },
  5772. /* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
  5773. {
  5774. FRV_INSN_MMULHU, "mmulhu", "mmulhu", 32,
  5775. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5776. },
  5777. /* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
  5778. {
  5779. FRV_INSN_MMULXHS, "mmulxhs", "mmulxhs", 32,
  5780. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5781. },
  5782. /* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
  5783. {
  5784. FRV_INSN_MMULXHU, "mmulxhu", "mmulxhu", 32,
  5785. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5786. },
  5787. /* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5788. {
  5789. FRV_INSN_CMMULHS, "cmmulhs", "cmmulhs", 32,
  5790. { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5791. },
  5792. /* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5793. {
  5794. FRV_INSN_CMMULHU, "cmmulhu", "cmmulhu", 32,
  5795. { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5796. },
  5797. /* mqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5798. {
  5799. FRV_INSN_MQMULHS, "mqmulhs", "mqmulhs", 32,
  5800. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5801. },
  5802. /* mqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5803. {
  5804. FRV_INSN_MQMULHU, "mqmulhu", "mqmulhu", 32,
  5805. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5806. },
  5807. /* mqmulxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5808. {
  5809. FRV_INSN_MQMULXHS, "mqmulxhs", "mqmulxhs", 32,
  5810. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5811. },
  5812. /* mqmulxhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5813. {
  5814. FRV_INSN_MQMULXHU, "mqmulxhu", "mqmulxhu", 32,
  5815. { 0|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5816. },
  5817. /* cmqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
  5818. {
  5819. FRV_INSN_CMQMULHS, "cmqmulhs", "cmqmulhs", 32,
  5820. { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5821. },
  5822. /* cmqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
  5823. {
  5824. FRV_INSN_CMQMULHU, "cmqmulhu", "cmqmulhu", 32,
  5825. { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5826. },
  5827. /* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
  5828. {
  5829. FRV_INSN_MMACHS, "mmachs", "mmachs", 32,
  5830. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5831. },
  5832. /* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
  5833. {
  5834. FRV_INSN_MMACHU, "mmachu", "mmachu", 32,
  5835. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5836. },
  5837. /* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
  5838. {
  5839. FRV_INSN_MMRDHS, "mmrdhs", "mmrdhs", 32,
  5840. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5841. },
  5842. /* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
  5843. {
  5844. FRV_INSN_MMRDHU, "mmrdhu", "mmrdhu", 32,
  5845. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5846. },
  5847. /* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5848. {
  5849. FRV_INSN_CMMACHS, "cmmachs", "cmmachs", 32,
  5850. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5851. },
  5852. /* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
  5853. {
  5854. FRV_INSN_CMMACHU, "cmmachu", "cmmachu", 32,
  5855. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5856. },
  5857. /* mqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5858. {
  5859. FRV_INSN_MQMACHS, "mqmachs", "mqmachs", 32,
  5860. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5861. },
  5862. /* mqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk */
  5863. {
  5864. FRV_INSN_MQMACHU, "mqmachu", "mqmachu", 32,
  5865. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5866. },
  5867. /* cmqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
  5868. {
  5869. FRV_INSN_CMQMACHS, "cmqmachs", "cmqmachs", 32,
  5870. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5871. },
  5872. /* cmqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk,$CCi,$cond */
  5873. {
  5874. FRV_INSN_CMQMACHU, "cmqmachu", "cmqmachu", 32,
  5875. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5876. },
  5877. /* mqxmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5878. {
  5879. FRV_INSN_MQXMACHS, "mqxmachs", "mqxmachs", 32,
  5880. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5881. },
  5882. /* mqxmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5883. {
  5884. FRV_INSN_MQXMACXHS, "mqxmacxhs", "mqxmacxhs", 32,
  5885. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5886. },
  5887. /* mqmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5888. {
  5889. FRV_INSN_MQMACXHS, "mqmacxhs", "mqmacxhs", 32,
  5890. { 0, { { { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_NONE, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5891. },
  5892. /* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
  5893. {
  5894. FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
  5895. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5896. },
  5897. /* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
  5898. {
  5899. FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
  5900. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5901. },
  5902. /* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
  5903. {
  5904. FRV_INSN_MCPXIS, "mcpxis", "mcpxis", 32,
  5905. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5906. },
  5907. /* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
  5908. {
  5909. FRV_INSN_MCPXIU, "mcpxiu", "mcpxiu", 32,
  5910. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5911. },
  5912. /* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5913. {
  5914. FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
  5915. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5916. },
  5917. /* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5918. {
  5919. FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
  5920. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5921. },
  5922. /* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5923. {
  5924. FRV_INSN_CMCPXIS, "cmcpxis", "cmcpxis", 32,
  5925. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5926. },
  5927. /* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
  5928. {
  5929. FRV_INSN_CMCPXIU, "cmcpxiu", "cmcpxiu", 32,
  5930. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5931. },
  5932. /* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5933. {
  5934. FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
  5935. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5936. },
  5937. /* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5938. {
  5939. FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
  5940. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5941. },
  5942. /* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5943. {
  5944. FRV_INSN_MQCPXIS, "mqcpxis", "mqcpxis", 32,
  5945. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5946. },
  5947. /* mqcpxiu$pack $FRintieven,$FRintjeven,$ACC40Sk */
  5948. {
  5949. FRV_INSN_MQCPXIU, "mqcpxiu", "mqcpxiu", 32,
  5950. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_4, 0 } }, { { FR550_MAJOR_M_4, 0 } } } }
  5951. },
  5952. /* mexpdhw$pack $FRinti,$u6,$FRintk */
  5953. {
  5954. FRV_INSN_MEXPDHW, "mexpdhw", "mexpdhw", 32,
  5955. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5956. },
  5957. /* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
  5958. {
  5959. FRV_INSN_CMEXPDHW, "cmexpdhw", "cmexpdhw", 32,
  5960. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5961. },
  5962. /* mexpdhd$pack $FRinti,$u6,$FRintkeven */
  5963. {
  5964. FRV_INSN_MEXPDHD, "mexpdhd", "mexpdhd", 32,
  5965. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5966. },
  5967. /* cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond */
  5968. {
  5969. FRV_INSN_CMEXPDHD, "cmexpdhd", "cmexpdhd", 32,
  5970. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5971. },
  5972. /* mpackh$pack $FRinti,$FRintj,$FRintk */
  5973. {
  5974. FRV_INSN_MPACKH, "mpackh", "mpackh", 32,
  5975. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5976. },
  5977. /* mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven */
  5978. {
  5979. FRV_INSN_MDPACKH, "mdpackh", "mdpackh", 32,
  5980. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_5, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5981. },
  5982. /* munpackh$pack $FRinti,$FRintkeven */
  5983. {
  5984. FRV_INSN_MUNPACKH, "munpackh", "munpackh", 32,
  5985. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5986. },
  5987. /* mdunpackh$pack $FRintieven,$FRintk */
  5988. {
  5989. FRV_INSN_MDUNPACKH, "mdunpackh", "mdunpackh", 32,
  5990. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  5991. },
  5992. /* mbtoh$pack $FRintj,$FRintkeven */
  5993. {
  5994. FRV_INSN_MBTOH, "mbtoh", "mbtoh", 32,
  5995. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  5996. },
  5997. /* cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond */
  5998. {
  5999. FRV_INSN_CMBTOH, "cmbtoh", "cmbtoh", 32,
  6000. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6001. },
  6002. /* mhtob$pack $FRintjeven,$FRintk */
  6003. {
  6004. FRV_INSN_MHTOB, "mhtob", "mhtob", 32,
  6005. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6006. },
  6007. /* cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond */
  6008. {
  6009. FRV_INSN_CMHTOB, "cmhtob", "cmhtob", 32,
  6010. { 0|A(CONDITIONAL), { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_2, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6011. },
  6012. /* mbtohe$pack $FRintj,$FRintk */
  6013. {
  6014. FRV_INSN_MBTOHE, "mbtohe", "mbtohe", 32,
  6015. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  6016. },
  6017. /* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
  6018. {
  6019. FRV_INSN_CMBTOHE, "cmbtohe", "cmbtohe", 32,
  6020. { 0|A(CONDITIONAL), { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_7, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  6021. },
  6022. /* mnop$pack */
  6023. {
  6024. FRV_INSN_MNOP, "mnop", "mnop", 32,
  6025. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_1, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_M_1, 0 } } } }
  6026. },
  6027. /* mclracc$pack $ACC40Sk,$A0 */
  6028. {
  6029. FRV_INSN_MCLRACC_0, "mclracc-0", "mclracc", 32,
  6030. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_3, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6031. },
  6032. /* mclracc$pack $ACC40Sk,$A1 */
  6033. {
  6034. FRV_INSN_MCLRACC_1, "mclracc-1", "mclracc", 32,
  6035. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_MCLRACC_1, 0 } }, { { FR400_MAJOR_M_2, 0 } }, { { FR450_MAJOR_M_4, 0 } }, { { FR500_MAJOR_M_6, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6036. },
  6037. /* mrdacc$pack $ACC40Si,$FRintk */
  6038. {
  6039. FRV_INSN_MRDACC, "mrdacc", "mrdacc", 32,
  6040. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6041. },
  6042. /* mrdaccg$pack $ACCGi,$FRintk */
  6043. {
  6044. FRV_INSN_MRDACCG, "mrdaccg", "mrdaccg", 32,
  6045. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_5, 0 } }, { { FR500_MAJOR_M_2, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6046. },
  6047. /* mwtacc$pack $FRinti,$ACC40Sk */
  6048. {
  6049. FRV_INSN_MWTACC, "mwtacc", "mwtacc", 32,
  6050. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_3, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6051. },
  6052. /* mwtaccg$pack $FRinti,$ACCGk */
  6053. {
  6054. FRV_INSN_MWTACCG, "mwtaccg", "mwtaccg", 32,
  6055. { 0, { { { (1<<MACH_BASE), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_M_1, 0 } }, { { FR450_MAJOR_M_3, 0 } }, { { FR500_MAJOR_M_3, 0 } }, { { FR550_MAJOR_M_3, 0 } } } }
  6056. },
  6057. /* mcop1$pack $FRi,$FRj,$FRk */
  6058. {
  6059. FRV_INSN_MCOP1, "mcop1", "mcop1", 32,
  6060. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  6061. },
  6062. /* mcop2$pack $FRi,$FRj,$FRk */
  6063. {
  6064. FRV_INSN_MCOP2, "mcop2", "mcop2", 32,
  6065. { 0, { { { (1<<MACH_FRV), 0 } }, { { UNIT_FM01, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_M_1, 0 } }, { { FR550_MAJOR_NONE, 0 } } } }
  6066. },
  6067. /* fnop$pack */
  6068. {
  6069. FRV_INSN_FNOP, "fnop", "fnop", 32,
  6070. { 0, { { { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), 0 } }, { { UNIT_FMALL, 0 } }, { { FR400_MAJOR_NONE, 0 } }, { { FR450_MAJOR_NONE, 0 } }, { { FR500_MAJOR_F_8, 0 } }, { { FR550_MAJOR_F_1, 0 } } } }
  6071. },
  6072. };
  6073. #undef OP
  6074. #undef A
  6075. /* Initialize anything needed to be done once, before any cpu_open call. */
  6076. static void
  6077. init_tables (void)
  6078. {
  6079. }
  6080. #ifndef opcodes_error_handler
  6081. #define opcodes_error_handler(...) \
  6082. fprintf (stderr, __VA_ARGS__); fputc ('\n', stderr)
  6083. #endif
  6084. static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
  6085. static void build_hw_table (CGEN_CPU_TABLE *);
  6086. static void build_ifield_table (CGEN_CPU_TABLE *);
  6087. static void build_operand_table (CGEN_CPU_TABLE *);
  6088. static void build_insn_table (CGEN_CPU_TABLE *);
  6089. static void frv_cgen_rebuild_tables (CGEN_CPU_TABLE *);
  6090. /* Subroutine of frv_cgen_cpu_open to look up a mach via its bfd name. */
  6091. static const CGEN_MACH *
  6092. lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
  6093. {
  6094. while (table->name)
  6095. {
  6096. if (strcmp (name, table->bfd_name) == 0)
  6097. return table;
  6098. ++table;
  6099. }
  6100. return NULL;
  6101. }
  6102. /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
  6103. static void
  6104. build_hw_table (CGEN_CPU_TABLE *cd)
  6105. {
  6106. int i;
  6107. int machs = cd->machs;
  6108. const CGEN_HW_ENTRY *init = & frv_cgen_hw_table[0];
  6109. /* MAX_HW is only an upper bound on the number of selected entries.
  6110. However each entry is indexed by it's enum so there can be holes in
  6111. the table. */
  6112. const CGEN_HW_ENTRY **selected =
  6113. (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
  6114. cd->hw_table.init_entries = init;
  6115. cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
  6116. memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
  6117. /* ??? For now we just use machs to determine which ones we want. */
  6118. for (i = 0; init[i].name != NULL; ++i)
  6119. if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
  6120. & machs)
  6121. selected[init[i].type] = &init[i];
  6122. cd->hw_table.entries = selected;
  6123. cd->hw_table.num_entries = MAX_HW;
  6124. }
  6125. /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
  6126. static void
  6127. build_ifield_table (CGEN_CPU_TABLE *cd)
  6128. {
  6129. cd->ifld_table = & frv_cgen_ifld_table[0];
  6130. }
  6131. /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
  6132. static void
  6133. build_operand_table (CGEN_CPU_TABLE *cd)
  6134. {
  6135. int i;
  6136. int machs = cd->machs;
  6137. const CGEN_OPERAND *init = & frv_cgen_operand_table[0];
  6138. /* MAX_OPERANDS is only an upper bound on the number of selected entries.
  6139. However each entry is indexed by it's enum so there can be holes in
  6140. the table. */
  6141. const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
  6142. cd->operand_table.init_entries = init;
  6143. cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
  6144. memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
  6145. /* ??? For now we just use mach to determine which ones we want. */
  6146. for (i = 0; init[i].name != NULL; ++i)
  6147. if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
  6148. & machs)
  6149. selected[init[i].type] = &init[i];
  6150. cd->operand_table.entries = selected;
  6151. cd->operand_table.num_entries = MAX_OPERANDS;
  6152. }
  6153. /* Subroutine of frv_cgen_cpu_open to build the hardware table.
  6154. ??? This could leave out insns not supported by the specified mach/isa,
  6155. but that would cause errors like "foo only supported by bar" to become
  6156. "unknown insn", so for now we include all insns and require the app to
  6157. do the checking later.
  6158. ??? On the other hand, parsing of such insns may require their hardware or
  6159. operand elements to be in the table [which they mightn't be]. */
  6160. static void
  6161. build_insn_table (CGEN_CPU_TABLE *cd)
  6162. {
  6163. int i;
  6164. const CGEN_IBASE *ib = & frv_cgen_insn_table[0];
  6165. CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
  6166. memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
  6167. for (i = 0; i < MAX_INSNS; ++i)
  6168. insns[i].base = &ib[i];
  6169. cd->insn_table.init_entries = insns;
  6170. cd->insn_table.entry_size = sizeof (CGEN_IBASE);
  6171. cd->insn_table.num_init_entries = MAX_INSNS;
  6172. }
  6173. /* Subroutine of frv_cgen_cpu_open to rebuild the tables. */
  6174. static void
  6175. frv_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
  6176. {
  6177. int i;
  6178. CGEN_BITSET *isas = cd->isas;
  6179. unsigned int machs = cd->machs;
  6180. cd->int_insn_p = CGEN_INT_INSN_P;
  6181. /* Data derived from the isa spec. */
  6182. #define UNSET (CGEN_SIZE_UNKNOWN + 1)
  6183. cd->default_insn_bitsize = UNSET;
  6184. cd->base_insn_bitsize = UNSET;
  6185. cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
  6186. cd->max_insn_bitsize = 0;
  6187. for (i = 0; i < MAX_ISAS; ++i)
  6188. if (cgen_bitset_contains (isas, i))
  6189. {
  6190. const CGEN_ISA *isa = & frv_cgen_isa_table[i];
  6191. /* Default insn sizes of all selected isas must be
  6192. equal or we set the result to 0, meaning "unknown". */
  6193. if (cd->default_insn_bitsize == UNSET)
  6194. cd->default_insn_bitsize = isa->default_insn_bitsize;
  6195. else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
  6196. ; /* This is ok. */
  6197. else
  6198. cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
  6199. /* Base insn sizes of all selected isas must be equal
  6200. or we set the result to 0, meaning "unknown". */
  6201. if (cd->base_insn_bitsize == UNSET)
  6202. cd->base_insn_bitsize = isa->base_insn_bitsize;
  6203. else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
  6204. ; /* This is ok. */
  6205. else
  6206. cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
  6207. /* Set min,max insn sizes. */
  6208. if (isa->min_insn_bitsize < cd->min_insn_bitsize)
  6209. cd->min_insn_bitsize = isa->min_insn_bitsize;
  6210. if (isa->max_insn_bitsize > cd->max_insn_bitsize)
  6211. cd->max_insn_bitsize = isa->max_insn_bitsize;
  6212. }
  6213. /* Data derived from the mach spec. */
  6214. for (i = 0; i < MAX_MACHS; ++i)
  6215. if (((1 << i) & machs) != 0)
  6216. {
  6217. const CGEN_MACH *mach = & frv_cgen_mach_table[i];
  6218. if (mach->insn_chunk_bitsize != 0)
  6219. {
  6220. if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
  6221. {
  6222. opcodes_error_handler
  6223. (/* xgettext:c-format */
  6224. _("internal error: frv_cgen_rebuild_tables: "
  6225. "conflicting insn-chunk-bitsize values: `%d' vs. `%d'"),
  6226. cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
  6227. abort ();
  6228. }
  6229. cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
  6230. }
  6231. }
  6232. /* Determine which hw elements are used by MACH. */
  6233. build_hw_table (cd);
  6234. /* Build the ifield table. */
  6235. build_ifield_table (cd);
  6236. /* Determine which operands are used by MACH/ISA. */
  6237. build_operand_table (cd);
  6238. /* Build the instruction table. */
  6239. build_insn_table (cd);
  6240. }
  6241. /* Initialize a cpu table and return a descriptor.
  6242. It's much like opening a file, and must be the first function called.
  6243. The arguments are a set of (type/value) pairs, terminated with
  6244. CGEN_CPU_OPEN_END.
  6245. Currently supported values:
  6246. CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
  6247. CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
  6248. CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
  6249. CGEN_CPU_OPEN_ENDIAN: specify endian choice
  6250. CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
  6251. CGEN_CPU_OPEN_END: terminates arguments
  6252. ??? Simultaneous multiple isas might not make sense, but it's not (yet)
  6253. precluded. */
  6254. CGEN_CPU_DESC
  6255. frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
  6256. {
  6257. CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
  6258. static int init_p;
  6259. CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
  6260. unsigned int machs = 0; /* 0 = "unspecified" */
  6261. enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
  6262. enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
  6263. va_list ap;
  6264. if (! init_p)
  6265. {
  6266. init_tables ();
  6267. init_p = 1;
  6268. }
  6269. memset (cd, 0, sizeof (*cd));
  6270. va_start (ap, arg_type);
  6271. while (arg_type != CGEN_CPU_OPEN_END)
  6272. {
  6273. switch (arg_type)
  6274. {
  6275. case CGEN_CPU_OPEN_ISAS :
  6276. isas = va_arg (ap, CGEN_BITSET *);
  6277. break;
  6278. case CGEN_CPU_OPEN_MACHS :
  6279. machs = va_arg (ap, unsigned int);
  6280. break;
  6281. case CGEN_CPU_OPEN_BFDMACH :
  6282. {
  6283. const char *name = va_arg (ap, const char *);
  6284. const CGEN_MACH *mach =
  6285. lookup_mach_via_bfd_name (frv_cgen_mach_table, name);
  6286. if (mach != NULL)
  6287. machs |= 1 << mach->num;
  6288. break;
  6289. }
  6290. case CGEN_CPU_OPEN_ENDIAN :
  6291. endian = va_arg (ap, enum cgen_endian);
  6292. break;
  6293. case CGEN_CPU_OPEN_INSN_ENDIAN :
  6294. insn_endian = va_arg (ap, enum cgen_endian);
  6295. break;
  6296. default :
  6297. opcodes_error_handler
  6298. (/* xgettext:c-format */
  6299. _("internal error: frv_cgen_cpu_open: "
  6300. "unsupported argument `%d'"),
  6301. arg_type);
  6302. abort (); /* ??? return NULL? */
  6303. }
  6304. arg_type = va_arg (ap, enum cgen_cpu_open_arg);
  6305. }
  6306. va_end (ap);
  6307. /* Mach unspecified means "all". */
  6308. if (machs == 0)
  6309. machs = (1 << MAX_MACHS) - 1;
  6310. /* Base mach is always selected. */
  6311. machs |= 1;
  6312. if (endian == CGEN_ENDIAN_UNKNOWN)
  6313. {
  6314. /* ??? If target has only one, could have a default. */
  6315. opcodes_error_handler
  6316. (/* xgettext:c-format */
  6317. _("internal error: frv_cgen_cpu_open: no endianness specified"));
  6318. abort ();
  6319. }
  6320. cd->isas = cgen_bitset_copy (isas);
  6321. cd->machs = machs;
  6322. cd->endian = endian;
  6323. cd->insn_endian
  6324. = (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
  6325. /* Table (re)builder. */
  6326. cd->rebuild_tables = frv_cgen_rebuild_tables;
  6327. frv_cgen_rebuild_tables (cd);
  6328. /* Default to not allowing signed overflow. */
  6329. cd->signed_overflow_ok_p = 0;
  6330. return (CGEN_CPU_DESC) cd;
  6331. }
  6332. /* Cover fn to frv_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
  6333. MACH_NAME is the bfd name of the mach. */
  6334. CGEN_CPU_DESC
  6335. frv_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
  6336. {
  6337. return frv_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
  6338. CGEN_CPU_OPEN_ENDIAN, endian,
  6339. CGEN_CPU_OPEN_END);
  6340. }
  6341. /* Close a cpu table.
  6342. ??? This can live in a machine independent file, but there's currently
  6343. no place to put this file (there's no libcgen). libopcodes is the wrong
  6344. place as some simulator ports use this but they don't use libopcodes. */
  6345. void
  6346. frv_cgen_cpu_close (CGEN_CPU_DESC cd)
  6347. {
  6348. unsigned int i;
  6349. const CGEN_INSN *insns;
  6350. if (cd->macro_insn_table.init_entries)
  6351. {
  6352. insns = cd->macro_insn_table.init_entries;
  6353. for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
  6354. if (CGEN_INSN_RX ((insns)))
  6355. regfree (CGEN_INSN_RX (insns));
  6356. }
  6357. if (cd->insn_table.init_entries)
  6358. {
  6359. insns = cd->insn_table.init_entries;
  6360. for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
  6361. if (CGEN_INSN_RX (insns))
  6362. regfree (CGEN_INSN_RX (insns));
  6363. }
  6364. free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
  6365. free ((CGEN_INSN *) cd->insn_table.init_entries);
  6366. free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
  6367. free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
  6368. free (cd);
  6369. }