interf.c 11 KB

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  1. /* This file is part of SIS (SPARC instruction simulator)
  2. Copyright (C) 1995-2022 Free Software Foundation, Inc.
  3. Contributed by Jiri Gaisler, European Space Agency
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 3 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  14. /* This must come before any other includes. */
  15. #include "defs.h"
  16. #include <signal.h>
  17. #include <string.h>
  18. #include <stdio.h>
  19. #include <stdlib.h>
  20. #include <sys/fcntl.h>
  21. #include "sis.h"
  22. #include "libiberty.h"
  23. #include "bfd.h"
  24. #include <dis-asm.h>
  25. #include "sim-config.h"
  26. #include "sim/sim.h"
  27. #include "gdb/signals.h"
  28. #define PSR_CWP 0x7
  29. extern struct disassemble_info dinfo;
  30. extern struct pstate sregs;
  31. extern struct estate ebase;
  32. extern int ctrl_c;
  33. extern int nfp;
  34. extern int ift;
  35. extern int rom8;
  36. extern int wrp;
  37. extern int uben;
  38. extern int sis_verbose;
  39. extern char *sis_version;
  40. extern struct estate ebase;
  41. extern struct evcell evbuf[];
  42. extern struct irqcell irqarr[];
  43. extern int irqpend, ext_irl;
  44. extern int sparclite;
  45. extern int dumbio;
  46. extern int sparclite_board;
  47. extern int termsave;
  48. extern char uart_dev1[], uart_dev2[];
  49. int sis_gdb_break = 1;
  50. host_callback *sim_callback;
  51. int
  52. run_sim(struct pstate *sregs, uint64_t icount, int dis)
  53. {
  54. int mexc, irq;
  55. if (sis_verbose)
  56. (*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n",
  57. sregs->pc);
  58. init_stdio();
  59. sregs->starttime = get_time();
  60. irq = 0;
  61. if ((sregs->pc != 0) && (ebase.simtime == 0))
  62. boot_init();
  63. while (!sregs->err_mode & (icount > 0)) {
  64. sregs->fhold = 0;
  65. sregs->hold = 0;
  66. sregs->icnt = 1;
  67. if (sregs->psr & 0x080)
  68. sregs->asi = 8;
  69. else
  70. sregs->asi = 9;
  71. #if 0 /* DELETE ME! for debugging purposes only */
  72. if (sis_verbose > 1)
  73. if (sregs->pc == 0 || sregs->npc == 0)
  74. printf ("bogus pc or npc\n");
  75. #endif
  76. mexc = memory_iread (sregs->pc, &sregs->inst, &sregs->hold);
  77. #if 0 /* DELETE ME! for debugging purposes only */
  78. if (sis_verbose > 2)
  79. printf("pc %x, np %x, sp %x, fp %x, wm %x, cw %x, i %08x\n",
  80. sregs->pc, sregs->npc,
  81. sregs->r[(((sregs->psr & 7) << 4) + 14) & 0x7f],
  82. sregs->r[(((sregs->psr & 7) << 4) + 30) & 0x7f],
  83. sregs->wim,
  84. sregs->psr & 7,
  85. sregs->inst);
  86. #endif
  87. if (sregs->annul) {
  88. sregs->annul = 0;
  89. sregs->icnt = 1;
  90. sregs->pc = sregs->npc;
  91. sregs->npc = sregs->npc + 4;
  92. } else {
  93. if (ext_irl) irq = check_interrupts(sregs);
  94. if (!irq) {
  95. if (mexc) {
  96. sregs->trap = I_ACC_EXC;
  97. } else {
  98. if ((sis_gdb_break) && (sregs->inst == 0x91d02001)) {
  99. if (sis_verbose)
  100. (*sim_callback->printf_filtered) (sim_callback,
  101. "SW BP hit at %x\n", sregs->pc);
  102. sim_halt();
  103. restore_stdio();
  104. clearerr(stdin);
  105. return BPT_HIT;
  106. } else
  107. dispatch_instruction(sregs);
  108. }
  109. icount--;
  110. }
  111. if (sregs->trap) {
  112. irq = 0;
  113. sregs->err_mode = execute_trap(sregs);
  114. }
  115. }
  116. advance_time(sregs);
  117. if (ctrl_c) {
  118. icount = 0;
  119. }
  120. }
  121. sim_halt();
  122. sregs->tottime += get_time() - sregs->starttime;
  123. restore_stdio();
  124. clearerr(stdin);
  125. if (sregs->err_mode)
  126. error_mode(sregs->pc);
  127. if (sregs->err_mode)
  128. return ERROR;
  129. if (sregs->bphit) {
  130. if (sis_verbose)
  131. (*sim_callback->printf_filtered) (sim_callback,
  132. "HW BP hit at %x\n", sregs->pc);
  133. return BPT_HIT;
  134. }
  135. if (ctrl_c) {
  136. ctrl_c = 0;
  137. return CTRL_C;
  138. }
  139. return TIME_OUT;
  140. }
  141. SIM_DESC
  142. sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback,
  143. struct bfd *abfd, char * const *argv)
  144. {
  145. int argc = 0;
  146. int stat = 1;
  147. int freq = 0;
  148. sim_callback = callback;
  149. argc = countargv (argv);
  150. while (stat < argc) {
  151. if (argv[stat][0] == '-') {
  152. if (strcmp(argv[stat], "-v") == 0) {
  153. sis_verbose++;
  154. } else
  155. if (strcmp(argv[stat], "-nfp") == 0) {
  156. nfp = 1;
  157. } else
  158. if (strcmp(argv[stat], "-ift") == 0) {
  159. ift = 1;
  160. } else
  161. if (strcmp(argv[stat], "-sparclite") == 0) {
  162. sparclite = 1;
  163. } else
  164. if (strcmp(argv[stat], "-sparclite-board") == 0) {
  165. sparclite_board = 1;
  166. } else
  167. if (strcmp(argv[stat], "-dumbio") == 0) {
  168. dumbio = 1;
  169. } else
  170. if (strcmp(argv[stat], "-wrp") == 0) {
  171. wrp = 1;
  172. } else
  173. if (strcmp(argv[stat], "-rom8") == 0) {
  174. rom8 = 1;
  175. } else
  176. if (strcmp(argv[stat], "-uben") == 0) {
  177. uben = 1;
  178. } else
  179. if (strcmp(argv[stat], "-uart1") == 0) {
  180. if ((stat + 1) < argc)
  181. strcpy(uart_dev1, argv[++stat]);
  182. } else
  183. if (strcmp(argv[stat], "-uart2") == 0) {
  184. if ((stat + 1) < argc)
  185. strcpy(uart_dev2, argv[++stat]);
  186. } else
  187. if (strcmp(argv[stat], "-nogdb") == 0) {
  188. sis_gdb_break = 0;
  189. } else
  190. if (strcmp(argv[stat], "-freq") == 0) {
  191. if ((stat + 1) < argc) {
  192. freq = strtol(argv[++stat], (char **)NULL, 0);
  193. }
  194. } else
  195. if (strncmp(argv[stat], "--sysroot=", sizeof("--sysroot=") - 1) == 0) {
  196. /* Ignore until we start to support this. */
  197. } else {
  198. (*sim_callback->printf_filtered) (sim_callback,
  199. "unknown option %s\n",
  200. argv[stat]);
  201. }
  202. } else
  203. bfd_load(argv[stat]);
  204. stat++;
  205. }
  206. if (sis_verbose) {
  207. (*sim_callback->printf_filtered) (sim_callback, "\n SIS - SPARC instruction simulator %s\n", sis_version);
  208. (*sim_callback->printf_filtered) (sim_callback, " Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
  209. if (nfp)
  210. (*sim_callback->printf_filtered) (sim_callback, "no FPU\n");
  211. if (sparclite)
  212. (*sim_callback->printf_filtered) (sim_callback, "simulating Sparclite\n");
  213. if (dumbio)
  214. (*sim_callback->printf_filtered) (sim_callback, "dumb IO (no input, dumb output)\n");
  215. if (sis_gdb_break == 0)
  216. (*sim_callback->printf_filtered) (sim_callback, "disabling GDB trap handling for breakpoints\n");
  217. if (freq)
  218. (*sim_callback->printf_filtered) (sim_callback, " ERC32 freq %d Mhz\n", freq);
  219. }
  220. sregs.freq = freq ? freq : 15;
  221. #ifdef F_GETFL
  222. termsave = fcntl(0, F_GETFL, 0);
  223. #endif
  224. INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf,
  225. fprintf_styled);
  226. #ifdef HOST_LITTLE_ENDIAN
  227. dinfo.endian = BFD_ENDIAN_LITTLE;
  228. #else
  229. dinfo.endian = BFD_ENDIAN_BIG;
  230. #endif
  231. reset_all();
  232. ebase.simtime = 0;
  233. init_sim();
  234. init_bpt(&sregs);
  235. reset_stat(&sregs);
  236. /* Fudge our descriptor for now. */
  237. return (SIM_DESC) 1;
  238. }
  239. void
  240. sim_close(SIM_DESC sd, int quitting)
  241. {
  242. exit_sim();
  243. #ifdef F_SETFL
  244. fcntl(0, F_SETFL, termsave);
  245. #endif
  246. }
  247. SIM_RC
  248. sim_load(SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
  249. {
  250. bfd_load (prog);
  251. return SIM_RC_OK;
  252. }
  253. SIM_RC
  254. sim_create_inferior(SIM_DESC sd, bfd *abfd, char * const *argv,
  255. char * const *env)
  256. {
  257. bfd_vma start_address = 0;
  258. if (abfd != NULL)
  259. start_address = bfd_get_start_address (abfd);
  260. ebase.simtime = 0;
  261. reset_all();
  262. reset_stat(&sregs);
  263. sregs.pc = start_address & ~3;
  264. sregs.npc = sregs.pc + 4;
  265. return SIM_RC_OK;
  266. }
  267. int
  268. sim_store_register(SIM_DESC sd, int regno, unsigned char *value, int length)
  269. {
  270. int regval;
  271. regval = (value[0] << 24) | (value[1] << 16)
  272. | (value[2] << 8) | value[3];
  273. set_regi(&sregs, regno, regval);
  274. return length;
  275. }
  276. int
  277. sim_fetch_register(SIM_DESC sd, int regno, unsigned char *buf, int length)
  278. {
  279. get_regi(&sregs, regno, buf);
  280. return -1;
  281. }
  282. int
  283. sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
  284. {
  285. int i, len;
  286. for (i = 0; i < length; i++) {
  287. sis_memory_write ((mem + i) ^ EBT, &buf[i], 1);
  288. }
  289. return length;
  290. }
  291. int
  292. sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
  293. {
  294. int i, len;
  295. for (i = 0; i < length; i++) {
  296. sis_memory_read ((mem + i) ^ EBT, &buf[i], 1);
  297. }
  298. return length;
  299. }
  300. void
  301. sim_info(SIM_DESC sd, int verbose)
  302. {
  303. show_stat(&sregs);
  304. }
  305. int simstat = OK;
  306. void
  307. sim_stop_reason(SIM_DESC sd, enum sim_stop *reason, int *sigrc)
  308. {
  309. switch (simstat) {
  310. case CTRL_C:
  311. *reason = sim_stopped;
  312. *sigrc = GDB_SIGNAL_INT;
  313. break;
  314. case OK:
  315. case TIME_OUT:
  316. case BPT_HIT:
  317. *reason = sim_stopped;
  318. *sigrc = GDB_SIGNAL_TRAP;
  319. break;
  320. case ERROR:
  321. *sigrc = 0;
  322. *reason = sim_exited;
  323. }
  324. ctrl_c = 0;
  325. simstat = OK;
  326. }
  327. /* Flush all register windows out to the stack. Starting after the invalid
  328. window, flush all windows up to, and including the current window. This
  329. allows GDB to do backtraces and look at local variables for frames that
  330. are still in the register windows. Note that strictly speaking, this
  331. behavior is *wrong* for several reasons. First, it doesn't use the window
  332. overflow handlers. It therefore assumes standard frame layouts and window
  333. handling policies. Second, it changes system state behind the back of the
  334. target program. I expect this to mainly pose problems when debugging trap
  335. handlers.
  336. */
  337. static void
  338. flush_windows (void)
  339. {
  340. int invwin;
  341. int cwp;
  342. int win;
  343. int ws;
  344. /* Keep current window handy */
  345. cwp = sregs.psr & PSR_CWP;
  346. /* Calculate the invalid window from the wim. */
  347. for (invwin = 0; invwin <= PSR_CWP; invwin++)
  348. if ((sregs.wim >> invwin) & 1)
  349. break;
  350. /* Start saving with the window after the invalid window. */
  351. invwin = (invwin - 1) & PSR_CWP;
  352. for (win = invwin; ; win = (win - 1) & PSR_CWP)
  353. {
  354. uint32_t sp;
  355. int i;
  356. sp = sregs.r[(win * 16 + 14) & 0x7f];
  357. #if 1
  358. if (sis_verbose > 2) {
  359. uint32_t fp = sregs.r[(win * 16 + 30) & 0x7f];
  360. printf("flush_window: win %d, sp %x, fp %x\n", win, sp, fp);
  361. }
  362. #endif
  363. for (i = 0; i < 16; i++)
  364. memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
  365. &ws);
  366. if (win == cwp)
  367. break;
  368. }
  369. }
  370. void
  371. sim_resume(SIM_DESC sd, int step, int siggnal)
  372. {
  373. simstat = run_sim(&sregs, UINT64_MAX, 0);
  374. if (sis_gdb_break) flush_windows ();
  375. }
  376. void
  377. sim_do_command(SIM_DESC sd, const char *cmd)
  378. {
  379. exec_cmd(&sregs, cmd);
  380. }
  381. char **
  382. sim_complete_command (SIM_DESC sd, const char *text, const char *word)
  383. {
  384. return NULL;
  385. }
  386. char *
  387. sim_memory_map (SIM_DESC sd)
  388. {
  389. return NULL;
  390. }
  391. #if 0 /* FIXME: These shouldn't exist. */
  392. int
  393. sim_insert_breakpoint(int addr)
  394. {
  395. if (sregs.bptnum < BPT_MAX) {
  396. sregs.bpts[sregs.bptnum] = addr & ~0x3;
  397. sregs.bptnum++;
  398. if (sis_verbose)
  399. (*sim_callback->printf_filtered) (sim_callback, "inserted HW BP at %x\n", addr);
  400. return 0;
  401. } else
  402. return 1;
  403. }
  404. int
  405. sim_remove_breakpoint(int addr)
  406. {
  407. int i = 0;
  408. while ((i < sregs.bptnum) && (sregs.bpts[i] != addr))
  409. i++;
  410. if (addr == sregs.bpts[i]) {
  411. for (; i < sregs.bptnum - 1; i++)
  412. sregs.bpts[i] = sregs.bpts[i + 1];
  413. sregs.bptnum -= 1;
  414. if (sis_verbose)
  415. (*sim_callback->printf_filtered) (sim_callback, "removed HW BP at %x\n", addr);
  416. return 0;
  417. }
  418. return 1;
  419. }
  420. #endif