gencode.c 87 KB

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  1. /* Simulator/Opcode generator for the Renesas
  2. (formerly Hitachi) / SuperH Inc. Super-H architecture.
  3. Written by Steve Chamberlain of Cygnus Support.
  4. sac@cygnus.com
  5. This file is part of SH sim.
  6. THIS SOFTWARE IS NOT COPYRIGHTED
  7. Cygnus offers the following for use in the public domain. Cygnus
  8. makes no warranty with regard to the software or it's performance
  9. and the user accepts the software "AS IS" with all faults.
  10. CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
  11. THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  12. MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  13. */
  14. /* This program generates the opcode table for the assembler and
  15. the simulator code.
  16. -t prints a pretty table for the assembler manual
  17. -s generates the simulator code jump table
  18. -d generates a define table
  19. -x generates the simulator code switch statement
  20. default used to generate the opcode tables
  21. */
  22. #include <ctype.h>
  23. #include <stdio.h>
  24. #include <stdlib.h>
  25. #include <string.h>
  26. #include <unistd.h>
  27. #include "libiberty.h"
  28. #define MAX_NR_STUFF 42
  29. typedef struct
  30. {
  31. const char *defs;
  32. const char *refs;
  33. const char *name;
  34. const char *code;
  35. const char * const stuff[MAX_NR_STUFF];
  36. int index;
  37. } op;
  38. static op tab[] =
  39. {
  40. { "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
  41. "R[n] += SEXT (i);",
  42. "if (i == 0) {",
  43. " UNDEF(n); /* see #ifdef PARANOID */",
  44. " break;",
  45. "}",
  46. },
  47. { "n", "mn", "add <REG_M>,<REG_N>", "0011nnnnmmmm1100",
  48. "R[n] += R[m];",
  49. },
  50. { "n", "mn", "addc <REG_M>,<REG_N>", "0011nnnnmmmm1110",
  51. "ult = R[n] + T;",
  52. "SET_SR_T (ult < R[n]);",
  53. "R[n] = ult + R[m];",
  54. "SET_SR_T (T || (R[n] < ult));",
  55. },
  56. { "n", "mn", "addv <REG_M>,<REG_N>", "0011nnnnmmmm1111",
  57. "ult = R[n] + R[m];",
  58. "SET_SR_T ((~(R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
  59. "R[n] = ult;",
  60. },
  61. { "0", "0", "and #<imm>,R0", "11001001i8*1....",
  62. "R0 &= i;",
  63. },
  64. { "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
  65. "R[n] &= R[m];",
  66. },
  67. { "", "0", "and.b #<imm>,@(R0,GBR)", "11001101i8*1....",
  68. "MA (1);",
  69. "WBAT (GBR + R0, RBAT (GBR + R0) & i);",
  70. },
  71. { "", "", "bf <bdisp8>", "10001011i8p1....",
  72. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  73. "if (!T) {",
  74. " SET_NIP (PC + 4 + (SEXT (i) * 2));",
  75. " cycles += 2;",
  76. "}",
  77. },
  78. { "", "", "bf.s <bdisp8>", "10001111i8p1....",
  79. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  80. "if (!T) {",
  81. " SET_NIP (PC + 4 + (SEXT (i) * 2));",
  82. " cycles += 2;",
  83. " Delay_Slot (PC + 2);",
  84. "}",
  85. },
  86. { "", "n", "bit32 #imm3,@(disp12,<REG_N>)", "0011nnnni8*11001",
  87. "/* 32-bit logical bit-manipulation instructions. */",
  88. "int word2 = RIAT (nip);",
  89. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  90. "i >>= 4; /* BOGUS: Using only three bits of 'i'. */",
  91. "/* MSB of 'i' must be zero. */",
  92. "if (i > 7)",
  93. " RAISE_EXCEPTION (SIGILL);",
  94. "MA (1);",
  95. "do_blog_insn (1 << i, (word2 & 0xfff) + R[n], ",
  96. " (word2 >> 12) & 0xf, memory, maskb);",
  97. "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
  98. },
  99. { "", "", "bra <bdisp12>", "1010i12.........",
  100. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  101. "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
  102. "cycles += 2;",
  103. "Delay_Slot (PC + 2);",
  104. },
  105. { "", "n", "braf <REG_N>", "0000nnnn00100011",
  106. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  107. "SET_NIP (PC + 4 + R[n]);",
  108. "cycles += 2;",
  109. "Delay_Slot (PC + 2);",
  110. },
  111. { "", "", "bsr <bdisp12>", "1011i12.........",
  112. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  113. "PR = PH2T (PC + 4);",
  114. "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
  115. "cycles += 2;",
  116. "Delay_Slot (PC + 2);",
  117. },
  118. { "", "n", "bsrf <REG_N>", "0000nnnn00000011",
  119. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  120. "PR = PH2T (PC) + 4;",
  121. "SET_NIP (PC + 4 + R[n]);",
  122. "cycles += 2;",
  123. "Delay_Slot (PC + 2);",
  124. },
  125. { "", "", "bt <bdisp8>", "10001001i8p1....",
  126. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  127. "if (T) {",
  128. " SET_NIP (PC + 4 + (SEXT (i) * 2));",
  129. " cycles += 2;",
  130. "}",
  131. },
  132. { "", "m", "bld/st #<imm>, <REG_M>", "10000111mmmmi4*1",
  133. "/* MSB of 'i' is true for load, false for store. */",
  134. "if (i <= 7)",
  135. " if (T)",
  136. " R[m] |= (1 << i);",
  137. " else",
  138. " R[m] &= ~(1 << i);",
  139. "else",
  140. " SET_SR_T ((R[m] & (1 << (i - 8))) != 0);",
  141. },
  142. { "m", "m", "bset/clr #<imm>, <REG_M>", "10000110mmmmi4*1",
  143. "/* MSB of 'i' is true for set, false for clear. */",
  144. "if (i <= 7)",
  145. " R[m] &= ~(1 << i);",
  146. "else",
  147. " R[m] |= (1 << (i - 8));",
  148. },
  149. { "n", "n", "clips.b <REG_N>", "0100nnnn10010001",
  150. "if (R[n] < -128 || R[n] > 127) {",
  151. " L (n);",
  152. " SET_SR_CS (1);",
  153. " if (R[n] > 127)",
  154. " R[n] = 127;",
  155. " else if (R[n] < -128)",
  156. " R[n] = -128;",
  157. "}",
  158. },
  159. { "n", "n", "clips.w <REG_N>", "0100nnnn10010101",
  160. "if (R[n] < -32768 || R[n] > 32767) {",
  161. " L (n);",
  162. " SET_SR_CS (1);",
  163. " if (R[n] > 32767)",
  164. " R[n] = 32767;",
  165. " else if (R[n] < -32768)",
  166. " R[n] = -32768;",
  167. "}",
  168. },
  169. { "n", "n", "clipu.b <REG_N>", "0100nnnn10000001",
  170. "if (R[n] < -256 || R[n] > 255) {",
  171. " L (n);",
  172. " SET_SR_CS (1);",
  173. " R[n] = 255;",
  174. "}",
  175. },
  176. { "n", "n", "clipu.w <REG_N>", "0100nnnn10000101",
  177. "if (R[n] < -65536 || R[n] > 65535) {",
  178. " L (n);",
  179. " SET_SR_CS (1);",
  180. " R[n] = 65535;",
  181. "}",
  182. },
  183. { "n", "0n", "divs R0,<REG_N>", "0100nnnn10010100",
  184. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  185. "if (R0 == 0)",
  186. " R[n] = 0x7fffffff;",
  187. "else if (R0 == -1 && R[n] == 0x80000000)",
  188. " R[n] = 0x7fffffff;",
  189. "else R[n] /= R0;",
  190. "L (n);",
  191. },
  192. { "n", "0n", "divu R0,<REG_N>", "0100nnnn10000100",
  193. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  194. "if (R0 == 0)",
  195. " R[n] = 0xffffffff;",
  196. "/* FIXME: The result may be implementation-defined if it is outside */",
  197. "/* the range of signed int (i.e. if R[n] was negative and R0 == 1). */",
  198. "else R[n] = R[n] / (unsigned int) R0;",
  199. "L (n);",
  200. },
  201. { "n", "0n", "mulr R0,<REG_N>", "0100nnnn10000000",
  202. "R[n] = (R[n] * R0) & 0xffffffff;",
  203. "L (n);",
  204. },
  205. { "0", "n", "ldbank @<REG_N>,R0", "0100nnnn11100101",
  206. "int regn = (R[n] >> 2) & 0x1f;",
  207. "int bankn = (R[n] >> 7) & 0x1ff;",
  208. "if (regn > 19)",
  209. " regn = 19; /* FIXME what should happen? */",
  210. "R0 = saved_state.asregs.regstack[bankn].regs[regn];",
  211. "L (0);",
  212. },
  213. { "", "0n", "stbank R0,@<REG_N>", "0100nnnn11100001",
  214. "int regn = (R[n] >> 2) & 0x1f;",
  215. "int bankn = (R[n] >> 7) & 0x1ff;",
  216. "if (regn > 19)",
  217. " regn = 19; /* FIXME what should happen? */",
  218. "saved_state.asregs.regstack[bankn].regs[regn] = R0;",
  219. },
  220. { "", "", "resbank", "0000000001011011",
  221. "int i;",
  222. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  223. /* FIXME: cdef all */
  224. "if (BO) { /* Bank Overflow */",
  225. /* FIXME: how do we know when to reset BO? */
  226. " for (i = 0; i <= 14; i++) {",
  227. " R[i] = RLAT (R[15]);",
  228. " MA (1);",
  229. " R[15] += 4;",
  230. " }",
  231. " PR = RLAT (R[15]);",
  232. " R[15] += 4;",
  233. " MA (1);",
  234. " GBR = RLAT (R[15]);",
  235. " R[15] += 4;",
  236. " MA (1);",
  237. " MACH = RLAT (R[15]);",
  238. " R[15] += 4;",
  239. " MA (1);",
  240. " MACL = RLAT (R[15]);",
  241. " R[15] += 4;",
  242. " MA (1);",
  243. "}",
  244. "else if (BANKN == 0) /* Bank Underflow */",
  245. " RAISE_EXCEPTION (SIGILL);", /* FIXME: what exception? */
  246. "else {",
  247. " SET_BANKN (BANKN - 1);",
  248. " for (i = 0; i <= 14; i++)",
  249. " R[i] = saved_state.asregs.regstack[BANKN].regs[i];",
  250. " MACH = saved_state.asregs.regstack[BANKN].regs[15];",
  251. " PR = saved_state.asregs.regstack[BANKN].regs[17];",
  252. " GBR = saved_state.asregs.regstack[BANKN].regs[18];",
  253. " MACL = saved_state.asregs.regstack[BANKN].regs[19];",
  254. "}",
  255. },
  256. { "f", "f-", "movml.l <REG_N>,@-R15", "0100nnnn11110001",
  257. "/* Push Rn...R0 (if n==15, push pr and R14...R0). */",
  258. "do {",
  259. " MA (1);",
  260. " R[15] -= 4;",
  261. " if (n == 15)",
  262. " WLAT (R[15], PR);",
  263. " else",
  264. " WLAT (R[15], R[n]);",
  265. "} while (n-- > 0);",
  266. },
  267. { "f", "f+", "movml.l @R15+,<REG_N>", "0100nnnn11110101",
  268. "/* Pop R0...Rn (if n==15, pop R0...R14 and pr). */",
  269. "int i = 0;\n",
  270. "do {",
  271. " MA (1);",
  272. " if (i == 15)",
  273. " PR = RLAT (R[15]);",
  274. " else",
  275. " R[i] = RLAT (R[15]);",
  276. " R[15] += 4;",
  277. "} while (i++ < n);",
  278. },
  279. { "f", "f-", "movmu.l <REG_N>,@-R15", "0100nnnn11110000",
  280. "/* Push pr, R14...Rn (if n==15, push pr). */", /* FIXME */
  281. "int i = 15;\n",
  282. "do {",
  283. " MA (1);",
  284. " R[15] -= 4;",
  285. " if (i == 15)",
  286. " WLAT (R[15], PR);",
  287. " else",
  288. " WLAT (R[15], R[i]);",
  289. "} while (i-- > n);",
  290. },
  291. { "f", "f+", "movmu.l @R15+,<REG_N>", "0100nnnn11110100",
  292. "/* Pop Rn...R14, pr (if n==15, pop pr). */", /* FIXME */
  293. "do {",
  294. " MA (1);",
  295. " if (n == 15)",
  296. " PR = RLAT (R[15]);",
  297. " else",
  298. " R[n] = RLAT (R[15]);",
  299. " R[15] += 4;",
  300. "} while (n++ < 15);",
  301. },
  302. { "", "", "nott", "0000000001101000",
  303. "SET_SR_T (T == 0);",
  304. },
  305. { "", "", "bt.s <bdisp8>", "10001101i8p1....",
  306. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  307. "if (T) {",
  308. " SET_NIP (PC + 4 + (SEXT (i) * 2));",
  309. " cycles += 2;",
  310. " Delay_Slot (PC + 2);",
  311. "}",
  312. },
  313. { "", "", "clrmac", "0000000000101000",
  314. "MACH = 0;",
  315. "MACL = 0;",
  316. },
  317. { "", "", "clrs", "0000000001001000",
  318. "SET_SR_S (0);",
  319. },
  320. { "", "", "clrt", "0000000000001000",
  321. "SET_SR_T (0);",
  322. },
  323. /* sh4a */
  324. { "", "", "clrdmxy", "0000000010001000",
  325. "saved_state.asregs.sr &= ~(SR_MASK_DMX | SR_MASK_DMY);"
  326. },
  327. { "", "0", "cmp/eq #<imm>,R0", "10001000i8*1....",
  328. "SET_SR_T (R0 == SEXT (i));",
  329. },
  330. { "", "mn", "cmp/eq <REG_M>,<REG_N>", "0011nnnnmmmm0000",
  331. "SET_SR_T (R[n] == R[m]);",
  332. },
  333. { "", "mn", "cmp/ge <REG_M>,<REG_N>", "0011nnnnmmmm0011",
  334. "SET_SR_T (R[n] >= R[m]);",
  335. },
  336. { "", "mn", "cmp/gt <REG_M>,<REG_N>", "0011nnnnmmmm0111",
  337. "SET_SR_T (R[n] > R[m]);",
  338. },
  339. { "", "mn", "cmp/hi <REG_M>,<REG_N>", "0011nnnnmmmm0110",
  340. "SET_SR_T (UR[n] > UR[m]);",
  341. },
  342. { "", "mn", "cmp/hs <REG_M>,<REG_N>", "0011nnnnmmmm0010",
  343. "SET_SR_T (UR[n] >= UR[m]);",
  344. },
  345. { "", "n", "cmp/pl <REG_N>", "0100nnnn00010101",
  346. "SET_SR_T (R[n] > 0);",
  347. },
  348. { "", "n", "cmp/pz <REG_N>", "0100nnnn00010001",
  349. "SET_SR_T (R[n] >= 0);",
  350. },
  351. { "", "mn", "cmp/str <REG_M>,<REG_N>", "0010nnnnmmmm1100",
  352. "ult = R[n] ^ R[m];",
  353. "SET_SR_T (((ult & 0xff000000) == 0)",
  354. " | ((ult & 0xff0000) == 0)",
  355. " | ((ult & 0xff00) == 0)",
  356. " | ((ult & 0xff) == 0));",
  357. },
  358. { "", "mn", "div0s <REG_M>,<REG_N>", "0010nnnnmmmm0111",
  359. "SET_SR_Q ((R[n] & sbit) != 0);",
  360. "SET_SR_M ((R[m] & sbit) != 0);",
  361. "SET_SR_T (M != Q);",
  362. },
  363. { "", "", "div0u", "0000000000011001",
  364. "SET_SR_M (0);",
  365. "SET_SR_Q (0);",
  366. "SET_SR_T (0);",
  367. },
  368. { "n", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
  369. "div1 (&R0, m, n/*, T*/);",
  370. },
  371. { "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
  372. "dmul_s (R[n], R[m]);",
  373. },
  374. { "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101",
  375. "dmul_u (R[n], R[m]);",
  376. },
  377. { "n", "n", "dt <REG_N>", "0100nnnn00010000",
  378. "R[n]--;",
  379. "SET_SR_T (R[n] == 0);",
  380. },
  381. { "n", "m", "exts.b <REG_M>,<REG_N>", "0110nnnnmmmm1110",
  382. "R[n] = SEXT (R[m]);",
  383. },
  384. { "n", "m", "exts.w <REG_M>,<REG_N>", "0110nnnnmmmm1111",
  385. "R[n] = SEXTW (R[m]);",
  386. },
  387. { "n", "m", "extu.b <REG_M>,<REG_N>", "0110nnnnmmmm1100",
  388. "R[n] = (R[m] & 0xff);",
  389. },
  390. { "n", "m", "extu.w <REG_M>,<REG_N>", "0110nnnnmmmm1101",
  391. "R[n] = (R[m] & 0xffff);",
  392. },
  393. /* sh2e */
  394. { "", "", "fabs <FREG_N>", "1111nnnn01011101",
  395. " union",
  396. " {",
  397. " unsigned int i;",
  398. " float f;",
  399. " } u;",
  400. " u.f = FR (n);",
  401. " u.i &= 0x7fffffff;",
  402. " SET_FR (n, u.f);",
  403. },
  404. /* sh2e */
  405. { "", "", "fadd <FREG_M>,<FREG_N>", "1111nnnnmmmm0000",
  406. "FP_OP (n, +, m);",
  407. },
  408. /* sh2e */
  409. { "", "", "fcmp/eq <FREG_M>,<FREG_N>", "1111nnnnmmmm0100",
  410. "FP_CMP (n, ==, m);",
  411. },
  412. /* sh2e */
  413. { "", "", "fcmp/gt <FREG_M>,<FREG_N>", "1111nnnnmmmm0101",
  414. "FP_CMP (n, >, m);",
  415. },
  416. /* sh4 */
  417. { "", "", "fcnvds <DR_N>,FPUL", "1111nnnn10111101",
  418. "if (! FPSCR_PR || n & 1)",
  419. " RAISE_EXCEPTION (SIGILL);",
  420. "else",
  421. "{",
  422. " union",
  423. " {",
  424. " int i;",
  425. " float f;",
  426. " } u;",
  427. " u.f = DR (n);",
  428. " FPUL = u.i;",
  429. "}",
  430. },
  431. /* sh4 */
  432. { "", "", "fcnvsd FPUL,<DR_N>", "1111nnnn10101101",
  433. "if (! FPSCR_PR || n & 1)",
  434. " RAISE_EXCEPTION (SIGILL);",
  435. "else",
  436. "{",
  437. " union",
  438. " {",
  439. " int i;",
  440. " float f;",
  441. " } u;",
  442. " u.i = FPUL;",
  443. " SET_DR (n, u.f);",
  444. "}",
  445. },
  446. /* sh2e */
  447. { "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
  448. "FP_OP (n, /, m);",
  449. "/* FIXME: check for DP and (n & 1) == 0? */",
  450. },
  451. /* sh4 */
  452. { "", "", "fipr <FV_M>,<FV_N>", "1111vvVV11101101",
  453. "if (FPSCR_PR)",
  454. " RAISE_EXCEPTION (SIGILL);",
  455. "else",
  456. "{",
  457. " double fsum = 0;",
  458. " if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
  459. " RAISE_EXCEPTION (SIGILL);",
  460. " /* FIXME: check for nans and infinities. */",
  461. " fsum += FR (v1+0) * FR (v2+0);",
  462. " fsum += FR (v1+1) * FR (v2+1);",
  463. " fsum += FR (v1+2) * FR (v2+2);",
  464. " fsum += FR (v1+3) * FR (v2+3);",
  465. " SET_FR (v1+3, fsum);",
  466. "}",
  467. },
  468. /* sh2e */
  469. { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
  470. "SET_FR (n, (float) 0.0);",
  471. "/* FIXME: check for DP and (n & 1) == 0? */",
  472. },
  473. /* sh2e */
  474. { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
  475. "SET_FR (n, (float) 1.0);",
  476. "/* FIXME: check for DP and (n & 1) == 0? */",
  477. },
  478. /* sh2e */
  479. { "", "", "flds <FREG_N>,FPUL", "1111nnnn00011101",
  480. " union",
  481. " {",
  482. " int i;",
  483. " float f;",
  484. " } u;",
  485. " u.f = FR (n);",
  486. " FPUL = u.i;",
  487. },
  488. /* sh2e */
  489. { "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
  490. /* sh4 */
  491. "if (FPSCR_PR)",
  492. " SET_DR (n, (double) FPUL);",
  493. "else",
  494. "{",
  495. " SET_FR (n, (float) FPUL);",
  496. "}",
  497. },
  498. /* sh2e */
  499. { "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
  500. "SET_FR (n, FR (m) * FR (0) + FR (n));",
  501. "/* FIXME: check for DP and (n & 1) == 0? */",
  502. },
  503. /* sh2e */
  504. { "", "", "fmov <FREG_M>,<FREG_N>", "1111nnnnmmmm1100",
  505. /* sh4 */
  506. "if (FPSCR_SZ) {",
  507. " int ni = XD_TO_XF (n);",
  508. " int mi = XD_TO_XF (m);",
  509. " SET_XF (ni + 0, XF (mi + 0));",
  510. " SET_XF (ni + 1, XF (mi + 1));",
  511. "}",
  512. "else",
  513. "{",
  514. " SET_FR (n, FR (m));",
  515. "}",
  516. },
  517. /* sh2e */
  518. { "", "n", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
  519. /* sh4 */
  520. "if (FPSCR_SZ) {",
  521. " MA (2);",
  522. " WDAT (R[n], m);",
  523. "}",
  524. "else",
  525. "{",
  526. " MA (1);",
  527. " WLAT (R[n], FI (m));",
  528. "}",
  529. },
  530. /* sh2e */
  531. { "", "m", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
  532. /* sh4 */
  533. "if (FPSCR_SZ) {",
  534. " MA (2);",
  535. " RDAT (R[m], n);",
  536. "}",
  537. "else",
  538. "{",
  539. " MA (1);",
  540. " SET_FI (n, RLAT (R[m]));",
  541. "}",
  542. },
  543. /* sh2a */
  544. { "", "n", "fmov.s @(disp12,<REG_N>), <FREG_M>", "0011nnnnmmmm0001",
  545. "/* and fmov.s <FREG_N>, @(disp12,<FREG_M>)",
  546. " and mov.bwl <REG_N>, @(disp12,<REG_M>)",
  547. " and mov.bwl @(disp12,<REG_N>),<REG_M>",
  548. " and movu.bw @(disp12,<REG_N>),<REG_M>. */",
  549. "int word2 = RIAT (nip);",
  550. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  551. "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
  552. "MA (1);",
  553. "do_long_move_insn (word2 & 0xf000, word2 & 0x0fff, m, n, &thislock);",
  554. },
  555. /* sh2e */
  556. { "m", "m", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
  557. /* sh4 */
  558. "if (FPSCR_SZ) {",
  559. " MA (2);",
  560. " RDAT (R[m], n);",
  561. " R[m] += 8;",
  562. "}",
  563. "else",
  564. "{",
  565. " MA (1);",
  566. " SET_FI (n, RLAT (R[m]));",
  567. " R[m] += 4;",
  568. "}",
  569. },
  570. /* sh2e */
  571. { "n", "n", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
  572. /* sh4 */
  573. "if (FPSCR_SZ) {",
  574. " MA (2);",
  575. " R[n] -= 8;",
  576. " WDAT (R[n], m);",
  577. "}",
  578. "else",
  579. "{",
  580. " MA (1);",
  581. " R[n] -= 4;",
  582. " WLAT (R[n], FI (m));",
  583. "}",
  584. },
  585. /* sh2e */
  586. { "", "0m", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
  587. /* sh4 */
  588. "if (FPSCR_SZ) {",
  589. " MA (2);",
  590. " RDAT (R[0]+R[m], n);",
  591. "}",
  592. "else",
  593. "{",
  594. " MA (1);",
  595. " SET_FI (n, RLAT (R[0] + R[m]));",
  596. "}",
  597. },
  598. /* sh2e */
  599. { "", "0n", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
  600. /* sh4 */
  601. "if (FPSCR_SZ) {",
  602. " MA (2);",
  603. " WDAT (R[0]+R[n], m);",
  604. "}",
  605. "else",
  606. "{",
  607. " MA (1);",
  608. " WLAT ((R[0]+R[n]), FI (m));",
  609. "}",
  610. },
  611. /* sh4:
  612. See fmov instructions above for move to/from extended fp registers. */
  613. /* sh2e */
  614. { "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
  615. "FP_OP (n, *, m);",
  616. },
  617. /* sh2e */
  618. { "", "", "fneg <FREG_N>", "1111nnnn01001101",
  619. " union",
  620. " {",
  621. " unsigned int i;",
  622. " float f;",
  623. " } u;",
  624. " u.f = FR (n);",
  625. " u.i ^= 0x80000000;",
  626. " SET_FR (n, u.f);",
  627. },
  628. /* sh4a */
  629. { "", "", "fpchg", "1111011111111101",
  630. "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_PR);",
  631. },
  632. /* sh4 */
  633. { "", "", "frchg", "1111101111111101",
  634. "if (FPSCR_PR)",
  635. " RAISE_EXCEPTION (SIGILL);",
  636. "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
  637. " RAISE_EXCEPTION (SIGILL);",
  638. "else",
  639. " SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_FR);",
  640. },
  641. /* sh4 */
  642. { "", "", "fsca", "1111eeee11111101",
  643. "if (FPSCR_PR)",
  644. " RAISE_EXCEPTION (SIGILL);",
  645. "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
  646. " RAISE_EXCEPTION (SIGILL);",
  647. "else",
  648. " {",
  649. " SET_FR (n, fsca_s (FPUL, &sin));",
  650. " SET_FR (n+1, fsca_s (FPUL, &cos));",
  651. " }",
  652. },
  653. /* sh4 */
  654. { "", "", "fschg", "1111001111111101",
  655. "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_SZ);",
  656. },
  657. /* sh3e */
  658. { "", "", "fsqrt <FREG_N>", "1111nnnn01101101",
  659. "FP_UNARY (n, sqrt);",
  660. },
  661. /* sh4 */
  662. { "", "", "fsrra <FREG_N>", "1111nnnn01111101",
  663. "if (FPSCR_PR)",
  664. " RAISE_EXCEPTION (SIGILL);",
  665. "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
  666. " RAISE_EXCEPTION (SIGILL);",
  667. "else",
  668. " SET_FR (n, fsrra_s (FR (n)));",
  669. },
  670. /* sh2e */
  671. { "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
  672. "FP_OP (n, -, m);",
  673. },
  674. /* sh2e */
  675. { "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
  676. /* sh4 */
  677. "if (FPSCR_PR) {",
  678. " if (DR (n) != DR (n)) /* NaN */",
  679. " FPUL = 0x80000000;",
  680. " else",
  681. " FPUL = (int) DR (n);",
  682. "}",
  683. "else",
  684. "if (FR (n) != FR (n)) /* NaN */",
  685. " FPUL = 0x80000000;",
  686. "else",
  687. " FPUL = (int) FR (n);",
  688. },
  689. /* sh4 */
  690. { "", "", "ftrv <FV_N>", "1111vv0111111101",
  691. "if (FPSCR_PR)",
  692. " RAISE_EXCEPTION (SIGILL);",
  693. "else",
  694. "{",
  695. " if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
  696. " RAISE_EXCEPTION (SIGILL);",
  697. " /* FIXME not implemented. */",
  698. " printf (\"ftrv xmtrx, FV%d\\n\", v1);",
  699. "}",
  700. },
  701. /* sh2e */
  702. { "", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101",
  703. " union",
  704. " {",
  705. " int i;",
  706. " float f;",
  707. " } u;",
  708. " u.i = FPUL;",
  709. " SET_FR (n, u.f);",
  710. },
  711. { "", "n", "jmp @<REG_N>", "0100nnnn00101011",
  712. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  713. "SET_NIP (PT2H (R[n]));",
  714. "cycles += 2;",
  715. "Delay_Slot (PC + 2);",
  716. },
  717. { "", "n", "jsr @<REG_N>", "0100nnnn00001011",
  718. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  719. "PR = PH2T (PC + 4);",
  720. "if (~doprofile)",
  721. " gotcall (PR, R[n]);",
  722. "SET_NIP (PT2H (R[n]));",
  723. "cycles += 2;",
  724. "Delay_Slot (PC + 2);",
  725. },
  726. { "", "n", "jsr/n @<REG_N>", "0100nnnn01001011",
  727. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  728. "PR = PH2T (PC + 2);",
  729. "if (~doprofile)",
  730. " gotcall (PR, R[n]);",
  731. "SET_NIP (PT2H (R[n]));",
  732. },
  733. { "", "", "jsr/n @@(<disp>,TBR)", "10000011i8p4....",
  734. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  735. "PR = PH2T (PC + 2);",
  736. "if (~doprofile)",
  737. " gotcall (PR, i + TBR);",
  738. "SET_NIP (PT2H (i + TBR));",
  739. },
  740. { "", "n", "ldc <REG_N>,<CREG_M>", "0100nnnnmmmm1110",
  741. "CREG (m) = R[n];",
  742. "/* FIXME: user mode */",
  743. },
  744. { "", "n", "ldc <REG_N>,SR", "0100nnnn00001110",
  745. "SET_SR (R[n]);",
  746. "/* FIXME: user mode */",
  747. },
  748. { "", "n", "ldc <REG_N>,MOD", "0100nnnn01011110",
  749. "SET_MOD (R[n]);",
  750. },
  751. { "", "n", "ldc <REG_N>,DBR", "0100nnnn11111010",
  752. "if (SR_MD)",
  753. " DBR = R[n]; /* priv mode */",
  754. "else",
  755. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  756. },
  757. { "", "n", "ldc <REG_N>,SGR", "0100nnnn00111010",
  758. "if (SR_MD)",
  759. " SGR = R[n]; /* priv mode */",
  760. "else",
  761. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  762. },
  763. { "", "n", "ldc <REG_N>,TBR", "0100nnnn01001010",
  764. "if (SR_MD)", /* FIXME? */
  765. " TBR = R[n]; /* priv mode */",
  766. "else",
  767. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  768. },
  769. { "n", "n", "ldc.l @<REG_N>+,<CREG_M>", "0100nnnnmmmm0111",
  770. "MA (1);",
  771. "CREG (m) = RLAT (R[n]);",
  772. "R[n] += 4;",
  773. "/* FIXME: user mode */",
  774. },
  775. { "n", "n", "ldc.l @<REG_N>+,SR", "0100nnnn00000111",
  776. "MA (1);",
  777. "SET_SR (RLAT (R[n]));",
  778. "R[n] += 4;",
  779. "/* FIXME: user mode */",
  780. },
  781. { "n", "n", "ldc.l @<REG_N>+,MOD", "0100nnnn01010111",
  782. "MA (1);",
  783. "SET_MOD (RLAT (R[n]));",
  784. "R[n] += 4;",
  785. },
  786. { "n", "n", "ldc.l @<REG_N>+,DBR", "0100nnnn11110110",
  787. "if (SR_MD)",
  788. "{ /* priv mode */",
  789. " MA (1);",
  790. " DBR = RLAT (R[n]);",
  791. " R[n] += 4;",
  792. "}",
  793. "else",
  794. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  795. },
  796. { "n", "n", "ldc.l @<REG_N>+,SGR", "0100nnnn00110110",
  797. "if (SR_MD)",
  798. "{ /* priv mode */",
  799. " MA (1);",
  800. " SGR = RLAT (R[n]);",
  801. " R[n] += 4;",
  802. "}",
  803. "else",
  804. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  805. },
  806. /* sh-dsp */
  807. { "", "", "ldre @(<disp>,PC)", "10001110i8p1....",
  808. "RE = SEXT (i) * 2 + 4 + PH2T (PC);",
  809. },
  810. { "", "", "ldrs @(<disp>,PC)", "10001100i8p1....",
  811. "RS = SEXT (i) * 2 + 4 + PH2T (PC);",
  812. },
  813. /* sh4a */
  814. { "", "n", "ldrc <REG_N>", "0100nnnn00110100",
  815. "SET_RC (R[n]);",
  816. "loop = get_loop_bounds_ext (RS, RE, memory, mem_end, maskw, endianw);",
  817. "CHECK_INSN_PTR (insn_ptr);",
  818. "RE |= 1;",
  819. },
  820. { "", "", "ldrc #<imm>", "10001010i8*1....",
  821. "SET_RC (i);",
  822. "loop = get_loop_bounds_ext (RS, RE, memory, mem_end, maskw, endianw);",
  823. "CHECK_INSN_PTR (insn_ptr);",
  824. "RE |= 1;",
  825. },
  826. { "", "n", "lds <REG_N>,<SREG_M>", "0100nnnnssss1010",
  827. "SREG (m) = R[n];",
  828. },
  829. { "n", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
  830. "MA (1);",
  831. "SREG (m) = RLAT (R[n]);",
  832. "R[n] += 4;",
  833. },
  834. /* sh2e / sh-dsp (lds <REG_N>,DSR) */
  835. { "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
  836. "SET_FPSCR (R[n]);",
  837. },
  838. /* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
  839. { "n", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
  840. "MA (1);",
  841. "SET_FPSCR (RLAT (R[n]));",
  842. "R[n] += 4;",
  843. },
  844. { "", "", "ldtlb", "0000000000111000",
  845. "/* We don't implement cache or tlb, so this is a noop. */",
  846. },
  847. { "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
  848. "macl (&R0, memory, n, m);",
  849. },
  850. { "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
  851. "macw (&R0, memory, n, m, endianw);",
  852. },
  853. { "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
  854. "R[n] = SEXT (i);",
  855. },
  856. { "n", "", "movi20 #<imm20>,<REG_N>", "0000nnnni8*10000",
  857. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  858. "R[n] = ((i << 24) >> 12) | RIAT (nip);",
  859. "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
  860. },
  861. { "n", "", "movi20s #<imm20>,<REG_N>", "0000nnnni8*10001",
  862. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  863. "R[n] = ((((i & 0xf0) << 24) >> 12) | RIAT (nip)) << 8;",
  864. "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
  865. },
  866. { "n", "m", "mov <REG_M>,<REG_N>", "0110nnnnmmmm0011",
  867. "R[n] = R[m];",
  868. },
  869. { "0", "", "mov.b @(<disp>,GBR),R0", "11000100i8*1....",
  870. "MA (1);",
  871. "R0 = RSBAT (i + GBR);",
  872. "L (0);",
  873. },
  874. { "0", "m", "mov.b @(<disp>,<REG_M>),R0", "10000100mmmmi4*1",
  875. "MA (1);",
  876. "R0 = RSBAT (i + R[m]);",
  877. "L (0);",
  878. },
  879. { "n", "0m", "mov.b @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1100",
  880. "MA (1);",
  881. "R[n] = RSBAT (R0 + R[m]);",
  882. "L (n);",
  883. },
  884. { "nm", "m", "mov.b @<REG_M>+,<REG_N>", "0110nnnnmmmm0100",
  885. "MA (1);",
  886. "R[n] = RSBAT (R[m]);",
  887. "R[m] += 1;",
  888. "L (n);",
  889. },
  890. { "0n", "n", "mov.b @-<REG_N>,R0", "0100nnnn11001011",
  891. "MA (1);",
  892. "R[n] -= 1;",
  893. "R0 = RSBAT (R[n]);",
  894. "L (0);",
  895. },
  896. { "", "mn", "mov.b <REG_M>,@<REG_N>", "0010nnnnmmmm0000",
  897. "MA (1);",
  898. "WBAT (R[n], R[m]);",
  899. },
  900. { "", "0", "mov.b R0,@(<disp>,GBR)", "11000000i8*1....",
  901. "MA (1);",
  902. "WBAT (i + GBR, R0);",
  903. },
  904. { "", "m0", "mov.b R0,@(<disp>,<REG_M>)", "10000000mmmmi4*1",
  905. "MA (1);",
  906. "WBAT (i + R[m], R0);",
  907. },
  908. { "", "mn0", "mov.b <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0100",
  909. "MA (1);",
  910. "WBAT (R[n] + R0, R[m]);",
  911. },
  912. { "n", "nm", "mov.b <REG_M>,@-<REG_N>", "0010nnnnmmmm0100",
  913. /* Allow for the case where m == n. */
  914. "int t = R[m];",
  915. "MA (1);",
  916. "R[n] -= 1;",
  917. "WBAT (R[n], t);",
  918. },
  919. { "n", "n0", "mov.b R0,@<REG_N>+", "0100nnnn10001011",
  920. "MA (1);",
  921. "WBAT (R[n], R0);",
  922. "R[n] += 1;",
  923. },
  924. { "n", "m", "mov.b @<REG_M>,<REG_N>", "0110nnnnmmmm0000",
  925. "MA (1);",
  926. "R[n] = RSBAT (R[m]);",
  927. "L (n);",
  928. },
  929. { "0", "", "mov.l @(<disp>,GBR),R0", "11000110i8*4....",
  930. "MA (1);",
  931. "R0 = RLAT (i + GBR);",
  932. "L (0);",
  933. },
  934. { "n", "", "mov.l @(<disp>,PC),<REG_N>", "1101nnnni8p4....",
  935. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  936. "MA (1);",
  937. "R[n] = RLAT ((PH2T (PC) & ~3) + 4 + i);",
  938. "L (n);",
  939. },
  940. { "n", "m", "mov.l @(<disp>,<REG_M>),<REG_N>", "0101nnnnmmmmi4*4",
  941. "MA (1);",
  942. "R[n] = RLAT (i + R[m]);",
  943. "L (n);",
  944. },
  945. { "n", "m0", "mov.l @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1110",
  946. "MA (1);",
  947. "R[n] = RLAT (R0 + R[m]);",
  948. "L (n);",
  949. },
  950. { "nm", "m", "mov.l @<REG_M>+,<REG_N>", "0110nnnnmmmm0110",
  951. "MA (1);",
  952. "R[n] = RLAT (R[m]);",
  953. "R[m] += 4;",
  954. "L (n);",
  955. },
  956. { "0n", "n", "mov.l @-<REG_N>,R0", "0100nnnn11101011",
  957. "MA (1);",
  958. "R[n] -= 4;",
  959. "R0 = RLAT (R[n]);",
  960. "L (0);",
  961. },
  962. { "n", "m", "mov.l @<REG_M>,<REG_N>", "0110nnnnmmmm0010",
  963. "MA (1);",
  964. "R[n] = RLAT (R[m]);",
  965. "L (n);",
  966. },
  967. { "", "0", "mov.l R0,@(<disp>,GBR)", "11000010i8*4....",
  968. "MA (1);",
  969. "WLAT (i + GBR, R0);",
  970. },
  971. { "", "nm", "mov.l <REG_M>,@(<disp>,<REG_N>)", "0001nnnnmmmmi4*4",
  972. "MA (1);",
  973. "WLAT (i + R[n], R[m]);",
  974. },
  975. { "", "nm0", "mov.l <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0110",
  976. "MA (1);",
  977. "WLAT (R0 + R[n], R[m]);",
  978. },
  979. { "n", "nm", "mov.l <REG_M>,@-<REG_N>", "0010nnnnmmmm0110",
  980. /* Allow for the case where m == n. */
  981. "int t = R[m];",
  982. "MA (1) ;",
  983. "R[n] -= 4;",
  984. "WLAT (R[n], t);",
  985. },
  986. { "n", "n0", "mov.l R0,@<REG_N>+", "0100nnnn10101011",
  987. "MA (1) ;",
  988. "WLAT (R[n], R0);",
  989. "R[n] += 4;",
  990. },
  991. { "", "nm", "mov.l <REG_M>,@<REG_N>", "0010nnnnmmmm0010",
  992. "MA (1);",
  993. "WLAT (R[n], R[m]);",
  994. },
  995. { "0", "", "mov.w @(<disp>,GBR),R0", "11000101i8*2....",
  996. "MA (1);",
  997. "R0 = RSWAT (i + GBR);",
  998. "L (0);",
  999. },
  1000. { "n", "", "mov.w @(<disp>,PC),<REG_N>", "1001nnnni8p2....",
  1001. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1002. "MA (1);",
  1003. "R[n] = RSWAT (PH2T (PC + 4 + i));",
  1004. "L (n);",
  1005. },
  1006. { "0", "m", "mov.w @(<disp>,<REG_M>),R0", "10000101mmmmi4*2",
  1007. "MA (1);",
  1008. "R0 = RSWAT (i + R[m]);",
  1009. "L (0);",
  1010. },
  1011. { "n", "m0", "mov.w @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1101",
  1012. "MA (1);",
  1013. "R[n] = RSWAT (R0 + R[m]);",
  1014. "L (n);",
  1015. },
  1016. { "nm", "n", "mov.w @<REG_M>+,<REG_N>", "0110nnnnmmmm0101",
  1017. "MA (1);",
  1018. "R[n] = RSWAT (R[m]);",
  1019. "R[m] += 2;",
  1020. "L (n);",
  1021. },
  1022. { "0n", "n", "mov.w @-<REG_N>,R0", "0100nnnn11011011",
  1023. "MA (1);",
  1024. "R[n] -= 2;",
  1025. "R0 = RSWAT (R[n]);",
  1026. "L (0);",
  1027. },
  1028. { "n", "m", "mov.w @<REG_M>,<REG_N>", "0110nnnnmmmm0001",
  1029. "MA (1);",
  1030. "R[n] = RSWAT (R[m]);",
  1031. "L (n);",
  1032. },
  1033. { "", "0", "mov.w R0,@(<disp>,GBR)", "11000001i8*2....",
  1034. "MA (1);",
  1035. "WWAT (i + GBR, R0);",
  1036. },
  1037. { "", "0m", "mov.w R0,@(<disp>,<REG_M>)", "10000001mmmmi4*2",
  1038. "MA (1);",
  1039. "WWAT (i + R[m], R0);",
  1040. },
  1041. { "", "m0n", "mov.w <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0101",
  1042. "MA (1);",
  1043. "WWAT (R0 + R[n], R[m]);",
  1044. },
  1045. { "n", "mn", "mov.w <REG_M>,@-<REG_N>", "0010nnnnmmmm0101",
  1046. /* Allow for the case where m == n. */
  1047. "int t = R[m];",
  1048. "MA (1);",
  1049. "R[n] -= 2;",
  1050. "WWAT (R[n], t);",
  1051. },
  1052. { "n", "0n", "mov.w R0,@<REG_N>+", "0100nnnn10011011",
  1053. "MA (1);",
  1054. "WWAT (R[n], R0);",
  1055. "R[n] += 2;",
  1056. },
  1057. { "", "nm", "mov.w <REG_M>,@<REG_N>", "0010nnnnmmmm0001",
  1058. "MA (1);",
  1059. "WWAT (R[n], R[m]);",
  1060. },
  1061. { "0", "", "mova @(<disp>,PC),R0", "11000111i8p4....",
  1062. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1063. "R0 = ((i + 4 + PH2T (PC)) & ~0x3);",
  1064. },
  1065. { "", "n0", "movca.l R0, @<REG_N>", "0000nnnn11000011",
  1066. "/* We don't simulate cache, so this insn is identical to mov. */",
  1067. "MA (1);",
  1068. "WLAT (R[n], R[0]);",
  1069. },
  1070. { "", "n0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
  1071. "/* LDST -> T */",
  1072. "SET_SR_T (LDST);",
  1073. "/* if (T) R0 -> (Rn) */",
  1074. "if (T)",
  1075. " WLAT (R[n], R[0]);",
  1076. "/* 0 -> LDST */",
  1077. "SET_LDST (0);",
  1078. },
  1079. { "0", "n", "movli.l @<REG_N>, R0", "0000nnnn01100011",
  1080. "/* 1 -> LDST */",
  1081. "SET_LDST (1);",
  1082. "/* (Rn) -> R0 */",
  1083. "R[0] = RLAT (R[n]);",
  1084. "/* if (interrupt/exception) 0 -> LDST */",
  1085. "/* (we don't simulate asynchronous interrupts/exceptions) */",
  1086. },
  1087. { "n", "", "movt <REG_N>", "0000nnnn00101001",
  1088. "R[n] = T;",
  1089. },
  1090. { "", "", "movrt <REG_N>", "0000nnnn00111001",
  1091. "R[n] = (T == 0);",
  1092. },
  1093. { "0", "n", "movua.l @<REG_N>,R0", "0100nnnn10101001",
  1094. "int regn = R[n];",
  1095. "int e = target_little_endian ? 3 : 0;",
  1096. "MA (1);",
  1097. "R[0] = (RBAT (regn + (0^e)) << 24) + (RBAT (regn + (1^e)) << 16) + ",
  1098. " (RBAT (regn + (2^e)) << 8) + RBAT (regn + (3^e));",
  1099. "L (0);",
  1100. },
  1101. { "0n", "n", "movua.l @<REG_N>+,R0", "0100nnnn11101001",
  1102. "int regn = R[n];",
  1103. "int e = target_little_endian ? 3 : 0;",
  1104. "MA (1);",
  1105. "R[0] = (RBAT (regn + (0^e)) << 24) + (RBAT (regn + (1^e)) << 16) + ",
  1106. " (RBAT (regn + (2^e)) << 8) + RBAT (regn + (3^e));",
  1107. "R[n] += 4;",
  1108. "L (0);",
  1109. },
  1110. { "", "mn", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
  1111. "MACL = ((int) R[n]) * ((int) R[m]);",
  1112. },
  1113. #if 0 /* FIXME: The above cast to int is not really portable.
  1114. It should be replaced by a SEXT32 macro. */
  1115. { "", "nm", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
  1116. "MACL = R[n] * R[m];",
  1117. },
  1118. #endif
  1119. /* muls.w - see muls */
  1120. { "", "mn", "muls <REG_M>,<REG_N>", "0010nnnnmmmm1111",
  1121. "MACL = ((int) (short) R[n]) * ((int) (short) R[m]);",
  1122. },
  1123. /* mulu.w - see mulu */
  1124. { "", "mn", "mulu <REG_M>,<REG_N>", "0010nnnnmmmm1110",
  1125. "MACL = (((unsigned int) (unsigned short) R[n])",
  1126. " * ((unsigned int) (unsigned short) R[m]));",
  1127. },
  1128. { "n", "m", "neg <REG_M>,<REG_N>", "0110nnnnmmmm1011",
  1129. "R[n] = - R[m];",
  1130. },
  1131. { "n", "m", "negc <REG_M>,<REG_N>", "0110nnnnmmmm1010",
  1132. "ult = -T;",
  1133. "SET_SR_T (ult > 0);",
  1134. "R[n] = ult - R[m];",
  1135. "SET_SR_T (T || (R[n] > ult));",
  1136. },
  1137. { "", "", "nop", "0000000000001001",
  1138. "/* nop */",
  1139. },
  1140. { "n", "m", "not <REG_M>,<REG_N>", "0110nnnnmmmm0111",
  1141. "R[n] = ~R[m];",
  1142. },
  1143. /* sh4a */
  1144. { "", "n", "icbi @<REG_N>", "0000nnnn11100011",
  1145. "/* Except for the effect on the cache - which is not simulated -",
  1146. " this is like a nop. */",
  1147. },
  1148. { "", "n", "ocbi @<REG_N>", "0000nnnn10010011",
  1149. "(void) RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
  1150. "/* FIXME: Cache not implemented */",
  1151. },
  1152. { "", "n", "ocbp @<REG_N>", "0000nnnn10100011",
  1153. "(void) RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
  1154. "/* FIXME: Cache not implemented */",
  1155. },
  1156. { "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
  1157. "(void) RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
  1158. "/* FIXME: Cache not implemented */",
  1159. },
  1160. { "0", "", "or #<imm>,R0", "11001011i8*1....",
  1161. "R0 |= i;",
  1162. },
  1163. { "n", "m", "or <REG_M>,<REG_N>", "0010nnnnmmmm1011",
  1164. "R[n] |= R[m];",
  1165. },
  1166. { "", "0", "or.b #<imm>,@(R0,GBR)", "11001111i8*1....",
  1167. "MA (1);",
  1168. "WBAT (R0 + GBR, (RBAT (R0 + GBR) | i));",
  1169. },
  1170. { "", "n", "pref @<REG_N>", "0000nnnn10000011",
  1171. "/* Except for the effect on the cache - which is not simulated -",
  1172. " this is like a nop. */",
  1173. },
  1174. /* sh4a */
  1175. { "", "n", "prefi @<REG_N>", "0000nnnn11010011",
  1176. "/* Except for the effect on the cache - which is not simulated -",
  1177. " this is like a nop. */",
  1178. },
  1179. /* sh4a */
  1180. { "", "", "synco", "0000000010101011",
  1181. "/* Except for the effect on the pipeline - which is not simulated -",
  1182. " this is like a nop. */",
  1183. },
  1184. { "n", "n", "rotcl <REG_N>", "0100nnnn00100100",
  1185. "ult = R[n] < 0;",
  1186. "R[n] = (R[n] << 1) | T;",
  1187. "SET_SR_T (ult);",
  1188. },
  1189. { "n", "n", "rotcr <REG_N>", "0100nnnn00100101",
  1190. "ult = R[n] & 1;",
  1191. "R[n] = (UR[n] >> 1) | (T << 31);",
  1192. "SET_SR_T (ult);",
  1193. },
  1194. { "n", "n", "rotl <REG_N>", "0100nnnn00000100",
  1195. "SET_SR_T (R[n] < 0);",
  1196. "R[n] <<= 1;",
  1197. "R[n] |= T;",
  1198. },
  1199. { "n", "n", "rotr <REG_N>", "0100nnnn00000101",
  1200. "SET_SR_T (R[n] & 1);",
  1201. "R[n] = UR[n] >> 1;",
  1202. "R[n] |= (T << 31);",
  1203. },
  1204. { "", "", "rte", "0000000000101011",
  1205. #if 0
  1206. /* SH-[12] */
  1207. "int tmp = PC;",
  1208. "SET_NIP (PT2H (RLAT (R[15]) + 2));",
  1209. "R[15] += 4;",
  1210. "SET_SR (RLAT (R[15]) & 0x3f3);",
  1211. "R[15] += 4;",
  1212. "Delay_Slot (PC + 2);",
  1213. #else
  1214. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1215. "SET_SR (SSR);",
  1216. "SET_NIP (PT2H (SPC));",
  1217. "cycles += 2;",
  1218. "Delay_Slot (PC + 2);",
  1219. #endif
  1220. },
  1221. { "", "", "rts", "0000000000001011",
  1222. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1223. "SET_NIP (PT2H (PR));",
  1224. "cycles += 2;",
  1225. "Delay_Slot (PC + 2);",
  1226. },
  1227. { "", "", "rts/n", "0000000001101011",
  1228. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1229. "SET_NIP (PT2H (PR));",
  1230. },
  1231. { "0", "n", "rtv/n <REG_N>", "0000nnnn01111011",
  1232. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1233. "R0 = R[n];",
  1234. "L (0);",
  1235. "SET_NIP (PT2H (PR));",
  1236. },
  1237. /* sh4a */
  1238. { "", "", "setdmx", "0000000010011000",
  1239. "saved_state.asregs.sr |= SR_MASK_DMX;"
  1240. "saved_state.asregs.sr &= ~SR_MASK_DMY;"
  1241. },
  1242. /* sh4a */
  1243. { "", "", "setdmy", "0000000011001000",
  1244. "saved_state.asregs.sr |= SR_MASK_DMY;"
  1245. "saved_state.asregs.sr &= ~SR_MASK_DMX;"
  1246. },
  1247. /* sh-dsp */
  1248. { "", "n", "setrc <REG_N>", "0100nnnn00010100",
  1249. "SET_RC (R[n]);",
  1250. },
  1251. { "", "", "setrc #<imm>", "10000010i8*1....",
  1252. /* It would be more realistic to let loop_start point to some static
  1253. memory that contains an illegal opcode and then give a bus error when
  1254. the loop is eventually encountered, but it seems not only simpler,
  1255. but also more debugging-friendly to just catch the failure here. */
  1256. "if (BUSERROR (RS | RE, maskw))",
  1257. " RAISE_EXCEPTION (SIGILL);",
  1258. "else {",
  1259. " SET_RC (i);",
  1260. " loop = get_loop_bounds (RS, RE, memory, mem_end, maskw, endianw);",
  1261. " CHECK_INSN_PTR (insn_ptr);",
  1262. "}",
  1263. },
  1264. { "", "", "sets", "0000000001011000",
  1265. "SET_SR_S (1);",
  1266. },
  1267. { "", "", "sett", "0000000000011000",
  1268. "SET_SR_T (1);",
  1269. },
  1270. { "n", "mn", "shad <REG_M>,<REG_N>", "0100nnnnmmmm1100",
  1271. "R[n] = (R[m] < 0) ? (R[m]&0x1f ? R[n] >> ((-R[m])&0x1f) : R[n] >> 31) : (R[n] << (R[m] & 0x1f));",
  1272. },
  1273. { "n", "n", "shal <REG_N>", "0100nnnn00100000",
  1274. "SET_SR_T (R[n] < 0);",
  1275. "R[n] <<= 1;",
  1276. },
  1277. { "n", "n", "shar <REG_N>", "0100nnnn00100001",
  1278. "SET_SR_T (R[n] & 1);",
  1279. "R[n] = R[n] >> 1;",
  1280. },
  1281. { "n", "mn", "shld <REG_M>,<REG_N>", "0100nnnnmmmm1101",
  1282. "R[n] = (R[m] < 0) ? (R[m]&0x1f ? UR[n] >> ((-R[m])&0x1f) : 0): (R[n] << (R[m] & 0x1f));",
  1283. },
  1284. { "n", "n", "shll <REG_N>", "0100nnnn00000000",
  1285. "SET_SR_T (R[n] < 0);",
  1286. "R[n] <<= 1;",
  1287. },
  1288. { "n", "n", "shll2 <REG_N>", "0100nnnn00001000",
  1289. "R[n] <<= 2;",
  1290. },
  1291. { "n", "n", "shll8 <REG_N>", "0100nnnn00011000",
  1292. "R[n] <<= 8;",
  1293. },
  1294. { "n", "n", "shll16 <REG_N>", "0100nnnn00101000",
  1295. "R[n] <<= 16;",
  1296. },
  1297. { "n", "n", "shlr <REG_N>", "0100nnnn00000001",
  1298. "SET_SR_T (R[n] & 1);",
  1299. "R[n] = UR[n] >> 1;",
  1300. },
  1301. { "n", "n", "shlr2 <REG_N>", "0100nnnn00001001",
  1302. "R[n] = UR[n] >> 2;",
  1303. },
  1304. { "n", "n", "shlr8 <REG_N>", "0100nnnn00011001",
  1305. "R[n] = UR[n] >> 8;",
  1306. },
  1307. { "n", "n", "shlr16 <REG_N>", "0100nnnn00101001",
  1308. "R[n] = UR[n] >> 16;",
  1309. },
  1310. { "", "", "sleep", "0000000000011011",
  1311. "nip += trap (sd, 0xc3, &R0, PC, memory, maskl, maskw, endianw);",
  1312. },
  1313. { "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
  1314. "R[n] = CREG (m);",
  1315. },
  1316. { "n", "", "stc SGR,<REG_N>", "0000nnnn00111010",
  1317. "if (SR_MD)",
  1318. " R[n] = SGR; /* priv mode */",
  1319. "else",
  1320. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  1321. },
  1322. { "n", "", "stc DBR,<REG_N>", "0000nnnn11111010",
  1323. "if (SR_MD)",
  1324. " R[n] = DBR; /* priv mode */",
  1325. "else",
  1326. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  1327. },
  1328. { "n", "", "stc TBR,<REG_N>", "0000nnnn01001010",
  1329. "if (SR_MD)", /* FIXME? */
  1330. " R[n] = TBR; /* priv mode */",
  1331. "else",
  1332. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  1333. },
  1334. { "n", "n", "stc.l <CREG_M>,@-<REG_N>", "0100nnnnmmmm0011",
  1335. "MA (1);",
  1336. "R[n] -= 4;",
  1337. "WLAT (R[n], CREG (m));",
  1338. },
  1339. { "n", "n", "stc.l SGR,@-<REG_N>", "0100nnnn00110010",
  1340. "if (SR_MD)",
  1341. "{ /* priv mode */",
  1342. " MA (1);",
  1343. " R[n] -= 4;",
  1344. " WLAT (R[n], SGR);",
  1345. "}",
  1346. "else",
  1347. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  1348. },
  1349. { "n", "n", "stc.l DBR,@-<REG_N>", "0100nnnn11110010",
  1350. "if (SR_MD)",
  1351. "{ /* priv mode */",
  1352. " MA (1);",
  1353. " R[n] -= 4;",
  1354. " WLAT (R[n], DBR);",
  1355. "}",
  1356. "else",
  1357. " RAISE_EXCEPTION (SIGILL); /* user mode */",
  1358. },
  1359. { "n", "", "sts <SREG_M>,<REG_N>", "0000nnnnssss1010",
  1360. "R[n] = SREG (m);",
  1361. },
  1362. { "n", "n", "sts.l <SREG_M>,@-<REG_N>", "0100nnnnssss0010",
  1363. "MA (1);",
  1364. "R[n] -= 4;",
  1365. "WLAT (R[n], SREG (m));",
  1366. },
  1367. { "n", "nm", "sub <REG_M>,<REG_N>", "0011nnnnmmmm1000",
  1368. "R[n] -= R[m];",
  1369. },
  1370. { "n", "nm", "subc <REG_M>,<REG_N>", "0011nnnnmmmm1010",
  1371. "ult = R[n] - T;",
  1372. "SET_SR_T (ult > R[n]);",
  1373. "R[n] = ult - R[m];",
  1374. "SET_SR_T (T || (R[n] > ult));",
  1375. },
  1376. { "n", "nm", "subv <REG_M>,<REG_N>", "0011nnnnmmmm1011",
  1377. "ult = R[n] - R[m];",
  1378. "SET_SR_T (((R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
  1379. "R[n] = ult;",
  1380. },
  1381. { "n", "nm", "swap.b <REG_M>,<REG_N>", "0110nnnnmmmm1000",
  1382. "R[n] = ((R[m] & 0xffff0000)",
  1383. " | ((R[m] << 8) & 0xff00)",
  1384. " | ((R[m] >> 8) & 0x00ff));",
  1385. },
  1386. { "n", "nm", "swap.w <REG_M>,<REG_N>", "0110nnnnmmmm1001",
  1387. "R[n] = (((R[m] << 16) & 0xffff0000)",
  1388. " | ((R[m] >> 16) & 0x00ffff));",
  1389. },
  1390. { "", "n", "tas.b @<REG_N>", "0100nnnn00011011",
  1391. "MA (1);",
  1392. "ult = RBAT (R[n]);",
  1393. "SET_SR_T (ult == 0);",
  1394. "WBAT (R[n],ult|0x80);",
  1395. },
  1396. { "0", "", "trapa #<imm>", "11000011i8*1....",
  1397. "long imm = 0xff & i;",
  1398. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1399. "if (i < 20 || i == 33 || i == 34 || i == 0xc3)",
  1400. " nip += trap (sd, i, &R0, PC, memory, maskl, maskw, endianw);",
  1401. #if 0
  1402. "else {",
  1403. /* SH-[12] */
  1404. " R[15] -= 4;",
  1405. " WLAT (R[15], GET_SR ());",
  1406. " R[15] -= 4;",
  1407. " WLAT (R[15], PH2T (PC + 2));",
  1408. #else
  1409. "else if (!SR_BL) {",
  1410. " SSR = GET_SR ();",
  1411. " SPC = PH2T (PC + 2);",
  1412. " SET_SR (GET_SR () | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
  1413. " /* FIXME: EXPEVT = 0x00000160; */",
  1414. #endif
  1415. " SET_NIP (PT2H (RLAT (VBR + (imm<<2))));",
  1416. "}",
  1417. },
  1418. { "", "mn", "tst <REG_M>,<REG_N>", "0010nnnnmmmm1000",
  1419. "SET_SR_T ((R[n] & R[m]) == 0);",
  1420. },
  1421. { "", "0", "tst #<imm>,R0", "11001000i8*1....",
  1422. "SET_SR_T ((R0 & i) == 0);",
  1423. },
  1424. { "", "0", "tst.b #<imm>,@(R0,GBR)", "11001100i8*1....",
  1425. "MA (1);",
  1426. "SET_SR_T ((RBAT (GBR+R0) & i) == 0);",
  1427. },
  1428. { "", "0", "xor #<imm>,R0", "11001010i8*1....",
  1429. "R0 ^= i;",
  1430. },
  1431. { "n", "mn", "xor <REG_M>,<REG_N>", "0010nnnnmmmm1010",
  1432. "R[n] ^= R[m];",
  1433. },
  1434. { "", "0", "xor.b #<imm>,@(R0,GBR)", "11001110i8*1....",
  1435. "MA (1);",
  1436. "ult = RBAT (GBR+R0);",
  1437. "ult ^= i;",
  1438. "WBAT (GBR + R0, ult);",
  1439. },
  1440. { "n", "nm", "xtrct <REG_M>,<REG_N>", "0010nnnnmmmm1101",
  1441. "R[n] = (((R[n] >> 16) & 0xffff)",
  1442. " | ((R[m] << 16) & 0xffff0000));",
  1443. },
  1444. #if 0
  1445. { "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
  1446. "divl (0, R[n], R[m]);",
  1447. },
  1448. { "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
  1449. "divl (0, R[n], R[m]);",
  1450. },
  1451. #endif
  1452. {0, 0}};
  1453. op movsxy_tab[] =
  1454. {
  1455. /* If this is disabled, the simulator speeds up by about 12% on a
  1456. 450 MHz PIII - 9% with ACE_FAST.
  1457. Maybe we should have separate simulator loops? */
  1458. #if 1
  1459. { "n", "n", "movs.w @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0000",
  1460. "MA (1);",
  1461. "R[n] -= 2;",
  1462. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1463. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1464. },
  1465. { "", "n", "movs.w @<REG_N>,<DSP_REG_M>", "111101NNMMMM0100",
  1466. "MA (1);",
  1467. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1468. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1469. },
  1470. { "n", "n", "movs.w @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1000",
  1471. "MA (1);",
  1472. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1473. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1474. "R[n] += 2;",
  1475. },
  1476. { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1100",
  1477. "MA (1);",
  1478. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1479. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1480. "R[n] += R[8];",
  1481. },
  1482. { "n", "n", "movs.w @-<REG_N>,<DSP_GRD_M>", "111101NNGGGG0000",
  1483. "MA (1);",
  1484. "R[n] -= 2;",
  1485. "DSP_R (m) = RSWAT (R[n]);",
  1486. },
  1487. { "", "n", "movs.w @<REG_N>,<DSP_GRD_M>", "111101NNGGGG0100",
  1488. "MA (1);",
  1489. "DSP_R (m) = RSWAT (R[n]);",
  1490. },
  1491. { "n", "n", "movs.w @<REG_N>+,<DSP_GRD_M>", "111101NNGGGG1000",
  1492. "MA (1);",
  1493. "DSP_R (m) = RSWAT (R[n]);",
  1494. "R[n] += 2;",
  1495. },
  1496. { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_GRD_M>", "111101NNGGGG1100",
  1497. "MA (1);",
  1498. "DSP_R (m) = RSWAT (R[n]);",
  1499. "R[n] += R[8];",
  1500. },
  1501. { "n", "n", "movs.w <DSP_REG_M>,@-<REG_N>", "111101NNMMMM0001",
  1502. "MA (1);",
  1503. "R[n] -= 2;",
  1504. "WWAT (R[n], DSP_R (m) >> 16);",
  1505. },
  1506. { "", "n", "movs.w <DSP_REG_M>,@<REG_N>", "111101NNMMMM0101",
  1507. "MA (1);",
  1508. "WWAT (R[n], DSP_R (m) >> 16);",
  1509. },
  1510. { "n", "n", "movs.w <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1001",
  1511. "MA (1);",
  1512. "WWAT (R[n], DSP_R (m) >> 16);",
  1513. "R[n] += 2;",
  1514. },
  1515. { "n", "n8","movs.w <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1101",
  1516. "MA (1);",
  1517. "WWAT (R[n], DSP_R (m) >> 16);",
  1518. "R[n] += R[8];",
  1519. },
  1520. { "n", "n", "movs.w <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0001",
  1521. "MA (1);",
  1522. "R[n] -= 2;",
  1523. "WWAT (R[n], SEXT (DSP_R (m)));",
  1524. },
  1525. { "", "n", "movs.w <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0101",
  1526. "MA (1);",
  1527. "WWAT (R[n], SEXT (DSP_R (m)));",
  1528. },
  1529. { "n", "n", "movs.w <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1001",
  1530. "MA (1);",
  1531. "WWAT (R[n], SEXT (DSP_R (m)));",
  1532. "R[n] += 2;",
  1533. },
  1534. { "n", "n8","movs.w <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1101",
  1535. "MA (1);",
  1536. "WWAT (R[n], SEXT (DSP_R (m)));",
  1537. "R[n] += R[8];",
  1538. },
  1539. { "n", "n", "movs.l @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0010",
  1540. "MA (1);",
  1541. "R[n] -= 4;",
  1542. "DSP_R (m) = RLAT (R[n]);",
  1543. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1544. },
  1545. { "", "n", "movs.l @<REG_N>,<DSP_REG_M>", "111101NNMMMM0110",
  1546. "MA (1);",
  1547. "DSP_R (m) = RLAT (R[n]);",
  1548. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1549. },
  1550. { "n", "n", "movs.l @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1010",
  1551. "MA (1);",
  1552. "DSP_R (m) = RLAT (R[n]);",
  1553. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1554. "R[n] += 4;",
  1555. },
  1556. { "n", "n8","movs.l @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1110",
  1557. "MA (1);",
  1558. "DSP_R (m) = RLAT (R[n]);",
  1559. "DSP_GRD (m) = SIGN32 (DSP_R (m));",
  1560. "R[n] += R[8];",
  1561. },
  1562. { "n", "n", "movs.l <DSP_REG_M>,@-<REG_N>", "111101NNMMMM0011",
  1563. "MA (1);",
  1564. "R[n] -= 4;",
  1565. "WLAT (R[n], DSP_R (m));",
  1566. },
  1567. { "", "n", "movs.l <DSP_REG_M>,@<REG_N>", "111101NNMMMM0111",
  1568. "MA (1);",
  1569. "WLAT (R[n], DSP_R (m));",
  1570. },
  1571. { "n", "n", "movs.l <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1011",
  1572. "MA (1);",
  1573. "WLAT (R[n], DSP_R (m));",
  1574. "R[n] += 4;",
  1575. },
  1576. { "n", "n8","movs.l <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1111",
  1577. "MA (1);",
  1578. "WLAT (R[n], DSP_R (m));",
  1579. "R[n] += R[8];",
  1580. },
  1581. { "n", "n", "movs.l <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0011",
  1582. "MA (1);",
  1583. "R[n] -= 4;",
  1584. "WLAT (R[n], SEXT (DSP_R (m)));",
  1585. },
  1586. { "", "n", "movs.l <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0111",
  1587. "MA (1);",
  1588. "WLAT (R[n], SEXT (DSP_R (m)));",
  1589. },
  1590. { "n", "n", "movs.l <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1011",
  1591. "MA (1);",
  1592. "WLAT (R[n], SEXT (DSP_R (m)));",
  1593. "R[n] += 4;",
  1594. },
  1595. { "n", "n8","movs.l <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1111",
  1596. "MA (1);",
  1597. "WLAT (R[n], SEXT (DSP_R (m)));",
  1598. "R[n] += R[8];",
  1599. },
  1600. { "", "n", "movx.w @<REG_xy>,<DSP_XY>", "111100xyXY0001??",
  1601. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1602. "if (iword & 3)",
  1603. " {",
  1604. " iword &= 0xfd53; goto top;",
  1605. " }",
  1606. },
  1607. { "", "n", "movx.l @<REG_xy>,<DSP_XY>", "111100xyXY010100",
  1608. "DSP_R (m) = RLAT (R[n]);",
  1609. },
  1610. { "n", "n", "movx.w @<REG_xy>+,<DSP_XY>", "111100xyXY0010??",
  1611. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1612. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
  1613. "if (iword & 3)",
  1614. " {",
  1615. " iword &= 0xfd53; goto top;",
  1616. " }",
  1617. },
  1618. { "n", "n", "movx.l @<REG_xy>+,<DSP_XY>", "111100xyXY011000",
  1619. "DSP_R (m) = RLAT (R[n]);",
  1620. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 4;",
  1621. },
  1622. { "n", "n8","movx.w @<REG_xy>+REG_8,<DSP_XY>", "111100xyXY0011??",
  1623. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1624. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
  1625. "if (iword & 3)",
  1626. " {",
  1627. " iword &= 0xfd53; goto top;",
  1628. " }",
  1629. },
  1630. { "n", "n8","movx.l @<REG_xy>+REG_8,<DSP_XY>", "111100xyXY011100",
  1631. "DSP_R (m) = RLAT (R[n]);",
  1632. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
  1633. },
  1634. { "", "n", "movx.w <DSP_Ax>,@<REG_xy>", "111100xyax1001??",
  1635. "WWAT (R[n], DSP_R (m) >> 16);",
  1636. "if (iword & 3)",
  1637. " {",
  1638. " iword &= 0xfd53; goto top;",
  1639. " }",
  1640. },
  1641. { "", "n", "movx.l <DSP_Ax>,@<REG_xy>", "111100xyax110100",
  1642. "WLAT (R[n], DSP_R (m));",
  1643. },
  1644. { "n", "n", "movx.w <DSP_Ax>,@<REG_xy>+", "111100xyax1010??",
  1645. "WWAT (R[n], DSP_R (m) >> 16);",
  1646. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
  1647. "if (iword & 3)",
  1648. " {",
  1649. " iword &= 0xfd53; goto top;",
  1650. " }",
  1651. },
  1652. { "n", "n", "movx.l <DSP_Ax>,@<REG_xy>+", "111100xyax111000",
  1653. "WLAT (R[n], DSP_R (m));",
  1654. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 4;",
  1655. },
  1656. { "n", "n8","movx.w <DSP_Ax>,@<REG_xy>+REG_8","111100xyax1011??",
  1657. "WWAT (R[n], DSP_R (m) >> 16);",
  1658. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
  1659. "if (iword & 3)",
  1660. " {",
  1661. " iword &= 0xfd53; goto top;",
  1662. " }",
  1663. },
  1664. { "n", "n8","movx.l <DSP_Ax>,@<REG_xy>+REG_8","111100xyax111100",
  1665. "WLAT (R[n], DSP_R (m));",
  1666. "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
  1667. },
  1668. { "", "n", "movy.w @<REG_yx>,<DSP_YX>", "111100yxYX000001",
  1669. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1670. },
  1671. { "n", "n", "movy.w @<REG_yx>+,<DSP_YX>", "111100yxYX000010",
  1672. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1673. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
  1674. },
  1675. { "n", "n9","movy.w @<REG_yx>+REG_9,<DSP_YX>", "111100yxYX000011",
  1676. "DSP_R (m) = RSWAT (R[n]) << 16;",
  1677. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
  1678. },
  1679. { "", "n", "movy.w <DSP_Ay>,@<REG_yx>", "111100yxAY010001",
  1680. "WWAT (R[n], DSP_R (m) >> 16);",
  1681. },
  1682. { "n", "n", "movy.w <DSP_Ay>,@<REG_yx>+", "111100yxAY010010",
  1683. "WWAT (R[n], DSP_R (m) >> 16);",
  1684. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
  1685. },
  1686. { "n", "n9", "movy.w <DSP_Ay>,@<REG_yx>+REG_9", "111100yxAY010011",
  1687. "WWAT (R[n], DSP_R (m) >> 16);",
  1688. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
  1689. },
  1690. { "", "n", "movy.l @<REG_yx>,<DSP_YX>", "111100yxYX100001",
  1691. "DSP_R (m) = RLAT (R[n]);",
  1692. },
  1693. { "n", "n", "movy.l @<REG_yx>+,<DSP_YX>", "111100yxYX100010",
  1694. "DSP_R (m) = RLAT (R[n]);",
  1695. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 4;",
  1696. },
  1697. { "n", "n9","movy.l @<REG_yx>+REG_9,<DSP_YX>", "111100yxYX100011",
  1698. "DSP_R (m) = RLAT (R[n]);",
  1699. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
  1700. },
  1701. { "", "n", "movy.l <DSP_Ay>,@<REG_yx>", "111100yxAY110001",
  1702. "WLAT (R[n], DSP_R (m));",
  1703. },
  1704. { "n", "n", "movy.l <DSP_Ay>,@<REG_yx>+", "111100yxAY110010",
  1705. "WLAT (R[n], DSP_R (m));",
  1706. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 4;",
  1707. },
  1708. { "n", "n9", "movy.l <DSP_Ay>,@<REG_yx>+REG_9", "111100yxAY110011",
  1709. "WLAT (R[n], DSP_R (m));",
  1710. "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
  1711. },
  1712. { "", "", "nopx nopy", "1111000000000000",
  1713. "/* nop */",
  1714. },
  1715. { "", "", "ppi", "1111100000000000",
  1716. "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
  1717. "ppi_insn (RIAT (nip));",
  1718. "SET_NIP (nip + 2);",
  1719. "iword &= 0xf7ff; goto top;",
  1720. },
  1721. #endif
  1722. {0, 0}};
  1723. op ppi_tab[] =
  1724. {
  1725. { "","", "pshl #<imm>,dz", "00000iiim16.zzzz",
  1726. "int Sz = DSP_R (z) & 0xffff0000;",
  1727. "",
  1728. "if (i <= 16)",
  1729. " res = Sz << i;",
  1730. "else if (i >= 128 - 16)",
  1731. " res = (unsigned) Sz >> (128 - i); /* no sign extension */",
  1732. "else",
  1733. " {",
  1734. " RAISE_EXCEPTION (SIGILL);",
  1735. " return;",
  1736. " }",
  1737. "res &= 0xffff0000;",
  1738. "res_grd = 0;",
  1739. "goto logical;",
  1740. },
  1741. { "","", "psha #<imm>,dz", "00010iiim32.zzzz",
  1742. "int Sz = DSP_R (z);",
  1743. "int Sz_grd = GET_DSP_GRD (z);",
  1744. "",
  1745. "if (i <= 32)",
  1746. " {",
  1747. " if (i == 32)",
  1748. " {",
  1749. " res = 0;",
  1750. " res_grd = Sz;",
  1751. " }",
  1752. " else",
  1753. " {",
  1754. " res = Sz << i;",
  1755. " res_grd = Sz_grd << i | (unsigned) Sz >> (32 - i);",
  1756. " }",
  1757. " res_grd = SEXT (res_grd);",
  1758. " carry = res_grd & 1;",
  1759. " }",
  1760. "else if (i >= 96)",
  1761. " {",
  1762. " i = 128 - i;",
  1763. " if (i == 32)",
  1764. " {",
  1765. " res_grd = SIGN32 (Sz_grd);",
  1766. " res = Sz_grd;",
  1767. " }",
  1768. " else",
  1769. " {",
  1770. " res = Sz >> i | Sz_grd << (32 - i);",
  1771. " res_grd = Sz_grd >> i;",
  1772. " }",
  1773. " carry = Sz >> (i - 1) & 1;",
  1774. " }",
  1775. "else",
  1776. " {",
  1777. " RAISE_EXCEPTION (SIGILL);",
  1778. " return;",
  1779. " }",
  1780. "COMPUTE_OVERFLOW;",
  1781. "greater_equal = 0;",
  1782. },
  1783. { "","", "pmuls Se,Sf,Dg", "0100eeffxxyygguu",
  1784. "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
  1785. "if (res == 0x80000000)",
  1786. " res = 0x7fffffff;",
  1787. "DSP_R (g) = res;",
  1788. "DSP_GRD (g) = SIGN32 (res);",
  1789. "return;",
  1790. },
  1791. { "","", "psub Sx,Sy,Du pmuls Se,Sf,Dg", "0110eeffxxyygguu",
  1792. "int Sx = DSP_R (x);",
  1793. "int Sx_grd = GET_DSP_GRD (x);",
  1794. "int Sy = DSP_R (y);",
  1795. "int Sy_grd = SIGN32 (Sy);",
  1796. "",
  1797. "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
  1798. "if (res == 0x80000000)",
  1799. " res = 0x7fffffff;",
  1800. "DSP_R (g) = res;",
  1801. "DSP_GRD (g) = SIGN32 (res);",
  1802. "",
  1803. "z = u;",
  1804. "res = Sx - Sy;",
  1805. "carry = (unsigned) res > (unsigned) Sx;",
  1806. "res_grd = Sx_grd - Sy_grd - carry;",
  1807. "COMPUTE_OVERFLOW;",
  1808. "ADD_SUB_GE;",
  1809. },
  1810. { "","", "padd Sx,Sy,Du pmuls Se,Sf,Dg", "0111eeffxxyygguu",
  1811. "int Sx = DSP_R (x);",
  1812. "int Sx_grd = GET_DSP_GRD (x);",
  1813. "int Sy = DSP_R (y);",
  1814. "int Sy_grd = SIGN32 (Sy);",
  1815. "",
  1816. "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
  1817. "if (res == 0x80000000)",
  1818. " res = 0x7fffffff;",
  1819. "DSP_R (g) = res;",
  1820. "DSP_GRD (g) = SIGN32 (res);",
  1821. "",
  1822. "z = u;",
  1823. "res = Sx + Sy;",
  1824. "carry = (unsigned) res < (unsigned) Sx;",
  1825. "res_grd = Sx_grd + Sy_grd + carry;",
  1826. "COMPUTE_OVERFLOW;",
  1827. },
  1828. { "","", "psubc Sx,Sy,Dz", "10100000xxyyzzzz",
  1829. "int Sx = DSP_R (x);",
  1830. "int Sx_grd = GET_DSP_GRD (x);",
  1831. "int Sy = DSP_R (y);",
  1832. "int Sy_grd = SIGN32 (Sy);",
  1833. "",
  1834. "res = Sx - Sy - (DSR & 1);",
  1835. "carry = (unsigned) res > (unsigned) Sx || (res == Sx && Sy);",
  1836. "res_grd = Sx_grd + Sy_grd + carry;",
  1837. "COMPUTE_OVERFLOW;",
  1838. "ADD_SUB_GE;",
  1839. "DSR &= ~0xf1;\n",
  1840. "if (res || res_grd)\n",
  1841. " DSR |= greater_equal | (res_grd >> 2 & DSR_MASK_N) | overflow;\n",
  1842. "else\n",
  1843. " DSR |= DSR_MASK_Z | overflow;\n",
  1844. "DSR |= carry;\n",
  1845. "goto assign_z;\n",
  1846. },
  1847. { "","", "paddc Sx,Sy,Dz", "10110000xxyyzzzz",
  1848. "int Sx = DSP_R (x);",
  1849. "int Sx_grd = GET_DSP_GRD (x);",
  1850. "int Sy = DSP_R (y);",
  1851. "int Sy_grd = SIGN32 (Sy);",
  1852. "",
  1853. "res = Sx + Sy + (DSR & 1);",
  1854. "carry = (unsigned) res < (unsigned) Sx || (res == Sx && Sy);",
  1855. "res_grd = Sx_grd + Sy_grd + carry;",
  1856. "COMPUTE_OVERFLOW;",
  1857. "ADD_SUB_GE;",
  1858. "DSR &= ~0xf1;\n",
  1859. "if (res || res_grd)\n",
  1860. " DSR |= greater_equal | (res_grd >> 2 & DSR_MASK_N) | overflow;\n",
  1861. "else\n",
  1862. " DSR |= DSR_MASK_Z | overflow;\n",
  1863. "DSR |= carry;\n",
  1864. "goto assign_z;\n",
  1865. },
  1866. { "","", "pcmp Sx,Sy", "10000100xxyyzzzz",
  1867. "int Sx = DSP_R (x);",
  1868. "int Sx_grd = GET_DSP_GRD (x);",
  1869. "int Sy = DSP_R (y);",
  1870. "int Sy_grd = SIGN32 (Sy);",
  1871. "",
  1872. "z = 17; /* Ignore result. */",
  1873. "res = Sx - Sy;",
  1874. "carry = (unsigned) res > (unsigned) Sx;",
  1875. "res_grd = Sx_grd - Sy_grd - carry;",
  1876. "COMPUTE_OVERFLOW;",
  1877. "ADD_SUB_GE;",
  1878. },
  1879. { "","", "pwsb Sx,Sy,Dz", "10100100xxyyzzzz",
  1880. },
  1881. { "","", "pwad Sx,Sy,Dz", "10110100xxyyzzzz",
  1882. },
  1883. { "","", "(if cc) pabs Sx,Dz", "100010ccxx01zzzz",
  1884. "/* FIXME: duplicate code pabs. */",
  1885. "res = DSP_R (x);",
  1886. "res_grd = GET_DSP_GRD (x);",
  1887. "if (res >= 0)",
  1888. " carry = 0;",
  1889. "else",
  1890. " {",
  1891. " res = -res;",
  1892. " carry = (res != 0); /* The manual has a bug here. */",
  1893. " res_grd = -res_grd - carry;",
  1894. " }",
  1895. "COMPUTE_OVERFLOW;",
  1896. "/* ??? The re-computing of overflow after",
  1897. " saturation processing is specific to pabs. */",
  1898. "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
  1899. "ADD_SUB_GE;",
  1900. },
  1901. { "","", "pabs Sx,Dz", "10001000xx..zzzz",
  1902. "res = DSP_R (x);",
  1903. "res_grd = GET_DSP_GRD (x);",
  1904. "if (res >= 0)",
  1905. " carry = 0;",
  1906. "else",
  1907. " {",
  1908. " res = -res;",
  1909. " carry = (res != 0); /* The manual has a bug here. */",
  1910. " res_grd = -res_grd - carry;",
  1911. " }",
  1912. "COMPUTE_OVERFLOW;",
  1913. "/* ??? The re-computing of overflow after",
  1914. " saturation processing is specific to pabs. */",
  1915. "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
  1916. "ADD_SUB_GE;",
  1917. },
  1918. { "","", "(if cc) prnd Sx,Dz", "100110ccxx01zzzz",
  1919. "/* FIXME: duplicate code prnd. */",
  1920. "int Sx = DSP_R (x);",
  1921. "int Sx_grd = GET_DSP_GRD (x);",
  1922. "",
  1923. "res = (Sx + 0x8000) & 0xffff0000;",
  1924. "carry = (unsigned) res < (unsigned) Sx;",
  1925. "res_grd = Sx_grd + carry;",
  1926. "COMPUTE_OVERFLOW;",
  1927. "ADD_SUB_GE;",
  1928. },
  1929. { "","", "prnd Sx,Dz", "10011000xx..zzzz",
  1930. "int Sx = DSP_R (x);",
  1931. "int Sx_grd = GET_DSP_GRD (x);",
  1932. "",
  1933. "res = (Sx + 0x8000) & 0xffff0000;",
  1934. "carry = (unsigned) res < (unsigned) Sx;",
  1935. "res_grd = Sx_grd + carry;",
  1936. "COMPUTE_OVERFLOW;",
  1937. "ADD_SUB_GE;",
  1938. },
  1939. { "","", "(if cc) pabs Sy,Dz", "101010cc01yyzzzz",
  1940. "/* FIXME: duplicate code pabs. */",
  1941. "res = DSP_R (y);",
  1942. "res_grd = 0;",
  1943. "overflow = 0;",
  1944. "greater_equal = DSR_MASK_G;",
  1945. "if (res >= 0)",
  1946. " carry = 0;",
  1947. "else",
  1948. " {",
  1949. " res = -res;",
  1950. " carry = 1;",
  1951. " if (res < 0)",
  1952. " {",
  1953. " if (S)",
  1954. " res = 0x7fffffff;",
  1955. " else",
  1956. " {",
  1957. " overflow = DSR_MASK_V;",
  1958. " greater_equal = 0;",
  1959. " }",
  1960. " }",
  1961. " }",
  1962. },
  1963. { "","", "pabs Sy,Dz", "10101000..yyzzzz",
  1964. "res = DSP_R (y);",
  1965. "res_grd = 0;",
  1966. "overflow = 0;",
  1967. "greater_equal = DSR_MASK_G;",
  1968. "if (res >= 0)",
  1969. " carry = 0;",
  1970. "else",
  1971. " {",
  1972. " res = -res;",
  1973. " carry = 1;",
  1974. " if (res < 0)",
  1975. " {",
  1976. " if (S)",
  1977. " res = 0x7fffffff;",
  1978. " else",
  1979. " {",
  1980. " overflow = DSR_MASK_V;",
  1981. " greater_equal = 0;",
  1982. " }",
  1983. " }",
  1984. " }",
  1985. },
  1986. { "","", "(if cc) prnd Sy,Dz", "101110cc01yyzzzz",
  1987. "/* FIXME: duplicate code prnd. */",
  1988. "int Sy = DSP_R (y);",
  1989. "int Sy_grd = SIGN32 (Sy);",
  1990. "",
  1991. "res = (Sy + 0x8000) & 0xffff0000;",
  1992. "carry = (unsigned) res < (unsigned) Sy;",
  1993. "res_grd = Sy_grd + carry;",
  1994. "COMPUTE_OVERFLOW;",
  1995. "ADD_SUB_GE;",
  1996. },
  1997. { "","", "prnd Sy,Dz", "10111000..yyzzzz",
  1998. "int Sy = DSP_R (y);",
  1999. "int Sy_grd = SIGN32 (Sy);",
  2000. "",
  2001. "res = (Sy + 0x8000) & 0xffff0000;",
  2002. "carry = (unsigned) res < (unsigned) Sy;",
  2003. "res_grd = Sy_grd + carry;",
  2004. "COMPUTE_OVERFLOW;",
  2005. "ADD_SUB_GE;",
  2006. },
  2007. { "","", "(if cc) pshl Sx,Sy,Dz", "100000ccxxyyzzzz",
  2008. "int Sx = DSP_R (x) & 0xffff0000;",
  2009. "int Sy = DSP_R (y) >> 16 & 0x7f;",
  2010. "",
  2011. "if (Sy <= 16)",
  2012. " res = Sx << Sy;",
  2013. "else if (Sy >= 128 - 16)",
  2014. " res = (unsigned) Sx >> (128 - Sy); /* no sign extension */",
  2015. "else",
  2016. " {",
  2017. " RAISE_EXCEPTION (SIGILL);",
  2018. " return;",
  2019. " }",
  2020. "goto cond_logical;",
  2021. },
  2022. { "","", "(if cc) psha Sx,Sy,Dz", "100100ccxxyyzzzz",
  2023. "int Sx = DSP_R (x);",
  2024. "int Sx_grd = GET_DSP_GRD (x);",
  2025. "int Sy = DSP_R (y) >> 16 & 0x7f;",
  2026. "",
  2027. "if (Sy <= 32)",
  2028. " {",
  2029. " if (Sy == 32)",
  2030. " {",
  2031. " res = 0;",
  2032. " res_grd = Sx;",
  2033. " }",
  2034. " else",
  2035. " {",
  2036. " res = Sx << Sy;",
  2037. " res_grd = Sx_grd << Sy | (unsigned) Sx >> (32 - Sy);",
  2038. " }",
  2039. " res_grd = SEXT (res_grd);",
  2040. " carry = res_grd & 1;",
  2041. " }",
  2042. "else if (Sy >= 96)",
  2043. " {",
  2044. " Sy = 128 - Sy;",
  2045. " if (Sy == 32)",
  2046. " {",
  2047. " res_grd = SIGN32 (Sx_grd);",
  2048. " res = Sx_grd;",
  2049. " }",
  2050. " else",
  2051. " {",
  2052. " res = Sx >> Sy | Sx_grd << (32 - Sy);",
  2053. " res_grd = Sx_grd >> Sy;",
  2054. " }",
  2055. " carry = Sx >> (Sy - 1) & 1;",
  2056. " }",
  2057. "else",
  2058. " {",
  2059. " RAISE_EXCEPTION (SIGILL);",
  2060. " return;",
  2061. " }",
  2062. "COMPUTE_OVERFLOW;",
  2063. "greater_equal = 0;",
  2064. },
  2065. { "","", "(if cc) psub Sx,Sy,Dz", "101000ccxxyyzzzz",
  2066. "int Sx = DSP_R (x);",
  2067. "int Sx_grd = GET_DSP_GRD (x);",
  2068. "int Sy = DSP_R (y);",
  2069. "int Sy_grd = SIGN32 (Sy);",
  2070. "",
  2071. "res = Sx - Sy;",
  2072. "carry = (unsigned) res > (unsigned) Sx;",
  2073. "res_grd = Sx_grd - Sy_grd - carry;",
  2074. "COMPUTE_OVERFLOW;",
  2075. "ADD_SUB_GE;",
  2076. },
  2077. { "","", "(if cc) psub Sy,Sx,Dz", "100001ccxxyyzzzz",
  2078. "int Sx = DSP_R (x);",
  2079. "int Sx_grd = GET_DSP_GRD (x);",
  2080. "int Sy = DSP_R (y);",
  2081. "int Sy_grd = SIGN32 (Sy);",
  2082. "",
  2083. "res = Sy - Sx;",
  2084. "carry = (unsigned) res > (unsigned) Sy;",
  2085. "res_grd = Sy_grd - Sx_grd - carry;",
  2086. "COMPUTE_OVERFLOW;",
  2087. "ADD_SUB_GE;",
  2088. },
  2089. { "","", "(if cc) padd Sx,Sy,Dz", "101100ccxxyyzzzz",
  2090. "int Sx = DSP_R (x);",
  2091. "int Sx_grd = GET_DSP_GRD (x);",
  2092. "int Sy = DSP_R (y);",
  2093. "int Sy_grd = SIGN32 (Sy);",
  2094. "",
  2095. "res = Sx + Sy;",
  2096. "carry = (unsigned) res < (unsigned) Sx;",
  2097. "res_grd = Sx_grd + Sy_grd + carry;",
  2098. "COMPUTE_OVERFLOW;",
  2099. "ADD_SUB_GE;",
  2100. },
  2101. { "","", "(if cc) pand Sx,Sy,Dz", "100101ccxxyyzzzz",
  2102. "res = DSP_R (x) & DSP_R (y);",
  2103. "cond_logical:",
  2104. "res &= 0xffff0000;",
  2105. "res_grd = 0;",
  2106. "if (iword & 0x200)\n",
  2107. " goto assign_z;\n",
  2108. "logical:",
  2109. "carry = 0;",
  2110. "overflow = 0;",
  2111. "greater_equal = 0;",
  2112. "DSR &= ~0xf1;\n",
  2113. "if (res)\n",
  2114. " DSR |= res >> 26 & DSR_MASK_N;\n",
  2115. "else\n",
  2116. " DSR |= DSR_MASK_Z;\n",
  2117. "goto assign_dc;\n",
  2118. },
  2119. { "","", "(if cc) pxor Sx,Sy,Dz", "101001ccxxyyzzzz",
  2120. "res = DSP_R (x) ^ DSP_R (y);",
  2121. "goto cond_logical;",
  2122. },
  2123. { "","", "(if cc) por Sx,Sy,Dz", "101101ccxxyyzzzz",
  2124. "res = DSP_R (x) | DSP_R (y);",
  2125. "goto cond_logical;",
  2126. },
  2127. { "","", "(if cc) pdec Sx,Dz", "100010ccxx..zzzz",
  2128. "int Sx = DSP_R (x);",
  2129. "int Sx_grd = GET_DSP_GRD (x);",
  2130. "",
  2131. "res = Sx - 0x10000;",
  2132. "carry = Sx < (INT_MIN + 0x10000);",
  2133. "res_grd = Sx_grd - carry;",
  2134. "COMPUTE_OVERFLOW;",
  2135. "ADD_SUB_GE;",
  2136. "res &= 0xffff0000;",
  2137. },
  2138. { "","", "(if cc) pinc Sx,Dz", "100110ccxx..zzzz",
  2139. "int Sx = DSP_R (x);",
  2140. "int Sx_grd = GET_DSP_GRD (x);",
  2141. "",
  2142. "res = Sx + 0x10000;",
  2143. "carry = Sx > (INT_MAX - 0x10000);",
  2144. "res_grd = Sx_grd + carry;",
  2145. "COMPUTE_OVERFLOW;",
  2146. "ADD_SUB_GE;",
  2147. "res &= 0xffff0000;",
  2148. },
  2149. { "","", "(if cc) pdec Sy,Dz", "101010cc..yyzzzz",
  2150. "int Sy = DSP_R (y);",
  2151. "int Sy_grd = SIGN32 (Sy);",
  2152. "",
  2153. "res = Sy - 0x10000;",
  2154. "carry = Sy < (INT_MIN + 0x10000);",
  2155. "res_grd = Sy_grd - carry;",
  2156. "COMPUTE_OVERFLOW;",
  2157. "ADD_SUB_GE;",
  2158. "res &= 0xffff0000;",
  2159. },
  2160. { "","", "(if cc) pinc Sy,Dz", "101110cc..yyzzzz",
  2161. "int Sy = DSP_R (y);",
  2162. "int Sy_grd = SIGN32 (Sy);",
  2163. "",
  2164. "res = Sy + 0x10000;",
  2165. "carry = Sy > (INT_MAX - 0x10000);",
  2166. "res_grd = Sy_grd + carry;",
  2167. "COMPUTE_OVERFLOW;",
  2168. "ADD_SUB_GE;",
  2169. "res &= 0xffff0000;",
  2170. },
  2171. { "","", "(if cc) pclr Dz", "100011cc....zzzz",
  2172. "res = 0;",
  2173. "res_grd = 0;",
  2174. "carry = 0;",
  2175. "overflow = 0;",
  2176. "greater_equal = 1;",
  2177. },
  2178. { "","", "pclr Du pmuls Se,Sf,Dg", "0100eeff0001gguu",
  2179. "/* Do multiply. */",
  2180. "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
  2181. "if (res == 0x80000000)",
  2182. " res = 0x7fffffff;",
  2183. "DSP_R (g) = res;",
  2184. "DSP_GRD (g) = SIGN32 (res);",
  2185. "/* FIXME: update DSR based on results of multiply! */",
  2186. "",
  2187. "/* Do clr. */",
  2188. "z = u;",
  2189. "res = 0;",
  2190. "res_grd = 0;",
  2191. "goto assign_z;",
  2192. },
  2193. { "","", "(if cc) pdmsb Sx,Dz", "100111ccxx..zzzz",
  2194. "unsigned Sx = DSP_R (x);",
  2195. "int Sx_grd = GET_DSP_GRD (x);",
  2196. "int i = 16;",
  2197. "",
  2198. "if (Sx_grd < 0)",
  2199. " {",
  2200. " Sx_grd = ~Sx_grd;",
  2201. " Sx = ~Sx;",
  2202. " }",
  2203. "if (Sx_grd)",
  2204. " {",
  2205. " Sx = Sx_grd;",
  2206. " res = -2;",
  2207. " }",
  2208. "else if (Sx)",
  2209. " res = 30;",
  2210. "else",
  2211. " res = 31;",
  2212. "do",
  2213. " {",
  2214. " if (Sx & ~0 << i)",
  2215. " {",
  2216. " res -= i;",
  2217. " Sx >>= i;",
  2218. " }",
  2219. " }",
  2220. "while (i >>= 1);",
  2221. "res <<= 16;",
  2222. "res_grd = SIGN32 (res);",
  2223. "carry = 0;",
  2224. "overflow = 0;",
  2225. "ADD_SUB_GE;",
  2226. },
  2227. { "","", "(if cc) pdmsb Sy,Dz", "101111cc..yyzzzz",
  2228. "unsigned Sy = DSP_R (y);",
  2229. "int i = 16;",
  2230. "",
  2231. "if (Sy < 0)",
  2232. " Sy = ~Sy;",
  2233. "Sy <<= 1;",
  2234. "res = 31;",
  2235. "do",
  2236. " {",
  2237. " if (Sy & ~0 << i)",
  2238. " {",
  2239. " res -= i;",
  2240. " Sy >>= i;",
  2241. " }",
  2242. " }",
  2243. "while (i >>= 1);",
  2244. "res <<= 16;",
  2245. "res_grd = SIGN32 (res);",
  2246. "carry = 0;",
  2247. "overflow = 0;",
  2248. "ADD_SUB_GE;",
  2249. },
  2250. { "","", "(if cc) pneg Sx,Dz", "110010ccxx..zzzz",
  2251. "int Sx = DSP_R (x);",
  2252. "int Sx_grd = GET_DSP_GRD (x);",
  2253. "",
  2254. "res = 0 - Sx;",
  2255. "carry = res != 0;",
  2256. "res_grd = 0 - Sx_grd - carry;",
  2257. "COMPUTE_OVERFLOW;",
  2258. "ADD_SUB_GE;",
  2259. },
  2260. { "","", "(if cc) pcopy Sx,Dz", "110110ccxx..zzzz",
  2261. "res = DSP_R (x);",
  2262. "res_grd = GET_DSP_GRD (x);",
  2263. "carry = 0;",
  2264. "COMPUTE_OVERFLOW;",
  2265. "ADD_SUB_GE;",
  2266. },
  2267. { "","", "(if cc) pneg Sy,Dz", "111010cc..yyzzzz",
  2268. "int Sy = DSP_R (y);",
  2269. "int Sy_grd = SIGN32 (Sy);",
  2270. "",
  2271. "res = 0 - Sy;",
  2272. "carry = res != 0;",
  2273. "res_grd = 0 - Sy_grd - carry;",
  2274. "COMPUTE_OVERFLOW;",
  2275. "ADD_SUB_GE;",
  2276. },
  2277. { "","", "(if cc) pcopy Sy,Dz", "111110cc..yyzzzz",
  2278. "res = DSP_R (y);",
  2279. "res_grd = SIGN32 (res);",
  2280. "carry = 0;",
  2281. "COMPUTE_OVERFLOW;",
  2282. "ADD_SUB_GE;",
  2283. },
  2284. { "","", "(if cc) psts MACH,Dz", "110011cc....zzzz",
  2285. "res = MACH;",
  2286. "res_grd = SIGN32 (res);",
  2287. "goto assign_z;",
  2288. },
  2289. { "","", "(if cc) psts MACL,Dz", "110111cc....zzzz",
  2290. "res = MACL;",
  2291. "res_grd = SIGN32 (res);",
  2292. "goto assign_z;",
  2293. },
  2294. { "","", "(if cc) plds Dz,MACH", "111011cc....zzzz",
  2295. "if (0xa05f >> z & 1)",
  2296. " RAISE_EXCEPTION (SIGILL);",
  2297. "else",
  2298. " MACH = DSP_R (z);",
  2299. "return;",
  2300. },
  2301. { "","", "(if cc) plds Dz,MACL", "111111cc....zzzz",
  2302. "if (0xa05f >> z & 1)",
  2303. " RAISE_EXCEPTION (SIGILL);",
  2304. "else",
  2305. " MACL = DSP_R (z) = res;",
  2306. "return;",
  2307. },
  2308. /* sh4a */
  2309. { "","", "(if cc) pswap Sx,Dz", "100111ccxx01zzzz",
  2310. "int Sx = DSP_R (x);",
  2311. "",
  2312. "res = ((Sx & 0xffff) * 65536) + ((Sx >> 16) & 0xffff);",
  2313. "res_grd = GET_DSP_GRD (x);",
  2314. "carry = 0;",
  2315. "overflow = 0;",
  2316. "greater_equal = res & 0x80000000 ? 0 : DSR_MASK_G;",
  2317. },
  2318. /* sh4a */
  2319. { "","", "(if cc) pswap Sy,Dz", "101111cc01yyzzzz",
  2320. "int Sy = DSP_R (y);",
  2321. "",
  2322. "res = ((Sy & 0xffff) * 65536) + ((Sy >> 16) & 0xffff);",
  2323. "res_grd = SIGN32 (Sy);",
  2324. "carry = 0;",
  2325. "overflow = 0;",
  2326. "greater_equal = res & 0x80000000 ? 0 : DSR_MASK_G;",
  2327. },
  2328. {0, 0}
  2329. };
  2330. /* Tables of things to put into enums for sh-opc.h */
  2331. static
  2332. const char * const nibble_type_list[] =
  2333. {
  2334. "HEX_0",
  2335. "HEX_1",
  2336. "HEX_2",
  2337. "HEX_3",
  2338. "HEX_4",
  2339. "HEX_5",
  2340. "HEX_6",
  2341. "HEX_7",
  2342. "HEX_8",
  2343. "HEX_9",
  2344. "HEX_A",
  2345. "HEX_B",
  2346. "HEX_C",
  2347. "HEX_D",
  2348. "HEX_E",
  2349. "HEX_F",
  2350. "REG_N",
  2351. "REG_M",
  2352. "BRANCH_12",
  2353. "BRANCH_8",
  2354. "DISP_8",
  2355. "DISP_4",
  2356. "IMM_4",
  2357. "IMM_4BY2",
  2358. "IMM_4BY4",
  2359. "PCRELIMM_8BY2",
  2360. "PCRELIMM_8BY4",
  2361. "IMM_8",
  2362. "IMM_8BY2",
  2363. "IMM_8BY4",
  2364. 0
  2365. };
  2366. static
  2367. const char * const arg_type_list[] =
  2368. {
  2369. "A_END",
  2370. "A_BDISP12",
  2371. "A_BDISP8",
  2372. "A_DEC_M",
  2373. "A_DEC_N",
  2374. "A_DISP_GBR",
  2375. "A_DISP_PC",
  2376. "A_DISP_REG_M",
  2377. "A_DISP_REG_N",
  2378. "A_GBR",
  2379. "A_IMM",
  2380. "A_INC_M",
  2381. "A_INC_N",
  2382. "A_IND_M",
  2383. "A_IND_N",
  2384. "A_IND_R0_REG_M",
  2385. "A_IND_R0_REG_N",
  2386. "A_MACH",
  2387. "A_MACL",
  2388. "A_PR",
  2389. "A_R0",
  2390. "A_R0_GBR",
  2391. "A_REG_M",
  2392. "A_REG_N",
  2393. "A_SR",
  2394. "A_VBR",
  2395. "A_SSR",
  2396. "A_SPC",
  2397. 0,
  2398. };
  2399. static int
  2400. qfunc (const void *va, const void *vb)
  2401. {
  2402. const op *a = va;
  2403. const op *b = vb;
  2404. char bufa[9];
  2405. char bufb[9];
  2406. int diff;
  2407. memcpy (bufa, a->code, 4);
  2408. memcpy (bufa + 4, a->code + 12, 4);
  2409. bufa[8] = 0;
  2410. memcpy (bufb, b->code, 4);
  2411. memcpy (bufb + 4, b->code + 12, 4);
  2412. bufb[8] = 0;
  2413. diff = strcmp (bufa, bufb);
  2414. /* Stabilize the sort, so that later entries can override more general
  2415. preceding entries. */
  2416. return diff ? diff : a - b;
  2417. }
  2418. static void
  2419. sorttab (void)
  2420. {
  2421. op *p = tab;
  2422. int len = 0;
  2423. while (p->name)
  2424. {
  2425. p++;
  2426. len++;
  2427. }
  2428. qsort (tab, len, sizeof (*p), qfunc);
  2429. }
  2430. static void
  2431. gengastab (void)
  2432. {
  2433. op *p;
  2434. sorttab ();
  2435. for (p = tab; p->name; p++)
  2436. {
  2437. printf ("%s %-30s\n", p->code, p->name);
  2438. }
  2439. }
  2440. static unsigned short table[1 << 16];
  2441. static int warn_conflicts = 0;
  2442. static void
  2443. conflict_warn (int val, int i)
  2444. {
  2445. int ix, key;
  2446. int j = table[val];
  2447. fprintf (stderr, "Warning: opcode table conflict: 0x%04x (idx %d && %d)\n",
  2448. val, i, table[val]);
  2449. for (ix = ARRAY_SIZE (tab); ix >= 0; ix--)
  2450. if (tab[ix].index == i || tab[ix].index == j)
  2451. {
  2452. key = ((tab[ix].code[0] - '0') << 3) +
  2453. ((tab[ix].code[1] - '0') << 2) +
  2454. ((tab[ix].code[2] - '0') << 1) +
  2455. ((tab[ix].code[3] - '0'));
  2456. if (val >> 12 == key)
  2457. fprintf (stderr, " %s -- %s\n", tab[ix].code, tab[ix].name);
  2458. }
  2459. for (ix = ARRAY_SIZE (movsxy_tab); ix >= 0; ix--)
  2460. if (movsxy_tab[ix].index == i || movsxy_tab[ix].index == j)
  2461. {
  2462. key = ((movsxy_tab[ix].code[0] - '0') << 3) +
  2463. ((movsxy_tab[ix].code[1] - '0') << 2) +
  2464. ((movsxy_tab[ix].code[2] - '0') << 1) +
  2465. ((movsxy_tab[ix].code[3] - '0'));
  2466. if (val >> 12 == key)
  2467. fprintf (stderr, " %s -- %s\n",
  2468. movsxy_tab[ix].code, movsxy_tab[ix].name);
  2469. }
  2470. for (ix = ARRAY_SIZE (ppi_tab); ix >= 0; ix--)
  2471. if (ppi_tab[ix].index == i || ppi_tab[ix].index == j)
  2472. {
  2473. key = ((ppi_tab[ix].code[0] - '0') << 3) +
  2474. ((ppi_tab[ix].code[1] - '0') << 2) +
  2475. ((ppi_tab[ix].code[2] - '0') << 1) +
  2476. ((ppi_tab[ix].code[3] - '0'));
  2477. if (val >> 12 == key)
  2478. fprintf (stderr, " %s -- %s\n",
  2479. ppi_tab[ix].code, ppi_tab[ix].name);
  2480. }
  2481. }
  2482. /* Take an opcode, expand all varying fields in it out and fill all the
  2483. right entries in 'table' with the opcode index. */
  2484. static void
  2485. expand_opcode (int val, int i, const char *s)
  2486. {
  2487. if (*s == 0)
  2488. {
  2489. if (warn_conflicts && table[val] != 0)
  2490. conflict_warn (val, i);
  2491. table[val] = i;
  2492. }
  2493. else
  2494. {
  2495. int j = 0, m = 0;
  2496. switch (s[0])
  2497. {
  2498. default:
  2499. fprintf (stderr, "expand_opcode: illegal char '%c'\n", s[0]);
  2500. exit (1);
  2501. case '0':
  2502. case '1':
  2503. /* Consume an arbitrary number of ones and zeros. */
  2504. do {
  2505. j = (j << 1) + (s[m++] - '0');
  2506. } while (s[m] == '0' || s[m] == '1');
  2507. expand_opcode ((val << m) | j, i, s + m);
  2508. break;
  2509. case 'N': /* NN -- four-way fork */
  2510. for (j = 0; j < 4; j++)
  2511. expand_opcode ((val << 2) | j, i, s + 2);
  2512. break;
  2513. case 'x': /* xx or xy -- two-way or four-way fork */
  2514. for (j = 0; j < 4; j += (s[1] == 'x' ? 2 : 1))
  2515. expand_opcode ((val << 2) | j, i, s + 2);
  2516. break;
  2517. case 'y': /* yy or yx -- two-way or four-way fork */
  2518. for (j = 0; j < (s[1] == 'x' ? 4 : 2); j++)
  2519. expand_opcode ((val << 2) | j, i, s + 2);
  2520. break;
  2521. case '?': /* Seven-way "wildcard" fork for movxy */
  2522. expand_opcode ((val << 2), i, s + 2);
  2523. for (j = 1; j < 4; j++)
  2524. {
  2525. expand_opcode ((val << 2) | j, i, s + 2);
  2526. expand_opcode ((val << 2) | (j + 16), i, s + 2);
  2527. }
  2528. break;
  2529. case 'i': /* eg. "i8*1" */
  2530. case '.': /* "...." is a wildcard */
  2531. case 'n':
  2532. case 'm':
  2533. /* nnnn, mmmm, i#*#, .... -- 16-way fork. */
  2534. for (j = 0; j < 16; j++)
  2535. expand_opcode ((val << 4) | j, i, s + 4);
  2536. break;
  2537. case 'e':
  2538. /* eeee -- even numbered register:
  2539. 8 way fork. */
  2540. for (j = 0; j < 15; j += 2)
  2541. expand_opcode ((val << 4) | j, i, s + 4);
  2542. break;
  2543. case 'M':
  2544. /* A0, A1, X0, X1, Y0, Y1, M0, M1, A0G, A1G:
  2545. MMMM -- 10-way fork */
  2546. expand_opcode ((val << 4) | 5, i, s + 4);
  2547. for (j = 7; j < 16; j++)
  2548. expand_opcode ((val << 4) | j, i, s + 4);
  2549. break;
  2550. case 'G':
  2551. /* A1G, A0G:
  2552. GGGG -- two-way fork */
  2553. for (j = 13; j <= 15; j +=2)
  2554. expand_opcode ((val << 4) | j, i, s + 4);
  2555. break;
  2556. case 's':
  2557. /* ssss -- 10-way fork */
  2558. /* System registers mach, macl, pr: */
  2559. for (j = 0; j < 3; j++)
  2560. expand_opcode ((val << 4) | j, i, s + 4);
  2561. /* System registers fpul, fpscr/dsr, a0, x0, x1, y0, y1: */
  2562. for (j = 5; j < 12; j++)
  2563. expand_opcode ((val << 4) | j, i, s + 4);
  2564. break;
  2565. case 'X':
  2566. /* XX/XY -- 2/4 way fork. */
  2567. for (j = 0; j < 4; j += (s[1] == 'X' ? 2 : 1))
  2568. expand_opcode ((val << 2) | j, i, s + 2);
  2569. break;
  2570. case 'a':
  2571. /* aa/ax -- 2/4 way fork. */
  2572. for (j = 0; j < 4; j += (s[1] == 'a' ? 2 : 1))
  2573. expand_opcode ((val << 2) | j, i, s + 2);
  2574. break;
  2575. case 'Y':
  2576. /* YY/YX -- 2/4 way fork. */
  2577. for (j = 0; j < (s[1] == 'Y' ? 2 : 4); j += 1)
  2578. expand_opcode ((val << 2) | j, i, s + 2);
  2579. break;
  2580. case 'A':
  2581. /* AA/AY: 2/4 way fork. */
  2582. for (j = 0; j < (s[1] == 'A' ? 2 : 4); j += 1)
  2583. expand_opcode ((val << 2) | j, i, s + 2);
  2584. break;
  2585. case 'v':
  2586. /* vv(VV) -- 4(16) way fork. */
  2587. /* Vector register fv0/4/8/12. */
  2588. if (s[2] == 'V')
  2589. {
  2590. /* 2 vector registers. */
  2591. for (j = 0; j < 15; j++)
  2592. expand_opcode ((val << 4) | j, i, s + 4);
  2593. }
  2594. else
  2595. {
  2596. /* 1 vector register. */
  2597. for (j = 0; j < 4; j += 1)
  2598. expand_opcode ((val << 2) | j, i, s + 2);
  2599. }
  2600. break;
  2601. }
  2602. }
  2603. }
  2604. /* Print the jump table used to index an opcode into a switch
  2605. statement entry. */
  2606. static void
  2607. dumptable (const char *name, int size, int start)
  2608. {
  2609. int lump = 256;
  2610. int online = 16;
  2611. int i = start;
  2612. printf ("unsigned short %s[%d]={\n", name, size);
  2613. while (i < start + size)
  2614. {
  2615. int j = 0;
  2616. printf ("/* 0x%x */\n", i);
  2617. while (j < lump)
  2618. {
  2619. int k = 0;
  2620. while (k < online)
  2621. {
  2622. printf ("%2d", table[i + j + k]);
  2623. if (j + k < lump)
  2624. printf (",");
  2625. k++;
  2626. }
  2627. j += k;
  2628. printf ("\n");
  2629. }
  2630. i += j;
  2631. }
  2632. printf ("};\n");
  2633. }
  2634. static void
  2635. filltable (op *p)
  2636. {
  2637. static int index = 1;
  2638. sorttab ();
  2639. for (; p->name; p++)
  2640. {
  2641. p->index = index++;
  2642. expand_opcode (0, p->index, p->code);
  2643. }
  2644. }
  2645. /* Table already contains all the switch case tags for 16-bit opcode double
  2646. data transfer (ddt) insns, and the switch case tag for processing parallel
  2647. processing insns (ppi) for code 0xf800 (ppi nopx nopy). Copy the
  2648. latter tag to represent all combinations of ppi with ddt. */
  2649. static void
  2650. expand_ppi_movxy (void)
  2651. {
  2652. int i;
  2653. for (i = 0xf000; i < 0xf400; i++)
  2654. if (table[i])
  2655. table[i + 0x800] = table[0xf800];
  2656. }
  2657. static void
  2658. gensim_caselist (op *p)
  2659. {
  2660. for (; p->name; p++)
  2661. {
  2662. int j;
  2663. int sextbit = -1;
  2664. int needm = 0;
  2665. int needn = 0;
  2666. const char *s = p->code;
  2667. printf (" /* %s %s */\n", p->name, p->code);
  2668. printf (" case %d: \n", p->index);
  2669. printf (" {\n");
  2670. while (*s)
  2671. {
  2672. switch (*s)
  2673. {
  2674. default:
  2675. fprintf (stderr, "gencode/gensim_caselist: illegal char '%c'\n",
  2676. *s);
  2677. exit (1);
  2678. break;
  2679. case '?':
  2680. /* Wildcard expansion, nothing to do here. */
  2681. s += 2;
  2682. break;
  2683. case 'v':
  2684. printf (" int v1 = ((iword >> 10) & 3) * 4;\n");
  2685. s += 2;
  2686. break;
  2687. case 'V':
  2688. printf (" int v2 = ((iword >> 8) & 3) * 4;\n");
  2689. s += 2;
  2690. break;
  2691. case '0':
  2692. case '1':
  2693. s += 2;
  2694. break;
  2695. case '.':
  2696. s += 4;
  2697. break;
  2698. case 'n':
  2699. case 'e':
  2700. printf (" int n = (iword >> 8) & 0xf;\n");
  2701. needn = 1;
  2702. s += 4;
  2703. break;
  2704. case 'N':
  2705. printf (" int n = (((iword >> 8) - 2) & 0x3) + 2;\n");
  2706. s += 2;
  2707. break;
  2708. case 'x':
  2709. if (s[1] == 'y') /* xy */
  2710. {
  2711. printf (" int n = (iword & 3) ? \n");
  2712. printf (" ((iword >> 9) & 1) + 4 : \n");
  2713. printf (" REG_xy ((iword >> 8) & 3);\n");
  2714. }
  2715. else
  2716. printf (" int n = ((iword >> 9) & 1) + 4;\n");
  2717. needn = 1;
  2718. s += 2;
  2719. break;
  2720. case 'y':
  2721. if (s[1] == 'x') /* yx */
  2722. {
  2723. printf (" int n = (iword & 0xc) ? \n");
  2724. printf (" ((iword >> 8) & 1) + 6 : \n");
  2725. printf (" REG_yx ((iword >> 8) & 3);\n");
  2726. }
  2727. else
  2728. printf (" int n = ((iword >> 8) & 1) + 6;\n");
  2729. needn = 1;
  2730. s += 2;
  2731. break;
  2732. case 'm':
  2733. needm = 1;
  2734. case 's':
  2735. case 'M':
  2736. case 'G':
  2737. printf (" int m = (iword >> 4) & 0xf;\n");
  2738. s += 4;
  2739. break;
  2740. case 'X':
  2741. if (s[1] == 'Y') /* XY */
  2742. {
  2743. printf (" int m = (iword & 3) ? \n");
  2744. printf (" ((iword >> 7) & 1) + 8 : \n");
  2745. printf (" DSP_xy ((iword >> 6) & 3);\n");
  2746. }
  2747. else
  2748. printf (" int m = ((iword >> 7) & 1) + 8;\n");
  2749. s += 2;
  2750. break;
  2751. case 'a':
  2752. if (s[1] == 'x') /* ax */
  2753. {
  2754. printf (" int m = (iword & 3) ? \n");
  2755. printf (" 7 - ((iword >> 6) & 2) : \n");
  2756. printf (" DSP_ax ((iword >> 6) & 3);\n");
  2757. }
  2758. else
  2759. printf (" int m = 7 - ((iword >> 6) & 2);\n");
  2760. s += 2;
  2761. break;
  2762. case 'Y':
  2763. if (s[1] == 'X') /* YX */
  2764. {
  2765. printf (" int m = (iword & 0xc) ? \n");
  2766. printf (" ((iword >> 6) & 1) + 10 : \n");
  2767. printf (" DSP_yx ((iword >> 6) & 3);\n");
  2768. }
  2769. else
  2770. printf (" int m = ((iword >> 6) & 1) + 10;\n");
  2771. s += 2;
  2772. break;
  2773. case 'A':
  2774. if (s[1] == 'Y') /* AY */
  2775. {
  2776. printf (" int m = (iword & 0xc) ? \n");
  2777. printf (" 7 - ((iword >> 5) & 2) : \n");
  2778. printf (" DSP_ay ((iword >> 6) & 3);\n");
  2779. }
  2780. else
  2781. printf (" int m = 7 - ((iword >> 5) & 2);\n");
  2782. s += 2;
  2783. break;
  2784. case 'i':
  2785. printf (" int i = (iword & 0x");
  2786. switch (s[1])
  2787. {
  2788. default:
  2789. fprintf (stderr,
  2790. "gensim_caselist: Unknown char '%c' in %s\n",
  2791. s[1], s);
  2792. exit (1);
  2793. break;
  2794. case '4':
  2795. printf ("f");
  2796. break;
  2797. case '8':
  2798. printf ("ff");
  2799. break;
  2800. case '1':
  2801. sextbit = 12;
  2802. printf ("fff");
  2803. break;
  2804. }
  2805. printf (")");
  2806. switch (s[3])
  2807. {
  2808. default:
  2809. fprintf (stderr,
  2810. "gensim_caselist: Unknown char '%c' in %s\n",
  2811. s[3], s);
  2812. exit (1);
  2813. break;
  2814. case '.': /* eg. "i12." */
  2815. break;
  2816. case '1':
  2817. break;
  2818. case '2':
  2819. printf (" << 1");
  2820. break;
  2821. case '4':
  2822. printf (" << 2");
  2823. break;
  2824. }
  2825. printf (";\n");
  2826. s += 4;
  2827. }
  2828. }
  2829. if (sextbit > 0)
  2830. {
  2831. printf (" i = (i ^ (1 << %d)) - (1 << %d);\n",
  2832. sextbit - 1, sextbit - 1);
  2833. }
  2834. if (needm && needn)
  2835. printf (" TB (m,n);\n");
  2836. else if (needm)
  2837. printf (" TL (m);\n");
  2838. else if (needn)
  2839. printf (" TL (n);\n");
  2840. {
  2841. /* Do the refs. */
  2842. const char *r;
  2843. for (r = p->refs; *r; r++)
  2844. {
  2845. if (*r == 'f') printf (" CREF (15);\n");
  2846. if (*r == '-')
  2847. {
  2848. printf (" {\n");
  2849. printf (" int i = n;\n");
  2850. printf (" do {\n");
  2851. printf (" CREF (i);\n");
  2852. printf (" } while (i-- > 0);\n");
  2853. printf (" }\n");
  2854. }
  2855. if (*r == '+')
  2856. {
  2857. printf (" {\n");
  2858. printf (" int i = n;\n");
  2859. printf (" do {\n");
  2860. printf (" CREF (i);\n");
  2861. printf (" } while (i++ < 14);\n");
  2862. printf (" }\n");
  2863. }
  2864. if (*r == '0') printf (" CREF (0);\n");
  2865. if (*r == '8') printf (" CREF (8);\n");
  2866. if (*r == '9') printf (" CREF (9);\n");
  2867. if (*r == 'n') printf (" CREF (n);\n");
  2868. if (*r == 'm') printf (" CREF (m);\n");
  2869. }
  2870. }
  2871. printf (" {\n");
  2872. for (j = 0; j < MAX_NR_STUFF; j++)
  2873. {
  2874. if (p->stuff[j])
  2875. {
  2876. printf (" %s\n", p->stuff[j]);
  2877. }
  2878. }
  2879. printf (" }\n");
  2880. {
  2881. /* Do the defs. */
  2882. const char *r;
  2883. for (r = p->defs; *r; r++)
  2884. {
  2885. if (*r == 'f') printf (" CDEF (15);\n");
  2886. if (*r == '-')
  2887. {
  2888. printf (" {\n");
  2889. printf (" int i = n;\n");
  2890. printf (" do {\n");
  2891. printf (" CDEF (i);\n");
  2892. printf (" } while (i-- > 0);\n");
  2893. printf (" }\n");
  2894. }
  2895. if (*r == '+')
  2896. {
  2897. printf (" {\n");
  2898. printf (" int i = n;\n");
  2899. printf (" do {\n");
  2900. printf (" CDEF (i);\n");
  2901. printf (" } while (i++ < 14);\n");
  2902. printf (" }\n");
  2903. }
  2904. if (*r == '0') printf (" CDEF (0);\n");
  2905. if (*r == 'n') printf (" CDEF (n);\n");
  2906. if (*r == 'm') printf (" CDEF (m);\n");
  2907. }
  2908. }
  2909. printf (" break;\n");
  2910. printf (" }\n");
  2911. }
  2912. }
  2913. static void
  2914. gensim (void)
  2915. {
  2916. printf ("{\n");
  2917. printf ("/* REG_xy = [r4, r5, r0, r1]. */\n");
  2918. printf ("#define REG_xy(R) ((R)==0 ? 4 : (R)==2 ? 5 : (R)==1 ? 0 : 1)\n");
  2919. printf ("/* REG_yx = [r6, r7, r2, r3]. */\n");
  2920. printf ("#define REG_yx(R) ((R)==0 ? 6 : (R)==1 ? 7 : (R)==2 ? 2 : 3)\n");
  2921. printf ("/* DSP_ax = [a0, a1, x0, x1]. */\n");
  2922. printf ("#define DSP_ax(R) ((R)==0 ? 7 : (R)==2 ? 5 : (R)==1 ? 8 : 9)\n");
  2923. printf ("/* DSP_ay = [a0, a1, y0, y1]. */\n");
  2924. printf ("#define DSP_ay(R) ((R)==0 ? 7 : (R)==1 ? 5 : (R)==2 ? 10 : 11)\n");
  2925. printf ("/* DSP_xy = [x0, x1, y0, y1]. */\n");
  2926. printf ("#define DSP_xy(R) ((R)==0 ? 8 : (R)==2 ? 9 : (R)==1 ? 10 : 11)\n");
  2927. printf ("/* DSP_yx = [y0, y1, x0, x1]. */\n");
  2928. printf ("#define DSP_yx(R) ((R)==0 ? 10 : (R)==1 ? 11 : (R)==2 ? 8 : 9)\n");
  2929. printf (" switch (jump_table[iword]) {\n");
  2930. gensim_caselist (tab);
  2931. gensim_caselist (movsxy_tab);
  2932. printf (" default:\n");
  2933. printf (" {\n");
  2934. printf (" RAISE_EXCEPTION (SIGILL);\n");
  2935. printf (" }\n");
  2936. printf (" }\n");
  2937. printf ("}\n");
  2938. }
  2939. static void
  2940. gendefines (void)
  2941. {
  2942. op *p;
  2943. filltable (tab);
  2944. for (p = tab; p->name; p++)
  2945. {
  2946. const char *s = p->name;
  2947. printf ("#define OPC_");
  2948. while (*s) {
  2949. if (isalpha (*s))
  2950. printf ("%c", tolower (*s));
  2951. if (*s == ' ')
  2952. printf ("_");
  2953. if (*s == '@')
  2954. printf ("ind_");
  2955. if (*s == ',')
  2956. printf ("_");
  2957. s++;
  2958. }
  2959. printf (" %d\n",p->index);
  2960. }
  2961. }
  2962. static int ppi_index;
  2963. /* Take a ppi code, expand all varying fields in it and fill all the
  2964. right entries in 'table' with the opcode index.
  2965. NOTE: tail recursion optimization removed for simplicity. */
  2966. static void
  2967. expand_ppi_code (int val, int i, const char *s)
  2968. {
  2969. int j;
  2970. switch (s[0])
  2971. {
  2972. default:
  2973. fprintf (stderr, "gencode/expand_ppi_code: Illegal char '%c'\n", s[0]);
  2974. exit (2);
  2975. break;
  2976. case 'g':
  2977. case 'z':
  2978. if (warn_conflicts && table[val] != 0)
  2979. conflict_warn (val, i);
  2980. /* The last four bits are disregarded for the switch table. */
  2981. table[val] = i;
  2982. return;
  2983. case 'm':
  2984. /* Four-bit expansion. */
  2985. for (j = 0; j < 16; j++)
  2986. expand_ppi_code ((val << 4) + j, i, s + 4);
  2987. break;
  2988. case '.':
  2989. case '0':
  2990. expand_ppi_code ((val << 1), i, s + 1);
  2991. break;
  2992. case '1':
  2993. expand_ppi_code ((val << 1) + 1, i, s + 1);
  2994. break;
  2995. case 'i':
  2996. case 'e': case 'f':
  2997. case 'x': case 'y':
  2998. expand_ppi_code ((val << 1), i, s + 1);
  2999. expand_ppi_code ((val << 1) + 1, i, s + 1);
  3000. break;
  3001. case 'c':
  3002. expand_ppi_code ((val << 2) + 1, ppi_index++, s + 2);
  3003. expand_ppi_code ((val << 2) + 2, i, s + 2);
  3004. expand_ppi_code ((val << 2) + 3, i, s + 2);
  3005. break;
  3006. }
  3007. }
  3008. static void
  3009. ppi_filltable (void)
  3010. {
  3011. op *p;
  3012. ppi_index = 1;
  3013. for (p = ppi_tab; p->name; p++)
  3014. {
  3015. p->index = ppi_index++;
  3016. expand_ppi_code (0, p->index, p->code);
  3017. }
  3018. }
  3019. static void
  3020. ppi_gensim (void)
  3021. {
  3022. op *p = ppi_tab;
  3023. printf ("#define DSR_MASK_G 0x80\n");
  3024. printf ("#define DSR_MASK_Z 0x40\n");
  3025. printf ("#define DSR_MASK_N 0x20\n");
  3026. printf ("#define DSR_MASK_V 0x10\n");
  3027. printf ("\n");
  3028. printf ("#define COMPUTE_OVERFLOW do {\\\n");
  3029. printf (" overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0; \\\n");
  3030. printf (" if (overflow && S) \\\n");
  3031. printf (" { \\\n");
  3032. printf (" if (res_grd & 0x80) \\\n");
  3033. printf (" { \\\n");
  3034. printf (" res = 0x80000000; \\\n");
  3035. printf (" res_grd |= 0xff; \\\n");
  3036. printf (" } \\\n");
  3037. printf (" else \\\n");
  3038. printf (" { \\\n");
  3039. printf (" res = 0x7fffffff; \\\n");
  3040. printf (" res_grd &= ~0xff; \\\n");
  3041. printf (" } \\\n");
  3042. printf (" overflow = 0; \\\n");
  3043. printf (" } \\\n");
  3044. printf ("} while (0)\n");
  3045. printf ("\n");
  3046. printf ("#define ADD_SUB_GE \\\n");
  3047. printf (" (greater_equal = ~(overflow << 3 & res_grd) & DSR_MASK_G)\n");
  3048. printf ("\n");
  3049. printf ("static void\n");
  3050. printf ("ppi_insn (int iword)\n");
  3051. printf ("{\n");
  3052. printf (" /* 'ee' = [x0, x1, y0, a1] */\n");
  3053. printf (" static char const e_tab[] = { 8, 9, 10, 5};\n");
  3054. printf (" /* 'ff' = [y0, y1, x0, a1] */\n");
  3055. printf (" static char const f_tab[] = {10, 11, 8, 5};\n");
  3056. printf (" /* 'xx' = [x0, x1, a0, a1] */\n");
  3057. printf (" static char const x_tab[] = { 8, 9, 7, 5};\n");
  3058. printf (" /* 'yy' = [y0, y1, m0, m1] */\n");
  3059. printf (" static char const y_tab[] = {10, 11, 12, 14};\n");
  3060. printf (" /* 'gg' = [m0, m1, a0, a1] */\n");
  3061. printf (" static char const g_tab[] = {12, 14, 7, 5};\n");
  3062. printf (" /* 'uu' = [x0, y0, a0, a1] */\n");
  3063. printf (" static char const u_tab[] = { 8, 10, 7, 5};\n");
  3064. printf ("\n");
  3065. printf (" int z;\n");
  3066. printf (" int res, res_grd;\n");
  3067. printf (" int carry, overflow, greater_equal;\n");
  3068. printf ("\n");
  3069. printf (" switch (ppi_table[iword >> 4]) {\n");
  3070. for (; p->name; p++)
  3071. {
  3072. int shift, j;
  3073. int cond = 0;
  3074. int havedecl = 0;
  3075. const char *s = p->code;
  3076. printf (" /* %s %s */\n", p->name, p->code);
  3077. printf (" case %d: \n", p->index);
  3078. printf (" {\n");
  3079. for (shift = 16; *s; )
  3080. {
  3081. switch (*s)
  3082. {
  3083. case 'i':
  3084. printf (" int i = (iword >> 4) & 0x7f;\n");
  3085. s += 6;
  3086. break;
  3087. case 'e':
  3088. case 'f':
  3089. case 'x':
  3090. case 'y':
  3091. case 'g':
  3092. case 'u':
  3093. shift -= 2;
  3094. printf (" int %c = %c_tab[(iword >> %d) & 3];\n",
  3095. *s, *s, shift);
  3096. havedecl = 1;
  3097. s += 2;
  3098. break;
  3099. case 'c':
  3100. printf (" if ((((iword >> 8) ^ DSR) & 1) == 0)\n");
  3101. printf ("\treturn;\n");
  3102. printf (" }\n");
  3103. printf (" case %d: \n", p->index + 1);
  3104. printf (" {\n");
  3105. cond = 1;
  3106. case '0':
  3107. case '1':
  3108. case '.':
  3109. shift -= 2;
  3110. s += 2;
  3111. break;
  3112. case 'z':
  3113. if (havedecl)
  3114. printf ("\n");
  3115. printf (" z = iword & 0xf;\n");
  3116. havedecl = 2;
  3117. s += 4;
  3118. break;
  3119. }
  3120. }
  3121. if (havedecl == 1)
  3122. printf ("\n");
  3123. else if (havedecl == 2)
  3124. printf (" {\n");
  3125. for (j = 0; j < MAX_NR_STUFF; j++)
  3126. {
  3127. if (p->stuff[j])
  3128. {
  3129. printf (" %s%s\n",
  3130. (havedecl == 2 ? " " : ""),
  3131. p->stuff[j]);
  3132. }
  3133. }
  3134. if (havedecl == 2)
  3135. printf (" }\n");
  3136. if (cond)
  3137. {
  3138. printf (" if (iword & 0x200)\n");
  3139. printf (" goto assign_z;\n");
  3140. }
  3141. printf (" break;\n");
  3142. printf (" }\n");
  3143. }
  3144. printf (" default:\n");
  3145. printf (" {\n");
  3146. printf (" RAISE_EXCEPTION (SIGILL);\n");
  3147. printf (" return;\n");
  3148. printf (" }\n");
  3149. printf (" }\n");
  3150. printf (" DSR &= ~0xf1;\n");
  3151. printf (" if (res || res_grd)\n");
  3152. printf (" DSR |= greater_equal | (res_grd >> 2 & DSR_MASK_N) | overflow;\n");
  3153. printf (" else\n");
  3154. printf (" DSR |= DSR_MASK_Z | overflow;\n");
  3155. printf (" assign_dc:\n");
  3156. printf (" switch (DSR >> 1 & 7)\n");
  3157. printf (" {\n");
  3158. printf (" case 0: /* Carry Mode */\n");
  3159. printf (" DSR |= carry;\n");
  3160. printf (" case 1: /* Negative Value Mode */\n");
  3161. printf (" DSR |= res_grd >> 7 & 1;\n");
  3162. printf (" case 2: /* Zero Value Mode */\n");
  3163. printf (" DSR |= DSR >> 6 & 1;\n");
  3164. printf (" case 3: /* Overflow mode */\n");
  3165. printf (" DSR |= overflow >> 4;\n");
  3166. printf (" case 4: /* Signed Greater Than Mode */\n");
  3167. printf (" DSR |= DSR >> 7 & 1;\n");
  3168. printf (" case 5: /* Signed Greater Than Or Equal Mode */\n");
  3169. printf (" DSR |= greater_equal >> 7;\n");
  3170. printf (" }\n");
  3171. printf (" assign_z:\n");
  3172. printf (" if (0xa05f >> z & 1)\n");
  3173. printf (" {\n");
  3174. printf (" RAISE_EXCEPTION (SIGILL);\n");
  3175. printf (" return;\n");
  3176. printf (" }\n");
  3177. printf (" DSP_R (z) = res;\n");
  3178. printf (" DSP_GRD (z) = res_grd;\n");
  3179. printf ("}\n");
  3180. }
  3181. int
  3182. main (int ac, char *av[])
  3183. {
  3184. /* Verify the table before anything else. */
  3185. {
  3186. op *p;
  3187. for (p = tab; p->name; p++)
  3188. {
  3189. /* Check that the code field contains 16 bits. */
  3190. if (strlen (p->code) != 16)
  3191. {
  3192. fprintf (stderr, "Code `%s' length wrong (%zu) for `%s'\n",
  3193. p->code, strlen (p->code), p->name);
  3194. abort ();
  3195. }
  3196. }
  3197. }
  3198. /* Now generate the requested data. */
  3199. if (ac > 1)
  3200. {
  3201. if (ac > 2 && strcmp (av[2], "-w") == 0)
  3202. {
  3203. warn_conflicts = 1;
  3204. }
  3205. if (strcmp (av[1], "-t") == 0)
  3206. {
  3207. gengastab ();
  3208. }
  3209. else if (strcmp (av[1], "-d") == 0)
  3210. {
  3211. gendefines ();
  3212. }
  3213. else if (strcmp (av[1], "-s") == 0)
  3214. {
  3215. filltable (tab);
  3216. dumptable ("sh_jump_table", 1 << 16, 0);
  3217. memset (table, 0, sizeof table);
  3218. filltable (movsxy_tab);
  3219. expand_ppi_movxy ();
  3220. dumptable ("sh_dsp_table", 1 << 12, 0xf000);
  3221. memset (table, 0, sizeof table);
  3222. ppi_filltable ();
  3223. dumptable ("ppi_table", 1 << 12, 0);
  3224. }
  3225. else if (strcmp (av[1], "-x") == 0)
  3226. {
  3227. filltable (tab);
  3228. filltable (movsxy_tab);
  3229. gensim ();
  3230. }
  3231. else if (strcmp (av[1], "-p") == 0)
  3232. {
  3233. ppi_filltable ();
  3234. ppi_gensim ();
  3235. }
  3236. }
  3237. else
  3238. fprintf (stderr, "Opcode table generation no longer supported.\n");
  3239. return 0;
  3240. }