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c_dsp32shift_expexp_r.s

c_dsp32shift_expexp_r.s 5.1 KB
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  1. //Original:/testcases/core/c_dsp32shift_expexp_r/c_dsp32shift_expexp_r.dsp
    2. 

  2. // Spec Reference: dsp32shift expadj / expadj r
    3. 

  3. # mach: bfin
    4. 

  4. 

  5. .include "testutils.inc"
    6. 

  6. 	start
    7. 

  7. 

  8. 

  9. 

  10. 

  11. imm32 r0, 0x0800d001;
    12. 

  12. imm32 r1, 0x08000001;
    13. 

  13. imm32 r2, 0x0800d002;
    14. 

  14. imm32 r3, 0x0800d003;
    15. 

  15. imm32 r4, 0x0800d004;
    16. 

  16. imm32 r5, 0x0800d005;
    17. 

  17. imm32 r6, 0x0800d006;
    18. 

  18. imm32 r7, 0x0800d007;
    19. 

  19. R1.L = EXPADJ( R1 , R0.L ) (V);
    20. 

  20. R2.L = EXPADJ( R2 , R0.L ) (V);
    21. 

  21. R3.L = EXPADJ( R3 , R0.L ) (V);
    22. 

  22. R4.L = EXPADJ( R4 , R0.L ) (V);
    23. 

  23. R5.L = EXPADJ( R5 , R0.L ) (V);
    24. 

  24. R6.L = EXPADJ( R6 , R0.L ) (V);
    25. 

  25. R7.L = EXPADJ( R7 , R0.L ) (V);
    26. 

  26. R0.L = EXPADJ( R0 , R0.L ) (V);
    27. 

  27. CHECKREG r0, 0x0800D001;
    28. 

  28. CHECKREG r1, 0x0800D001;
    29. 

  29. CHECKREG r2, 0x0800D001;
    30. 

  30. CHECKREG r3, 0x0800D001;
    31. 

  31. CHECKREG r4, 0x0800D001;
    32. 

  32. CHECKREG r5, 0x0800D001;
    33. 

  33. CHECKREG r6, 0x0800D001;
    34. 

  34. CHECKREG r7, 0x0800D001;
    35. 

  35. 

  36. imm32 r0, 0x0900d001;
    37. 

  37. imm32 r1, 0x09000001;
    38. 

  38. imm32 r2, 0x0900d002;
    39. 

  39. imm32 r3, 0x0900d003;
    40. 

  40. imm32 r4, 0x0900d004;
    41. 

  41. imm32 r5, 0x0900d005;
    42. 

  42. imm32 r6, 0x0900d006;
    43. 

  43. imm32 r7, 0x0900d007;
    44. 

  44. R0.L = EXPADJ( R0 , R1.L ) (V);
    45. 

  45. R1.L = EXPADJ( R1 , R1.L ) (V);
    46. 

  46. R2.L = EXPADJ( R2 , R1.L ) (V);
    47. 

  47. R3.L = EXPADJ( R3 , R1.L ) (V);
    48. 

  48. R4.L = EXPADJ( R4 , R1.L ) (V);
    49. 

  49. R5.L = EXPADJ( R5 , R1.L ) (V);
    50. 

  50. R6.L = EXPADJ( R6 , R1.L ) (V);
    51. 

  51. R7.L = EXPADJ( R7 , R1.L ) (V);
    52. 

  52. CHECKREG r0, 0x09000001;
    53. 

  53. CHECKREG r1, 0x09000001;
    54. 

  54. CHECKREG r2, 0x09000001;
    55. 

  55. CHECKREG r3, 0x09000001;
    56. 

  56. CHECKREG r4, 0x09000001;
    57. 

  57. CHECKREG r5, 0x09000001;
    58. 

  58. CHECKREG r6, 0x09000001;
    59. 

  59. CHECKREG r7, 0x09000001;
    60. 

  60. 

  61. 

  62. imm32 r0, 0x0a00e001;
    63. 

  63. imm32 r1, 0x0a00e001;
    64. 

  64. imm32 r2, 0x0a00000f;
    65. 

  65. imm32 r3, 0x0a00e003;
    66. 

  66. imm32 r4, 0x0a00e004;
    67. 

  67. imm32 r5, 0x0a00e005;
    68. 

  68. imm32 r6, 0x0a00e006;
    69. 

  69. imm32 r7, 0x0a00e007;
    70. 

  70. R0.L = EXPADJ( R0 , R2.L ) (V);
    71. 

  71. R1.L = EXPADJ( R1 , R2.L ) (V);
    72. 

  72. R3.L = EXPADJ( R3 , R2.L ) (V);
    73. 

  73. R4.L = EXPADJ( R4 , R2.L ) (V);
    74. 

  74. R5.L = EXPADJ( R5 , R2.L ) (V);
    75. 

  75. R6.L = EXPADJ( R6 , R2.L ) (V);
    76. 

  76. R7.L = EXPADJ( R7 , R2.L ) (V);
    77. 

  77. R2.L = EXPADJ( R2 , R2.L ) (V);
    78. 

  78. CHECKREG r0, 0x0A000002;
    79. 

  79. CHECKREG r1, 0x0A000002;
    80. 

  80. CHECKREG r2, 0x0A000003;
    81. 

  81. CHECKREG r3, 0x0A000002;
    82. 

  82. CHECKREG r4, 0x0A000002;
    83. 

  83. CHECKREG r5, 0x0A000002;
    84. 

  84. CHECKREG r6, 0x0A000002;
    85. 

  85. CHECKREG r7, 0x0A000002;
    86. 

  86. 

  87. imm32 r0, 0x0b00f001;
    88. 

  88. imm32 r1, 0x0b00f001;
    89. 

  89. imm32 r2, 0x0b00f002;
    90. 

  90. imm32 r3, 0x0b000010;
    91. 

  91. imm32 r4, 0x0b00f004;
    92. 

  92. imm32 r5, 0x0b00f005;
    93. 

  93. imm32 r6, 0x0b00f006;
    94. 

  94. imm32 r7, 0x0b00f007;
    95. 

  95. R0.L = EXPADJ( R0 , R3.L ) (V);
    96. 

  96. R1.L = EXPADJ( R1 , R3.L ) (V);
    97. 

  97. R2.L = EXPADJ( R2 , R3.L ) (V);
    98. 

  98. R3.L = EXPADJ( R3 , R3.L ) (V);
    99. 

  99. R4.L = EXPADJ( R4 , R3.L ) (V);
    100. 

  100. R5.L = EXPADJ( R5 , R3.L ) (V);
    101. 

  101. R6.L = EXPADJ( R6 , R3.L ) (V);
    102. 

  102. R7.L = EXPADJ( R7 , R3.L ) (V);
    103. 

  103. CHECKREG r0, 0x0B000010;
    104. 

  104. CHECKREG r1, 0x0B000010;
    105. 

  105. CHECKREG r2, 0x0B000010;
    106. 

  106. CHECKREG r3, 0x0B000010;
    107. 

  107. CHECKREG r4, 0x0B000010;
    108. 

  108. CHECKREG r5, 0x0B000010;
    109. 

  109. CHECKREG r6, 0x0B000010;
    110. 

  110. CHECKREG r7, 0x0B000010;
    111. 

  111. 

  112. imm32 r0, 0x0c0000c0;
    113. 

  113. imm32 r1, 0x0c0100c0;
    114. 

  114. imm32 r2, 0x0c0200c0;
    115. 

  115. imm32 r3, 0x0c0300c0;
    116. 

  116. imm32 r4, 0x0c0400c0;
    117. 

  117. imm32 r5, 0x0c0500c0;
    118. 

  118. imm32 r6, 0x0c0600c0;
    119. 

  119. imm32 r7, 0x0c0700c0;
    120. 

  120. R0.L = EXPADJ( R0 , R4.L ) (V);
    121. 

  121. R1.L = EXPADJ( R1 , R4.L ) (V);
    122. 

  122. R2.L = EXPADJ( R2 , R4.L ) (V);
    123. 

  123. R3.L = EXPADJ( R3 , R4.L ) (V);
    124. 

  124. R4.L = EXPADJ( R4 , R4.L ) (V);
    125. 

  125. R5.L = EXPADJ( R5 , R4.L ) (V);
    126. 

  126. R6.L = EXPADJ( R6 , R4.L ) (V);
    127. 

  127. R7.L = EXPADJ( R7 , R4.L ) (V);
    128. 

  128. CHECKREG r0, 0x0C0000C0;
    129. 

  129. CHECKREG r1, 0x0C0100C0;
    130. 

  130. CHECKREG r2, 0x0C0200C0;
    131. 

  131. CHECKREG r3, 0x0C0300C0;
    132. 

  132. CHECKREG r4, 0x0C0400C0;
    133. 

  133. CHECKREG r5, 0x0C0500C0;
    134. 

  134. CHECKREG r6, 0x0C0600C0;
    135. 

  135. CHECKREG r7, 0x0C0700C0;
    136. 

  136. 

  137. imm32 r0, 0xa00100d0;
    138. 

  138. imm32 r1, 0x000100d1;
    139. 

  139. imm32 r2, 0xa00200d0;
    140. 

  140. imm32 r3, 0xa00300d0;
    141. 

  141. imm32 r4, 0xa00400d0;
    142. 

  142. imm32 r5, 0xa00500d0;
    143. 

  143. imm32 r6, 0xa00600d0;
    144. 

  144. imm32 r7, 0xa00700d0;
    145. 

  145. R0.L = EXPADJ( R0 , R5.L ) (V);
    146. 

  146. R1.L = EXPADJ( R1 , R5.L ) (V);
    147. 

  147. R2.L = EXPADJ( R2 , R5.L ) (V);
    148. 

  148. R3.L = EXPADJ( R3 , R5.L ) (V);
    149. 

  149. R4.L = EXPADJ( R4 , R5.L ) (V);
    150. 

  150. R5.L = EXPADJ( R5 , R5.L ) (V);
    151. 

  151. R6.L = EXPADJ( R6 , R5.L ) (V);
    152. 

  152. R7.L = EXPADJ( R7 , R5.L ) (V);
    153. 

  153. CHECKREG r0, 0xA00100D0;
    154. 

  154. CHECKREG r1, 0x000100D0;
    155. 

  155. CHECKREG r2, 0xA00200D0;
    156. 

  156. CHECKREG r3, 0xA00300D0;
    157. 

  157. CHECKREG r4, 0xA00400D0;
    158. 

  158. CHECKREG r5, 0xA00500D0;
    159. 

  159. CHECKREG r6, 0xA00600D0;
    160. 

  160. CHECKREG r7, 0xA00700D0;
    161. 

  161. 

  162. imm32 r0, 0xb0010000;
    163. 

  163. imm32 r1, 0xb0010000;
    164. 

  164. imm32 r2, 0xb002000f;
    165. 

  165. imm32 r3, 0xb0030000;
    166. 

  166. imm32 r4, 0xb0040000;
    167. 

  167. imm32 r5, 0xb0050000;
    168. 

  168. imm32 r6, 0xb0060000;
    169. 

  169. imm32 r7, 0xb0070000;
    170. 

  170. R0.L = EXPADJ( R0 , R6.L ) (V);
    171. 

  171. R1.L = EXPADJ( R1 , R6.L ) (V);
    172. 

  172. R2.L = EXPADJ( R2 , R6.L ) (V);
    173. 

  173. R3.L = EXPADJ( R3 , R6.L ) (V);
    174. 

  174. R4.L = EXPADJ( R4 , R6.L ) (V);
    175. 

  175. R5.L = EXPADJ( R5 , R6.L ) (V);
    176. 

  176. R6.L = EXPADJ( R6 , R6.L ) (V);
    177. 

  177. R7.L = EXPADJ( R7 , R6.L ) (V);
    178. 

  178. CHECKREG r0, 0xB0010000;
    179. 

  179. CHECKREG r1, 0xB0010000;
    180. 

  180. CHECKREG r2, 0xB0020000;
    181. 

  181. CHECKREG r3, 0xB0030000;
    182. 

  182. CHECKREG r4, 0xB0040000;
    183. 

  183. CHECKREG r5, 0xB0050000;
    184. 

  184. CHECKREG r6, 0xB0060000;
    185. 

  185. CHECKREG r7, 0xB0070000;
    186. 

  186. 

  187. imm32 r0, 0xd00102e7;
    188. 

  188. imm32 r1, 0xd00104e7;
    189. 

  189. imm32 r2, 0xd00206e7;
    190. 

  190. imm32 r3, 0xd00308e7;
    191. 

  191. imm32 r4, 0xd0040ae7;
    192. 

  192. imm32 r5, 0xd0050ce7;
    193. 

  193. imm32 r6, 0xd0060ee7;
    194. 

  194. imm32 r7, 0xd00707e7;
    195. 

  195. R0.L = EXPADJ( R0 , R7.L ) (V);
    196. 

  196. R1.L = EXPADJ( R1 , R7.L ) (V);
    197. 

  197. R2.L = EXPADJ( R2 , R7.L ) (V);
    198. 

  198. R3.L = EXPADJ( R3 , R7.L ) (V);
    199. 

  199. R4.L = EXPADJ( R4 , R7.L ) (V);
    200. 

  200. R5.L = EXPADJ( R5 , R7.L ) (V);
    201. 

  201. R6.L = EXPADJ( R6 , R7.L ) (V);
    202. 

  202. R7.L = EXPADJ( R7 , R7.L ) (V);
    203. 

  203. CHECKREG r0, 0xD0010001;
    204. 

  204. CHECKREG r1, 0xD0010001;
    205. 

  205. CHECKREG r2, 0xD0020001;
    206. 

  206. CHECKREG r3, 0xD0030001;
    207. 

  207. CHECKREG r4, 0xD0040001;
    208. 

  208. CHECKREG r5, 0xD0050001;
    209. 

  209. CHECKREG r6, 0xD0060001;
    210. 

  210. CHECKREG r7, 0xD0070001;
    211. 

  211. 

  212. pass
    213.