c_dspldst_st_drlo_ipp.s 6.1 KB

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  1. //Original:testcases/core/c_dspldst_st_drlo_ipp/c_dspldst_st_drlo_ipp.dsp
  2. // Spec Reference: c_dspldst st_drlo_ipp
  3. # mach: bfin
  4. .include "testutils.inc"
  5. start
  6. // set all regs
  7. INIT_I_REGS -1;
  8. init_b_regs 0;
  9. init_l_regs 0;
  10. init_m_regs -1;
  11. // Half reg 16 bit mem store
  12. imm32 r0, 0x0a123456;
  13. imm32 r1, 0x11b12345;
  14. imm32 r2, 0x222c1234;
  15. imm32 r3, 0x3344d012;
  16. imm32 r4, 0x5566e012;
  17. imm32 r5, 0x789abf01;
  18. imm32 r6, 0xabcd0123;
  19. imm32 r7, 0x01234567;
  20. // initial values
  21. loadsym i0, DATA_ADDR_3;
  22. loadsym i1, DATA_ADDR_4;
  23. loadsym i2, DATA_ADDR_5;
  24. loadsym i3, DATA_ADDR_6;
  25. W [ I0 ++ ] = R0.L;
  26. W [ I1 ++ ] = R1.L;
  27. W [ I2 ++ ] = R2.L;
  28. W [ I3 ++ ] = R3.L;
  29. W [ I0 ++ ] = R1.L;
  30. W [ I1 ++ ] = R2.L;
  31. W [ I2 ++ ] = R3.L;
  32. W [ I3 ++ ] = R4.L;
  33. W [ I0 ++ ] = R3.L;
  34. W [ I1 ++ ] = R4.L;
  35. W [ I2 ++ ] = R5.L;
  36. W [ I3 ++ ] = R6.L;
  37. W [ I0 ++ ] = R4.L;
  38. W [ I1 ++ ] = R5.L;
  39. W [ I2 ++ ] = R6.L;
  40. W [ I3 ++ ] = R7.L;
  41. loadsym i0, DATA_ADDR_3;
  42. loadsym i1, DATA_ADDR_4;
  43. loadsym i2, DATA_ADDR_5;
  44. loadsym i3, DATA_ADDR_6;
  45. R0 = [ I0 ++ ];
  46. R1 = [ I1 ++ ];
  47. R2 = [ I2 ++ ];
  48. R3 = [ I3 ++ ];
  49. R4 = [ I0 ++ ];
  50. R5 = [ I1 ++ ];
  51. R6 = [ I2 ++ ];
  52. R7 = [ I3 ++ ];
  53. CHECKREG r0, 0x23453456;
  54. CHECKREG r1, 0x12342345;
  55. CHECKREG r2, 0xD0121234;
  56. CHECKREG r3, 0xE012D012;
  57. CHECKREG r4, 0xE012D012;
  58. CHECKREG r5, 0xBF01E012;
  59. CHECKREG r6, 0x0123BF01;
  60. CHECKREG r7, 0x45670123;
  61. R0 = [ I0 ++ ];
  62. R1 = [ I1 ++ ];
  63. R2 = [ I2 ++ ];
  64. R3 = [ I3 ++ ];
  65. R4 = [ I0 ++ ];
  66. R5 = [ I1 ++ ];
  67. R6 = [ I2 ++ ];
  68. R7 = [ I3 ++ ];
  69. CHECKREG r0, 0x08090A0B;
  70. CHECKREG r1, 0x28292A2B;
  71. CHECKREG r2, 0x48494A4B;
  72. CHECKREG r3, 0x68696A6B;
  73. CHECKREG r4, 0x0C0D0E0F;
  74. CHECKREG r5, 0x2C2D2E2F;
  75. CHECKREG r6, 0x4C4D4E4F;
  76. CHECKREG r7, 0x6C6D6E6F;
  77. // initial values
  78. imm32 r0, 0x01b2c3d4;
  79. imm32 r1, 0x10145618;
  80. imm32 r2, 0xa2016729;
  81. imm32 r3, 0xbb30183a;
  82. imm32 r4, 0xdec4014b;
  83. imm32 r5, 0x5f7d501c;
  84. imm32 r6, 0x3089eb01;
  85. imm32 r7, 0x719abf70;
  86. loadsym i0, DATA_ADDR_3, 0x20;
  87. loadsym i1, DATA_ADDR_4, 0x20;
  88. loadsym i2, DATA_ADDR_5, 0x20;
  89. loadsym i3, DATA_ADDR_6, 0x20;
  90. W [ I0 -- ] = R0.L;
  91. W [ I1 -- ] = R1.L;
  92. W [ I2 -- ] = R2.L;
  93. W [ I3 -- ] = R3.L;
  94. W [ I0 -- ] = R1.L;
  95. W [ I1 -- ] = R2.L;
  96. W [ I2 -- ] = R3.L;
  97. W [ I3 -- ] = R4.L;
  98. W [ I0 -- ] = R3.L;
  99. W [ I1 -- ] = R4.L;
  100. W [ I2 -- ] = R5.L;
  101. W [ I3 -- ] = R6.L;
  102. W [ I0 -- ] = R4.L;
  103. W [ I1 -- ] = R5.L;
  104. W [ I2 -- ] = R6.L;
  105. W [ I3 -- ] = R7.L;
  106. loadsym i0, DATA_ADDR_3, 0x20;
  107. loadsym i1, DATA_ADDR_4, 0x20;
  108. loadsym i2, DATA_ADDR_5, 0x20;
  109. loadsym i3, DATA_ADDR_6, 0x20;
  110. R0 = [ I0 -- ];
  111. R1 = [ I1 -- ];
  112. R2 = [ I2 -- ];
  113. R3 = [ I3 -- ];
  114. R4 = [ I0 -- ];
  115. R5 = [ I1 -- ];
  116. R6 = [ I2 -- ];
  117. R7 = [ I3 -- ];
  118. CHECKREG r0, 0x0000C3D4;
  119. CHECKREG r1, 0x00005618;
  120. CHECKREG r2, 0x00006729;
  121. CHECKREG r3, 0x0000183A;
  122. CHECKREG r4, 0x5618183A;
  123. CHECKREG r5, 0x6729014B;
  124. CHECKREG r6, 0x183A501C;
  125. CHECKREG r7, 0x014BEB01;
  126. R0 = [ I0 -- ];
  127. R1 = [ I1 -- ];
  128. R2 = [ I2 -- ];
  129. R3 = [ I3 -- ];
  130. R4 = [ I0 -- ];
  131. R5 = [ I1 -- ];
  132. R6 = [ I2 -- ];
  133. R7 = [ I3 -- ];
  134. CHECKREG r0, 0x014B1A1B;
  135. CHECKREG r1, 0x501C3A3B;
  136. CHECKREG r2, 0xEB015A5B;
  137. CHECKREG r3, 0xBF707A7B;
  138. CHECKREG r4, 0x14151617;
  139. CHECKREG r5, 0x34353637;
  140. CHECKREG r6, 0x54555657;
  141. CHECKREG r7, 0x74757677;
  142. pass
  143. // Pre-load memory with known data
  144. // More data is defined than will actually be used
  145. .data
  146. DATA_ADDR_3:
  147. .dd 0x00010203
  148. .dd 0x04050607
  149. .dd 0x08090A0B
  150. .dd 0x0C0D0E0F
  151. .dd 0x10111213
  152. .dd 0x14151617
  153. .dd 0x18191A1B
  154. .dd 0x1C1D1E1F
  155. .dd 0x00000000
  156. .dd 0x00000000
  157. .dd 0x00000000
  158. .dd 0x00000000
  159. .dd 0x00000000
  160. .dd 0x00000000
  161. .dd 0x00000000
  162. .dd 0x00000000
  163. .dd 0x00000000
  164. .dd 0x00000000
  165. .dd 0x00000000
  166. .dd 0x00000000
  167. .dd 0x00000000
  168. .dd 0x00000000
  169. .dd 0x00000000
  170. .dd 0x00000000
  171. .dd 0x00000000
  172. .dd 0x00000000
  173. .dd 0x00000000
  174. .dd 0x00000000
  175. .dd 0x00000000
  176. .dd 0x00000000
  177. .dd 0x00000000
  178. .dd 0x00000000
  179. .dd 0x00000000
  180. DATA_ADDR_4:
  181. .dd 0x20212223
  182. .dd 0x24252627
  183. .dd 0x28292A2B
  184. .dd 0x2C2D2E2F
  185. .dd 0x30313233
  186. .dd 0x34353637
  187. .dd 0x38393A3B
  188. .dd 0x3C3D3E3F
  189. .dd 0x00000000
  190. .dd 0x00000000
  191. .dd 0x00000000
  192. .dd 0x00000000
  193. .dd 0x00000000
  194. .dd 0x00000000
  195. .dd 0x00000000
  196. .dd 0x00000000
  197. .dd 0x00000000
  198. .dd 0x00000000
  199. .dd 0x00000000
  200. .dd 0x00000000
  201. .dd 0x00000000
  202. .dd 0x00000000
  203. .dd 0x00000000
  204. .dd 0x00000000
  205. DATA_ADDR_5:
  206. .dd 0x40414243
  207. .dd 0x44454647
  208. .dd 0x48494A4B
  209. .dd 0x4C4D4E4F
  210. .dd 0x50515253
  211. .dd 0x54555657
  212. .dd 0x58595A5B
  213. .dd 0x5C5D5E5F
  214. .dd 0x00000000
  215. .dd 0x00000000
  216. .dd 0x00000000
  217. .dd 0x00000000
  218. .dd 0x00000000
  219. .dd 0x00000000
  220. .dd 0x00000000
  221. .dd 0x00000000
  222. .dd 0x00000000
  223. .dd 0x00000000
  224. .dd 0x00000000
  225. .dd 0x00000000
  226. .dd 0x00000000
  227. .dd 0x00000000
  228. .dd 0x00000000
  229. .dd 0x00000000
  230. .dd 0x00000000
  231. .dd 0x00000000
  232. .dd 0x00000000
  233. .dd 0x00000000
  234. .dd 0x00000000
  235. .dd 0x00000000
  236. .dd 0x00000000
  237. .dd 0x00000000
  238. .dd 0x00000000
  239. DATA_ADDR_6:
  240. .dd 0x60616263
  241. .dd 0x64656667
  242. .dd 0x68696A6B
  243. .dd 0x6C6D6E6F
  244. .dd 0x70717273
  245. .dd 0x74757677
  246. .dd 0x78797A7B
  247. .dd 0x7C7D7E7F
  248. .dd 0x00000000
  249. .dd 0x00000000
  250. .dd 0x00000000
  251. .dd 0x00000000
  252. .dd 0x00000000
  253. .dd 0x00000000
  254. .dd 0x00000000
  255. .dd 0x00000000
  256. .dd 0x00000000
  257. .dd 0x00000000
  258. .dd 0x00000000
  259. .dd 0x00000000
  260. .dd 0x00000000
  261. .dd 0x00000000
  262. .dd 0x00000000
  263. .dd 0x00000000
  264. .dd 0x00000000
  265. .dd 0x00000000
  266. .dd 0x00000000
  267. .dd 0x00000000
  268. .dd 0x00000000
  269. .dd 0x00000000
  270. .dd 0x00000000
  271. .dd 0x00000000
  272. .dd 0x00000000
  273. DATA_ADDR_7:
  274. .dd 0x80818283
  275. .dd 0x84858687
  276. .dd 0x88898A8B
  277. .dd 0x8C8D8E8F
  278. .dd 0x90919293
  279. .dd 0x94959697
  280. .dd 0x98999A9B
  281. .dd 0x9C9D9E9F
  282. .dd 0x00000000
  283. .dd 0x00000000
  284. .dd 0x00000000
  285. .dd 0x00000000
  286. .dd 0x00000000
  287. .dd 0x00000000
  288. .dd 0x00000000
  289. .dd 0x00000000
  290. .dd 0x00000000
  291. .dd 0x00000000
  292. .dd 0x00000000
  293. .dd 0x00000000
  294. .dd 0x00000000
  295. .dd 0x00000000
  296. .dd 0x00000000
  297. .dd 0x00000000
  298. .dd 0x00000000
  299. .dd 0x00000000
  300. .dd 0x00000000
  301. .dd 0x00000000
  302. .dd 0x00000000
  303. .dd 0x00000000
  304. .dd 0x00000000
  305. .dd 0x00000000
  306. .dd 0x00000000
  307. DATA_ADDR_8:
  308. .dd 0xA0A1A2A3
  309. .dd 0xA4A5A6A7
  310. .dd 0xA8A9AAAB
  311. .dd 0xACADAEAF
  312. .dd 0xB0B1B2B3
  313. .dd 0xB4B5B6B7
  314. .dd 0xB8B9BABB
  315. .dd 0xBCBDBEBF
  316. .dd 0xC0C1C2C3
  317. .dd 0xC4C5C6C7
  318. .dd 0xC8C9CACB
  319. .dd 0xCCCDCECF
  320. .dd 0xD0D1D2D3
  321. .dd 0xD4D5D6D7
  322. .dd 0xD8D9DADB
  323. .dd 0xDCDDDEDF
  324. .dd 0xE0E1E2E3
  325. .dd 0xE4E5E6E7
  326. .dd 0xE8E9EAEB
  327. .dd 0xECEDEEEF
  328. .dd 0xF0F1F2F3
  329. .dd 0xF4F5F6F7
  330. .dd 0xF8F9FAFB
  331. .dd 0xFCFDFEFF