cec-syscfg-ssstep.S 1.1 KB

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  1. # Blackfin testcase for hardware single stepping
  2. # mach: bfin
  3. # sim: --environment operating
  4. #include "test.h"
  5. .include "testutils.inc"
  6. start
  7. # Set up exception handler
  8. imm32 P4, EVT3;
  9. loadsym R1, _evx;
  10. [P4] = R1;
  11. # Enable single stepping
  12. R0 = 1;
  13. SYSCFG = R0;
  14. # Lower to the code we want to single step through
  15. R1 = 1;
  16. imm32 R5, 0xffff
  17. R6 = 0;
  18. R7 = 0;
  19. loadsym R1, _usr;
  20. RETI = R1;
  21. RTI;
  22. _usr:
  23. # Single step and set a new bit every time
  24. BITSET (R7, 0);
  25. BITSET (R7, 1);
  26. BITSET (R7, 2);
  27. BITSET (R7, 3);
  28. BITSET (R7, 4);
  29. BITSET (R7, 5);
  30. BITSET (R7, 6);
  31. BITSET (R7, 7);
  32. BITSET (R7, 8);
  33. BITSET (R7, 9);
  34. BITSET (R7, 10);
  35. BITSET (R7, 11);
  36. BITSET (R7, 12);
  37. BITSET (R7, 13);
  38. BITSET (R7, 14);
  39. BITSET (R7, 15);
  40. JUMP fail_lvl;
  41. _evx:
  42. # Make sure exception reason is single step
  43. R3 = SEQSTAT;
  44. R4 = 0x3f;
  45. R3 = R3 & R4;
  46. R4 = 0x10;
  47. CC = R3 == R4;
  48. IF !CC JUMP fail_lvl;
  49. # Set a new bit in R6 every single step to match R7
  50. CC = R1;
  51. R6 = ROT R6 BY 1;
  52. CC = R6 == R7;
  53. IF !CC JUMP fail_lvl;
  54. # Do it through each bit
  55. CC = R5 == R6;
  56. IF CC JUMP pass_lvl;
  57. RTX;
  58. pass_lvl:
  59. dbg_pass;
  60. fail_lvl:
  61. dbg_fail;