user.ms 1.3 KB

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  1. # mach: crisv32
  2. # output: 40\n40\n140\nabadefb0\n6543789c\n0\n0\n0\n0\n0\n0\n0\n0\n
  3. ; Check for protected operations being NOP in user mode, for the
  4. ; parts implemented in this simulator.
  5. .include "testutils.inc"
  6. start
  7. move 0,ccs
  8. move 0,usp
  9. move 0,pid
  10. move 0,srs
  11. move 0,ebp
  12. move 0,spc
  13. setf u
  14. ; Flag settings, besides what's tested in rfn.ms, rfe.ms and
  15. ; sfe.ms.
  16. setf i
  17. move ccs,r3
  18. dumpr3 ; 0x40
  19. clearf u
  20. move ccs,r3
  21. dumpr3 ; 0x40
  22. move 0xc0000300,ccs
  23. move ccs,r3
  24. dumpr3 ; 0x140
  25. ; R14==USP
  26. move.d 0xabadefb0,r14
  27. nop
  28. nop
  29. nop
  30. move usp,r3
  31. dumpr3 ; 0xabadefb0
  32. move 0x6543789c,usp
  33. nop
  34. nop
  35. nop
  36. move.d r14,r3
  37. dumpr3 ; 0x6543789c
  38. ; We can't go back to kernel mode, so we can't check that R14 in
  39. ; kernel mode wasn't affected.
  40. ; Moves to protected special registers.
  41. .macro testsr reg,val=-1
  42. move \val,\reg
  43. ; Registers shorter than dword will not affect the rest of the
  44. ; general register when copied using a move insn.
  45. clear.d r3
  46. ; Three cycles are needed between move to protected register and
  47. ; read from it, to avoid reading undefined contents due to
  48. ; incomplete forwarding.
  49. nop
  50. nop
  51. move \reg,r3
  52. dumpr3
  53. moveq \val,r3
  54. move r3,\reg
  55. clear.d r3
  56. nop
  57. nop
  58. move \reg,r3
  59. dumpr3
  60. .endm
  61. testsr pid ; 0 0
  62. testsr srs,3 ; 0 0
  63. testsr ebp ; 0 0
  64. testsr spc ; 0 0
  65. quit