fteq.cgs 2.0 KB

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  1. # frv testcase for fteq $FCCi_2,$GRi,$GRj
  2. # mach: all
  3. .include "testutils.inc"
  4. start
  5. .global fteq
  6. fteq:
  7. and_spr_immed -4081,tbr ; clear tbr.tt
  8. set_gr_spr tbr,gr7
  9. inc_gr_immed 2112,gr7 ; address of exception handler
  10. set_bctrlr_0_0 gr7 ; bctrlr 0,0
  11. set_spr_immed 128,lcr
  12. set_gr_immed 0,gr7
  13. set_gr_immed 4,gr8
  14. set_spr_addr bad,lr
  15. set_fcc 0x0 0
  16. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  17. set_spr_addr bad,lr
  18. set_fcc 0x1 0
  19. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  20. set_spr_addr bad,lr
  21. set_fcc 0x2 0
  22. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  23. set_spr_addr bad,lr
  24. set_fcc 0x3 0
  25. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  26. set_spr_addr bad,lr
  27. set_fcc 0x4 0
  28. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  29. set_spr_addr bad,lr
  30. set_fcc 0x5 0
  31. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  32. set_spr_addr bad,lr
  33. set_fcc 0x6 0
  34. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  35. set_spr_addr bad,lr
  36. set_fcc 0x7 0
  37. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  38. set_psr_et 1
  39. set_spr_addr ok8,lr
  40. set_fcc 0x8 0
  41. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  42. fail
  43. ok8:
  44. set_psr_et 1
  45. set_spr_addr ok9,lr
  46. set_fcc 0x9 0
  47. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  48. fail
  49. ok9:
  50. set_psr_et 1
  51. set_spr_addr oka,lr
  52. set_fcc 0xa 0
  53. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  54. fail
  55. oka:
  56. set_psr_et 1
  57. set_spr_addr okb,lr
  58. set_fcc 0xb 0
  59. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  60. fail
  61. okb:
  62. set_psr_et 1
  63. set_spr_addr okc,lr
  64. set_fcc 0xc 0
  65. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  66. fail
  67. okc:
  68. set_psr_et 1
  69. set_spr_addr okd,lr
  70. set_fcc 0xd 0
  71. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  72. fail
  73. okd:
  74. set_psr_et 1
  75. set_spr_addr oke,lr
  76. set_fcc 0xe 0
  77. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  78. fail
  79. oke:
  80. set_psr_et 1
  81. set_spr_addr okf,lr
  82. set_fcc 0xf 0
  83. fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  84. fail
  85. okf:
  86. pass
  87. bad:
  88. fail