| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138 |
- # frv testcase for mcmpuh $FRi,$FRj,$FCCk
- # mach: all
- .include "testutils.inc"
- start
- .global mcmpuh
- mcmpuh:
- set_fr_iimmed 0x7fff,0x7fff,fr10
- set_fr_iimmed 0x7fff,0x7fff,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x8,1
- set_fr_iimmed 0x7fff,0x7fff,fr10
- set_fr_iimmed 0x7fff,0x8000,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0xb,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x4,1
- set_fr_iimmed 0x7fff,0x7fff,fr10
- set_fr_iimmed 0x8000,0x7fff,fr11
- set_fcc 0xb,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x4,0
- test_fcc 0x8,1
- set_fr_iimmed 0x7fff,0x7fff,fr10
- set_fr_iimmed 0x8000,0x8000,fr11
- set_fcc 0xb,0 ; Set mask opposite of expected
- set_fcc 0xb,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x4,0
- test_fcc 0x4,1
- set_fr_iimmed 0x7fff,0x8000,fr10
- set_fr_iimmed 0x7fff,0x7fff,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0xd,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x2,1
- set_fr_iimmed 0x7fff,0x8000,fr10
- set_fr_iimmed 0x7fff,0x8000,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x8,1
- set_fr_iimmed 0x7fff,0x8000,fr10
- set_fr_iimmed 0x8000,0x7fff,fr11
- set_fcc 0xb,0 ; Set mask opposite of expected
- set_fcc 0xd,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x4,0
- test_fcc 0x2,1
- set_fr_iimmed 0x7fff,0x8000,fr10
- set_fr_iimmed 0x8000,0x8000,fr11
- set_fcc 0xb,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x4,0
- test_fcc 0x8,1
- set_fr_iimmed 0x8000,0x7fff,fr10
- set_fr_iimmed 0x7fff,0x7fff,fr11
- set_fcc 0xd,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x2,0
- test_fcc 0x8,1
- set_fr_iimmed 0x8000,0x7fff,fr10
- set_fr_iimmed 0x7fff,0x8000,fr11
- set_fcc 0xd,0 ; Set mask opposite of expected
- set_fcc 0xb,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x2,0
- test_fcc 0x4,1
- set_fr_iimmed 0x8000,0x7fff,fr10
- set_fr_iimmed 0x8000,0x7fff,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x8,1
- set_fr_iimmed 0x8000,0x7fff,fr10
- set_fr_iimmed 0x8000,0x8000,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0xb,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x4,1
- set_fr_iimmed 0x8000,0x8000,fr10
- set_fr_iimmed 0x7fff,0x7fff,fr11
- set_fcc 0xd,0 ; Set mask opposite of expected
- set_fcc 0xd,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x2,0
- test_fcc 0x2,1
- set_fr_iimmed 0x8000,0x8000,fr10
- set_fr_iimmed 0x7fff,0x8000,fr11
- set_fcc 0xd,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x2,0
- test_fcc 0x8,1
- set_fr_iimmed 0x8000,0x8000,fr10
- set_fr_iimmed 0x8000,0x7fff,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0xd,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x2,1
- set_fr_iimmed 0x8000,0x8000,fr10
- set_fr_iimmed 0x8000,0x8000,fr11
- set_fcc 0x7,0 ; Set mask opposite of expected
- set_fcc 0x7,1 ; Set mask opposite of expected
- mcmpuh fr10,fr11,fcc0
- test_fcc 0x8,0
- test_fcc 0x8,1
- pass
|
