tge.cgs 2.0 KB

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  1. # frv testcase for tge $ICCi_2,$GRi,$GRj
  2. # mach: all
  3. .include "testutils.inc"
  4. start
  5. .global tge
  6. tge:
  7. and_spr_immed -4081,tbr ; clear tbr.tt
  8. set_gr_spr tbr,gr7
  9. inc_gr_immed 2112,gr7 ; address of exception handler
  10. set_bctrlr_0_0 gr7 ; bctrlr 0,0
  11. set_spr_immed 128,lcr
  12. set_gr_immed 0,gr7
  13. set_gr_immed 4,gr8
  14. set_psr_et 1
  15. set_spr_addr ok0,lr
  16. set_icc 0x0 0
  17. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  18. fail
  19. ok0:
  20. set_psr_et 1
  21. set_spr_addr ok1,lr
  22. set_icc 0x1 0
  23. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  24. fail
  25. ok1:
  26. set_spr_addr bad,lr
  27. set_icc 0x2 0
  28. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  29. set_spr_addr bad,lr
  30. set_icc 0x3 0
  31. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  32. set_psr_et 1
  33. set_spr_addr ok4,lr
  34. set_icc 0x4 0
  35. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  36. fail
  37. ok4:
  38. set_psr_et 1
  39. set_spr_addr ok5,lr
  40. set_icc 0x5 0
  41. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  42. fail
  43. ok5:
  44. set_spr_addr bad,lr
  45. set_icc 0x6 0
  46. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  47. set_spr_addr bad,lr
  48. set_icc 0x7 0
  49. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  50. set_spr_addr bad,lr
  51. set_icc 0x8 0
  52. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  53. set_spr_addr bad,lr
  54. set_icc 0x9 0
  55. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  56. set_psr_et 1
  57. set_spr_addr oka,lr
  58. set_icc 0xa 0
  59. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  60. fail
  61. oka:
  62. set_psr_et 1
  63. set_spr_addr okb,lr
  64. set_icc 0xb 0
  65. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  66. fail
  67. okb:
  68. set_spr_addr bad,lr
  69. set_icc 0xc 0
  70. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  71. set_spr_addr bad,lr
  72. set_icc 0xd 0
  73. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  74. set_psr_et 1
  75. set_spr_addr oke,lr
  76. set_icc 0xe 0
  77. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  78. fail
  79. oke:
  80. set_psr_et 1
  81. set_spr_addr okf,lr
  82. set_icc 0xf 0
  83. tge icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
  84. fail
  85. okf:
  86. pass
  87. bad:
  88. fail